JPS6148426B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a printing device having a printing drum, and in particular, it is constructed so that characters of odd number digits and even number digits appear alternately in the printing position, and when printing, the printing device is configured such that characters of odd number digits and even number digits appear alternately in the printing position, and when printing, The present invention relates to a printing device that stops a drum and drives a hammer based on a timing signal that appears.

Conventionally, in the method of stopping a rotating printing drum before printing, the drum is stopped at a desired position based on timing pulses that appear in response to the movement of the drum. At this time, variations occur in the time from when the drum stop mechanism is activated until the rotation of the drum completely stops and the printing becomes possible. Conventionally, the method to solve this type of problem is to activate the drum stop mechanism after the drum stop timing pulse arrives.
Since the printer then waits for a sufficient period of time before starting the printing operation, in many cases there is an inconvenience in that unnecessary waiting time is required.

The present invention has been made in view of the above points, and when printing letters of odd number digits, after a timing pulse corresponding to the odd number comes and the drum stop means is activated, a timing pulse corresponding to the drum rotation is activated. The hammer is driven a predetermined time after the timing pulse of an even number digit appears, and when printing characters of an even number digit, the drum stops further after the timing pulse corresponding to the even number digit comes and operates the drum stop means. The hammer is driven a predetermined time after an odd-numbered timing pulse appears corresponding to the timing pulse.

This makes it possible to ignore the above-mentioned variations in stopping time due to the rotational speed of the drum, and it becomes possible to improve the printing speed without requiring unnecessary waiting time.

An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

Here, 1 is a printing drum, and the odd and even digits are composed of the same characters shifted by one line in the circumferential direction, and as the drum rotates, the odd and even digits alternately pass through the printing hammer position. A printing drum 1 configured as shown in FIG. Pulse indicating type of type
It has an even-numbered pulse generation plate 3 having a group of electrodes for generating ECP. Further, 4 is a home pulse generating plate that generates a pulse HP representing the home position. Further, coaxially with the printing drum 1, there are ratchets 5 and 6 having claws for stopping the rotation of the printing drum 1. Ratchet 5 is print drum 1
The ratchet 6 has a tab so that the upper odd-numbered digits stop at the printing position, and the ratchet 6 has a tab so that the even-numbered digits stop at the printing position. Further, a DC motor 8 is connected to the shaft of the printing drum 1 via a spring clutch 7, and the printing drum 1 is continuously rotated by the DC motor 8.

The claw 11 of the odd-number stop solenoid 9 of the drum 1 corresponds to the claw of the ratchet 5, and when both engage, the spring clutch 7 acts to stop the drum at a predetermined odd-number digit.

Similarly, the pawl 12 of the even-number stop solenoid 10 of the drum 1 corresponds to the pawl of the ratchet 6, and when both are engaged, the spring clutch 7 acts to stop the drum at a predetermined even-number digit.

FIG. 2 is a developed view of the drum 1, and the broken lines represent the positional and (temporal) relationship between the electrode groups of the pulse generating plate and each character row. Also, the signal names are pulse OCP, pulse OP with waveform shaping of ECP,
The type name of the corresponding typeface is added in parentheses of EP. Here, EP (STR) is a signal that appears at the beginning of the even-numbered pulse EP, and although it has no correspondence with printed characters, it is a pulse that indicates the start of printing for control purposes. Also, the pulse OP that appears at the end of the odd number pulse OP
(STP) also has no corresponding typeface, but signal ECP, OCP
It has a meaning for waveform shaping.

FIG. 3 shows the time relationship between the odd pulse OP, the even pulse EP, and the stop ratchets 5 and 6 of the drum 1.

In this embodiment, there are two methods for stopping the drum 1, which has been stopped after the first character selection printing is completed, to select the next character.

One way to do this is for example to use the stop now solenoid 9.
is ON, 10 is OFF, and the drum is stopped at the odd number n-1 character position of Ratchet 5. From this position, the next even number n-1 character position is set.
This is a case where the drum is not stopped at the letter n, but the drum is stopped at the letter n, which is an odd number. First, this case will be explained with reference to FIG. 3 (first).

First, the odd number stop solenoid 9 is turned OFF, and the drum 1 is rotated by the action of the spring clutch 7.
When the drum rotates and the pulse generation plates 3 and 2 rotate with the rotation of the drum, first the odd number pulse OP is generated.
(n) appears. When the stop solenoid 9 is turned on when this odd-numbered pulse OP(n) comes, the pawl 11 of the stop solenoid 9 will come into contact with the pawl corresponding to the letter n on the ratchet 5. The drum does not stop immediately after the stop solenoid 9's claw 11 and the laminate 5's claw touch, and the drum continues to rotate for a while, so even number pulse EP(n) is generated.
appears. In this example, this even pulse EP
Based on (n), the drum stops stably after a period of 13 msec has elapsed, after which the hammer H is driven. To summarize the above, when the drum is stopped at an odd number n-1 character by turning on the stop solenoid 9, in order to stop it at the next odd number n character position, first turn off the stop solenoid 9. , when the odd number pulse OP(n) appears, the stop solenoid 9 is turned ON, and then based on the even number pulse EP(n) that appears subsequently.
After waiting for 13 msec, the drum stably stops at the odd number n character position.

Also, a second drum stopping method according to this embodiment will be explained. As in the previous example, stop solenoid 9 now.
The case where the drum is stopped at the odd number n-1 character position due to ON, and then stopped at the even number n-1 character position will be described. Here even number n-
The even number pulse EP (n-1) corresponding to one character has already passed, and the stop timing cannot be obtained. For this purpose, by turning off the stop solenoid 9 and turning on the stop solenoid 10 at the same time, the drum rotates from the pawl of the ratchet 5 to the pawl of the ratchet 6, just like an escape wheel.

At this time, as before, as the drum rotates, an odd number pulse OP(n) appears, but if you wait 13 msec based on this pulse, the drum will rotate even number n-1.
It stops stably at the character position.

Alternatively, if you turn on the stop solenoid 10 when the even number pulse EP (n-1) comes before stopping at the odd number n-1 character position,
When rotating from the odd number n-1 position to the even number n-1 position, the same operation is performed simply by turning off the stop solenoid 9. However, in this method, there is a time when the stop solenoids 9 and 10 are ON at the same time, and it is mechanically undesirable for them to be ON at the same time from the viewpoint of power consumption.

The mechanism for stopping the drum has been described above, and the structure and operation of each part shown in FIG. 1 will be explained below.

In Fig. 1, W is a waveform shaping circuit, which is a gate circuit for shaping the waveform distortion caused by chatter of the contact signals OCP and ECP into pulses OP and EP synchronized with the clock pulse. These are as shown in Figures A and B.

HO and HE are differentiating circuits, and the signals OP and EP
This circuit generates a short pulse equivalent to one clock pulse at the rising edge of the clock pulse.

CC is a hexadecimal character counter, even pulse
The count advances by one depending on the EP. It is also set to 12 by the home pulse HP.

AC is an arithmetic circuit, and normally it outputs CC as is, but by adding a signal to the DEC terminal, CC is output.
It is possible to output a value that is 1 less than the content of .
The RAM is a random access memory that holds information to be printed that has been processed by the calculator calculation unit CAL, and outputs the information of the digit indicated by the address register ADR to the comparator CMP. The address register ADR sequentially addresses the print information memory RAM based on the state of the odd pulse OP and the control signal CNT. The output of the print information memory RAM addressed by the means and the register AC
The output of is applied to the comparator circuit CMP, and the comparator circuit
The CMP compares the two inputs and outputs a match signal EQ if they match.

EQ is stored in shift register SR via AND gate G1.

ANDGATE G2 has one shot OS2.
When , it becomes prohibited and one shot OS2 is
When , a match signal EQ is output.

That is, when the one-shot OS2 is 0 and the signal EQ is 1, the corresponding flip-flop NODD or NEVN is set by the gate circuits G3 and G4. The flip-flop NODD is a flip-flop that stores whether or not the next odd-numbered character should be printed, and the NEVN is a flip-flop that stores whether or not the next even-numbered character should be printed. , is a flip-flop that operates in synchronization with the clock.

The gate G5 is an AND gate whose inputs are the odd pulse OP, the output of the flip-flop NODD, and NEVN. Similarly, G6 is an even pulse EP
This is an AND gate that receives the flip-flops NEVN and NODD as inputs.

Gate G7 is an AND gate that receives even pulse EP and flip-flop NODD as input.
G8 has odd pulse OP and flip-flop NEVN
is an AND gate whose input is

The output of AND gate G7 is a flip-flop
It is connected to the reset input of NODD and also serves as an input to OR gate R1. Also, and gate G8
The output of is connected to the reset input of flip-flop NEVN and also serves as the input of gate R1.

OS1 to OS4 are each one-shot circuits, each input is connected to the output of the previous one-shot, and the input of one-shot OS1 is OR
It is connected to the output of gate R1, and when the output of OR gate R1 becomes 1, OS1 to OS4 sequentially become 1.

The output of the one-shot OS2 is the arithmetic circuit AC.
Connected to the DEC terminal and the input of AND gate G1. That is, when the output of the one-shot OS2 becomes 1, the value 1 less than the content of the arithmetic circuit AC and the corresponding digit data in the print information memory RAM are compared by the comparator circuit CMP, and a match signal EQ is generated by the AND gate G1. Input to shift register SR. The shift register SR has the same number of bits as the number of hammers.

LAD is a latch circuit and a shift register
The contents of SR are latched by control signal LP.
The LAD also includes a print hammer drive circuit. Reference numeral 13 denotes a printing solenoid and a hammer, which are driven when the output of the latch and hammer drive circuit LAD becomes 1, and print characters on the printing drum corresponding to the hammer position.

G9 is a 3-input AND gate, and the output of one-shot OS4 is connected to it, and the other inputs are
The even pulse EP and the output of the flip-flop NEVN are connected. Similarly, G10 is a three-input AND gate, and is connected to the output of the one-shot OS5, the odd-numbered pulse OP, and the flip-flop NODD.

R2 is an or gate, and gate G9
and G5 as input, and its output is connected to the set input of flip-flop OSTS. R3 is also an OR gate, which takes AND gates G10 and G6 as inputs, and its output becomes the flip-flop ESTP set input. OS5 is also one-shot, and starts when one-shot OS3 ends. One shot time is shorter than OS4. Its output becomes a reset signal for flip-flops ESTP and OSTP. The outputs of the flip-flops OSTP and ESTP drive drum stop solenoids 9 and 10 via drivers DO and DE.

The home position signal HP in this embodiment is used to set the character counter CC and to detect the home position when the power is turned on.

In other words, home position detection during normal operation determines the home position when the character counter CC reaches 12, but when it is unknown at which position the character drum is stopped when the power is turned on, the home position pulse HP is set to CAL. See and stop at home position.

The printing start status is flip-flop NODD,
NEVN, OSTP, and ESTP are each reset, with the odd pulse OP set to 0 and the even pulse EP set to 1. That is, after the drum 1 has rotated once, the process ends in the state described above. at first
CAL drives DC motor M. Since the flip-flops OSTP and ESTP are now in the reset state, both stop solenoids 9 and 10 are OFF.
Therefore drum 1 starts rotating and the first pulse EP
(STR) appears. This first pulse EP
(STR) adds 1 to the character counter CC.

Character counter CC is set to 1 by Hall pulse HP.
Since it was set to 2, its contents will be 0.

Next, it is checked whether or not the odd-numbered digit 0, which appears at the first print position of the printed characters on the drum, is within the print information to be printed. That is, the content of the character counter is 0.
is given to the arithmetic circuit AC, and one input DEC of the arithmetic circuit AC has a one shot OS2 of 0, so one input of the comparison circuit CMP is given the contents of the character counter CC as is.
On the other hand, data from the print information memory RAM is applied to the other input of the comparator circuit CMP, and the data is determined by the contents of the address register ADR. The address register ADR is controlled by the odd pulse OP and the control signal CNT, but since the odd pulse OP is 0, the CNT signal causes the address register ADR to control the first and third digits in the print information memory RAM. Specify the addresses of data in the 5th, 7th, and 9th digits in sequence. For example,
When the print information is 11423.1, the output of the print information memory RAM is sequentially output as 1, 3, 4, 1, blank, etc. according to the contents of the address register ADR.

These data are compared with one input 0 by the comparison circuit CMP, but since there is no matching data, the match output EQ is 0.

The above is the operation for pulse EP (STR), and it waits for the next pulse to arrive. The above operation is processed in an extremely short time compared to the interval between odd and even pulses. Since the drum DR continues to rotate,
Next, an odd pulse OP0 appears.

Here, since flip-flops NODD and NEVN are in the reset state, G5 to G8 are all closed, and the following operations are not performed. Also address register
Since OP is 1 at the input of ADR, even-numbered digits are sequentially addressed by other input signals. That is, 2
Address the digit, 4th digit, 6th digit, 8th digit, 10th digit, and print from the print information memory/RAM.
Sends the information of 11423.1, 2, 1, space, space to the comparison circuit CMP. On the other hand, the other inputs of the comparator circuit CMP are given 0 because the character counter CC is 0 and 0 is input to the input DEC of the arithmetic circuit AC. Therefore the coincidence signal
EQ remains at 0. Further, the drum continues to rotate, and then an even pulse EP0 appears. Here, since the flip-flops NODD and NEVN are in the reset state, gates G5 to G8 are closed, and the following operations are not performed. On the other hand, since the OP of the input of the address register ADR is 0, the control signal CNT sequentially addresses the 1st, 3rd, and 9th digits of the odd-numbered address, and stores the data in the print information memory RAM.
11423・1, 1, 3, 4, 1 sequential comparison circuit
Give to CMP input. On the other hand, the even number pulse EP increments the contents of the character counter CC by one and sets it to 1. The contents of the character counter CC pass through the arithmetic circuit AC and are applied to one input of the comparison circuit CMP. Since the one-shot OS2 is now 0, the input DEC of the arithmetic circuit AC is 0, so the output is 1, which is the same as the content of the character counter CC.

As described above, when compared with 1 in the first and seventh digits of the print information, the coincidence signal EQ becomes 1.
The coincidence signal EQ is an input to gate 2, and the other input is one shot OS2, whose signal is 0. Therefore, gate G2 is in an open state.

That is, the coincidence signal EQ passes through the gate G2 and is connected to the AND gate G3, and since the other input even pulse EP of the AND gate G3 is 1,
Set flip-flop NODD. As described above, the series of timings related to the even pulse EP0 are
As shown in the figure.

Next, since the drum continues to rotate further, an odd number pulse OP1 appears this time. Now the flip-flop NODO is set and the output is 1.
NEVN is in the reset state, ie, NEVN is 1.
Therefore, AND gate G5 outputs 1, which is further applied to one input of OR gate R2, and its output sets flip-flop OSTP. The output of the flip-flop OSTP turns on the stop solenoid 9 via the driver DO. On the other hand, odd number pulse OP1 is applied to address register ADR,
In response to the control signal CNT, the address register ADR gives addresses of even number digits, that is, the second, fourth, . . . 10th digits, to the information memory RAM. Thereafter, according to the series of comparison operations as described above, the contents 1 of the character counter CC and the even numbered digits of the print information memory are compared, but when the 6th digit 1 in the print information is compared,
The coincidence signal EQ becomes 1, gate G2, gate G
Set flip-flop NEVN via 4. Now, the stop solenoid 9 is ON, but
Since the drum continues to rotate until the pawl of the ratchet 5 hits the pawl 11 of the stop solenoid 9, an even pulse EP1 is obtained and the next operation begins. now,
Flip-flop NODD is 1. Therefore, the output of AND gate G7 becomes 1, and OR gate R1
Scoot oneshot OS1 via .
One shot OS1 is used to create 13 msec for the drum to stably stop as explained in the stopping mechanism above. The output of AND gate G7 also resets NODD. On the other hand, even pulse EP1
advances the contents of the character counter CC by one to 2, and since the odd-numbered pulse OP is 0, it compares whether there is a 2 in an odd-numbered digit of the data, and if so, sets NODD. In this printing example 11423・1, 2 is placed in the odd numbered digits.
Since there is no matching signal EQ, the flip-flop NODD is not set.

Next, when the one-shot OS1 of 13 msec becomes 0, the one-shot OS2 starts and becomes 1.
In this state, the drum is stably stopped at a position where odd-numbered 1s can be printed. Oneshot OS2 is 1
Then, the input DEC of the arithmetic circuit AC becomes 1,
The input of the comparison circuit OMP is given the number obtained by subtracting 1 from the content 2 of the character counter CC, that is, 1.

Also, since the odd number pulse OP is now 0, the print information of the odd number digit is given to the other input of the comparison circuit CMP by the control signal CNT, and the 1st digit, 3rd digit, etc.
Digit…Successively compare in the order of the 9th digit and output the match
EQ is sequentially stored in shift register SR. When the 5 odd number data from the 1st to 9th digits are stored in the shift register SR, the data in the shift register SR is transferred to the latch and drive circuit LAD.
Clear shift register SR at the same time as transferring to. Now, the latch and drive circuit LAD
At the same time that the printing information is entered, the hammer solenoid 13
is driven and begins printing operation, but what is currently being printed is the odd numbered digit 1. That is, the hammers in charge of the 1st and 2nd digits and the hammers in charge of the 7th and 8th digits are driven, and the 1st and 7th digits of print information 11423.1 are driven.
The digit 1 is printed. Next, one-shot OS
When 2 becomes 0, the control signal LP is output, and the contents of the shift register SR, ie, 0, are transferred to the latch and drive circuit, and the drive of the hammer solenoid is ended.

Furthermore, when one shot OS2 becomes 0, one shot OS3 starts and becomes 1. This one-shot OS3 creates the time necessary for the hammer to return to its original position from the drum surface.
Next, when the one-shot OS3 becomes 0, the drum starts rotating again, but in this embodiment, there are two methods as explained above regarding the drum stop mechanism.

In this printing example, since there is data to be printed on the next line as well, it is necessary to drive the stop solenoids 9 and 10 like an escape wheel.

One shot When OS3 reaches 0, one shot
OS4 and OS5 will start. OS4 makes time for setting the flip-flops OSTP and ESTP, and OS5 also makes a signal for resetting, so the startup time of OS4 is shorter than that of OS5.

Here, since the output of the one-shot OS5 is the reset input for the flip-flops OSTP and ESTP, the flip-flops OSTP and ESTP are reset.

On the other hand, the output of one-shot OS4 is the input of AND gates G9 and G10, and now the even number pulse
EP is 1, odd pulse OP is 0, flip-flop
NEVN is 1. Therefore, the AND gate G10 has an output of 1 while the one shot OS4 is 1, sets the flip-flop ESTP via the OR gate R3, and turns on the stop solenoid 10 via the driver DB.

Stop solenoid 9 is OFF since flip-flop OSTP has been reset.

Through the above series of operations, the drum starts rotating again. As the rotation progresses, an odd-numbered pulse OP2 appears next.

Since flip-flop NEVN is now 1, AND gate G8 outputs 1, and one shot OS1 is started again via OR gate R1. At the same time, the output of AND gate G8 resets flip-flop NEVN. On the other hand, since the odd-numbered pulse OP is 1, the address register ADR sequentially outputs even-digit addresses in response to the control signal CNT. Print information memory RAM along with address
Therefore, out of data 11423.1, 2, 1, space, space appear in this order, but the current character counter CC is 2 and the one shot OS2 is 0, so when 2 is compared, the match signal Q becomes 1 and the slipflop NEVN is set again.
Further, after 13 msec has elapsed since the one-shot OS1 started, the output of the one-shot OS1 becomes 0, and at the same time, the one-shot OS2 starts and becomes 1.
When the one-shot OS2 becomes 1, the input DEC of the arithmetic circuit AC becomes 1, so its output is a character counter.
The value obtained by subtracting 1 from the content 2 of CC, that is, 1, is outputted and given to the comparator circuit CMP.

Control signal to compare this 1 and print data
CNT changes the value of address register ADR. Now, since the odd number pulse OP is 1, the address register ADR sequentially addresses the even number digits, and out of the data of 11423.1 from the print information memory RAM,...
2, 1, space, space, information comparison circuit
At the same time that it is applied to CMP, the match signal EQ is stored in shift register SR along with the comparison of each digit. That is, the contents of shift register SR are set to 00100.

When the above comparison results are stored in the shift register SR, this information is transferred to the latch and drive circuit.
It is transferred to the LAD, drives the hammer solenoid, and prints the 6th digit 1. When One Shot OS2 becomes 0, printing ends, then One Shot OS3 starts, waits for the hammer solebide to return, and then One Shot OS4 and OS5 are started. Now, since the even pulse EP is 0 and the flip-flop NODD is 0, the outputs of AND gates G9 and G10 are 0, so the flip-flops OSTP and ESTP are not set, but are only reset by the one-shot OS5. This turns stop solenoids 9 and 10 OFF.
Then, the drum starts rotating again. As the drum rotates, the next pulse, an even pulse EP2, appears.

Now, since flip-flop NEVN is 1 and NODD is 0, AND gate G6 outputs 1, and flip-flop ESTP is set via OR gate R3. This turns the stop solenoid 10 ON. On the other hand, the even number pulse EP advances the character counter CC by one, changes its contents to 3, compares this 3 with the print information of the odd number digits, and if there is a matching character, sets the flip-flop NODD.
In this case, the print information has 3 in the third digit, so the flip-flop NODD is set. Now, the drum 1 continues to rotate until the stop solenoid 10's pawl 12 hits the ratchet 6's pawl and stops, and the next pulse appears as an odd-numbered pulse OP3, and since the flip-flop NEVN is 1, the output of the AND gate G8 is 1, flip-flop NEVN is reset, and at the same time, one-shot OS1 is started via OR gate R1. Thereafter, all of the print information is printed by repeating similar operations, and these operations are shown in the timing chart of FIG. 6 and the flow chart of FIG. 7.

In Fig. 1, 14 is a keyboard for a calculator, with numerical keys □0 to □9 and operation instruction keys □×□÷ to □=
Equipped with etc. 15 is a battery that powers the entire calculator. 1
6 is a numerical display. 17 is an ink roller.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
Figure 3 is a reference diagram for explaining the drum stop mechanism, Figure 4 A and B are diagrams showing the timing pulse waveform shaping circuit and timing, Figure 5 is an illustration of the operation. FIG. 6 is a timing pulse diagram showing the overall operation, and FIG. 7 is a flowchart. 1...Type drum, 9,10...Solenoid,
5, 6... Ratchet, 8... DC motor,
CC...Character counter, SR...Shift register.

Claims (1)

[Claims] 1. A printing drum in which the characters of the odd-numbered digit group and the even-numbered digit group are arranged circumferentially offset from each other so that as the drum rotates, the odd-numbered digit type and the even-numbered digit type appear alternately at the printing position; a first pulse generating means for generating a timing pulse for stopping printing of odd-numbered characters on the printing drum; and a second pulse generating means for generating a timing pulse for stopping printing of even-numbered characters at a printing position. and a timing pulse generated by the first pulse generating means corresponding to the odd-numbered character preceding the desired odd-numbered character in order to stop the desired odd-numbered character at the printing position. a first stopping means for stopping the printing drum in correspondence with an odd number digit, and a first stopping means corresponding to an even number digit preceding the desired even number digit in order to stop the print drum in a desired even number digit at a printing position. a second stopping means that is actuated by a timing pulse generated from the second pulse generating means and stops the printing drum corresponding to the even numbered digits; a hammer that strikes the type at the printing position; When printing type, the hammer is driven after a predetermined period of time has elapsed from the time point at which the timing pulse generated from the second pulse generating means is generated after the operation of the first stopping means, and the type of the even number digits is printed. and means for driving the hammer after a predetermined period of time has elapsed from the time when the timing pulse generated from the first pulse generating means is generated after the operation of the second stopping means.