JPS6047116B2 - Pulse motor control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse motor operation control device, and more particularly to a device for controlling a pulse motor for driving a print head in accordance with a transfer mode of the print head in a printing device.

To operate a pulse motor, the excitation phases are sequentially switched.

In this switching, each of the excitation phases is excited by a shift register that controls the operation of the pulse motor via a drive circuit, and the shifts are as follows: 111, Rehab E ↓ Square phase. I like Eichi ■shi^÷A. It is known that the pulse motor for driving the print head has four excitation modes depending on the forward feed mode of the print head.

That is, (1) single character printing mode, (2) transitional printing mode for several characters before continuous printing, (3) continuous printing mode, (4) transitional printing mode for several characters before stopping. be. Therefore, in order to operate the pulse motor for driving the print head in the forward direction, excitation may be performed using a combination of these four modes. Conventionally, in order to perform such excitation, four groups of one-shot multivibrator circuits were configured to generate pulses suitable for each mode, and the central processing unit selected the appropriate one according to the required operating mode. A one-shot multivibrator circuit is selected and a pulse signal is applied from the selected circuit to the shift register. However, with such a configuration, when pulse motors with different characteristics are used, the configuration of each one-shift yacht multivibrator circuit must be changed, which requires a great deal of effort in designing and manufacturing. The present invention has been made in view of the above-mentioned points, and an object of the present invention is to provide a control device for a pulse motor for driving a print head, which can employ a common circuit configuration regardless of the characteristics of the pulse motor.

In order to achieve this objective, the present invention includes a storage device in which control mode information is written that matches the operating characteristics of the print head drive pulse motor to be controlled, and a pulse motor that receives clock pulses and counts the number of pulses. a counting device, a comparison device that compares each output of the storage device and the pulse counting device and generates an output when the two match, and a motor control circuit that generates an excitation output of the pulse motor in accordance with the output of the comparison device; The control device includes an address control device that sequentially changes read information of the storage device according to the output of the comparison device.

An embodiment of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, in which PH is a print head driven by a pulse motor M. In FIG. The pulse motor M rotates in response to pulses applied from the shift register SlIR via the drive circuit D. This shift register SHR is configured, for example, as a 4-bit serial shift register, and each bit output is connected to the drive circuit D and each excitation phase of the pulse motor M in a one-to-one correspondence relationship. and,
The shift register SHR receives shift pulses from a comparator COMP that compares the outputs of the pulse counter C and the storage ROM, and a rotation direction signal F/R from a central processing unit (not shown). In this case, the pulse counter C is supplied with a clock pulse from the pulse generator PC and a mode change signal MC from the central processing unit. Also,
Record! The storage device ROM is supplied with the address output of the address control device ADC which follows the comparator COMP and the mode selection signal MC from the central processing unit. In this device, when the stop signal STP is also given, the comparator C
The output transmission of OMP is stopped, and the function of resetting the counter C and shift register SI (R) by applying the initial clear signal 1C is added. 5 shows various print modes of the head by the control device shown in the figure.

First, in FIG. 4, in the case of one character printing mode (1), four pulses are used to move the amount required for printing one character. The interval between each pulse is selected as shown in the figure according to the acceleration characteristics. In order to stabilize the head after this printing operation,
Stay in the same position twice in a row for 0 milliseconds each. Figure 3 shows the case of continuous hitting mode, which is (■), (■), (■
) consists of three modes.

Here, a case where four characters are printed is shown as an example. Then, for the first character, 4 pulses are sent in 20 milliseconds in the first continuous printing mode (■), and for the second character during continuous printing, 4 pulses are sent in 10 milliseconds in the continuous constant speed printing mode (■).
Furthermore, when stopped, 4 pulses are sent every 20 milliseconds in the second continuous printing mode (■). FIG. 4 shows various modes for reversing the head sent in the printing modes of FIGS. 2 and 3.

During this reverse feed, new (■), (■), (■), (■
) mode is added. The first seven characters are sent in reverse feed mode 1 (■) by sending 4 pulses every 20 milliseconds, then the same continuous reverse feed remote as in mode (■) is used to feed one character, followed by high-speed continuous reverse feed. Shift to the first mode (■), switch to a high-speed clock pulse, and send a high-speed pulse. A high-speed pulse is one of 10 pulses of 10 milliseconds. Next, the mode shifts to the second high-speed continuous reverse feed mode (■), and finally, four pulses of the second reverse feed mode (■) are obtained to complete the reverse feed operation of the print head. FIG. 5 shows the pulse sending intervals in each mode I to ■ shown in FIGS. 2 to 4, the data in the storage device ROM (FIG. 3 shows mode selection data for mode switching provided, for example, via a permanent storage device.

As can be seen from this table, the counter C (Fig. 1) that counts pulse signals corresponds precisely to the minimum value of 1.0 ms to the maximum value of 7.5 ms of the pulse interval for phase shift driving. If provided, it would require a counter that can count up to 200 counts within a certain mode. Therefore, it is sufficient to prepare an 8-bit counter. Next, the operation of the apparatus shown in FIG. 1 will be explained. When such data of the storage device ROM and mode selection data from the central processing unit are given, the address counter ADC performs a counting operation in response to the shift clock, and its output 2 bits are sent to the storage device RO.
It is connected to the lower 2 bit lines of the 4-bit address input section of M, and the output of this 2-bit line is the speed information for each step in a series of operation sequences determined by the mode designation.

A mode selection signal for print head operation is also input to the upper two bit lines of the address input section. The output signal of the storage device ROM is read out in accordance with the signal input to the address input section, but as long as the address signal of the storage device ROM does not change, the data of the storage device ROM is held on the output line.

In such a circuit configuration, the counter C performs counting using the clock pulses given from the pulse generator P, but the t comparison is performed only when the data in the storage device ROM and the output signal of the counter C match. A pulse as an output signal of the device COMP is applied to the shift register SHR.

This pulse is the count output signal of the one-round counter and the storage device R.
It is obtained sequentially in proportion to the proportion of coincidence with the OM data. The output signal of the address counter ADC obtained by being supplied with the output of the shift register SHR specifies the address of the storage device ROM using the lower two bits.

Therefore, for example, if the address specified in mode selection starts from O#, each time a pulse arrives, starting from O#, the address is incremented one by one, and the data in the storage device ROM at each address is periodically read. Output to. Since the output signal of the shift register SHR is connected to the drive circuit D and drives the pulse motor M, the pulse motor M rotates step by step in synchronization with the output signal of the shift circuit.

Since the print head is fed in accordance with the step of the pulse motor M, if you specify the drive transfer information of the pulse motor for the next character every time a character is printed, that is, the transfer speed, the character can be printed at the desired speed. Printing becomes possible. As mentioned above, there are four types of printing speed change modes, and when printing is completed according to a certain mode, the speed control mode for the next printing is entered in the mode selection line of the upper 2 bits of address specification in the storage device ROM. By providing information, it becomes possible to control the desired printing speed. In addition to using the data stored in the storage device ROM, the speed control information is
It may be used to control the period of coincidence of the memory ROM data of the comparator COMP with respect to the clock pulses by switching the counting mode of the counter C.

Looking at the operation of this device when it is started and stopped, first, upon startup, when the power is turned on, an initial clear signal 1C is applied to the counter C and the shift register SHR to set the initial state.

Next, regarding stopping, when a stop signal Sll) is applied from the central processing unit CPU, an inhibit gate inserted in the output circuit of the comparator COMP performs a blocking operation to stop the input to the shift register SHR. This causes the pulse motor M to stop rotating. As described above, the present invention stores data regarding each operation mode of the pulse motor for driving the print head in a storage device within the printer, and based on a comparison between this stored information and the count output of clock pulses, data in the storage device is stored. Since the readout is controlled to drive the pulse motor for driving the print head, even if a pulse motor with different characteristics is used, it can be handled without changing the device configuration by simply changing the information stored in the storage device. can.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIGS. 2 to 4 are explanatory diagrams showing each operation mode for printing and reverse feeding of the print head, and FIG. 5 is a block diagram showing an embodiment of the present invention. 1 is a table showing an example of data stored in the storage device in FIG. PG...Pulse generator, C...Counter, ROM/
...Storage device, COMP...Comparison device, SHR...
Shift register duster, D...drive circuit.

Claims (1)

[Claims] 1. A storage device in the printer in which control mode information matching the operating characteristics of the print head driving pulse motor is written, a pulse counting device that receives clock pulses and counts the number of pulses, and the storage device and the pulse counting device. A comparison device that compares each output of the device and generates an output when the two match, a shift register that generates an excitation output for the pulse motor according to the output of this comparison device and a rotation direction signal, and and an address control device that sequentially changes an address at which read information of the storage device is stored in accordance with the output of the comparison device. Pulse motor control device.