JPS6148049A - Check device of mamory-access - Google Patents

Abstract

PURPOSE:To make possible check about both of a logical address and a physical address by providing a selector in a memory access check device judging that predetermined types of accesses are performed or not. CONSTITUTION:In order to have access to a main memory 1, a logical address is stored in a register 2 from a processor and the content thereof is converted into a physical address by an address conversion circuit 3, stored in the physical address 4 and accessed to a predetermined byte. During the time of a control signal is ''1'', the logical address of the register 2 is fed to a comparison circuit 8 by a selector 10. When it is compared with a set address from an address search register 5 and both coincides with each other and an address search mode signal 7 and an access control signal are accesses of writing, a coincidence judging signal 9 is generated. On checking about the physical address, a control signal 11 is made ''0'' and the physical address check in the register 5 is set, and then in the comparison circuit 8, the content of the register 4 is compared with that of the register 5.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention provides a method for performing a preset type of access (a write access or a read access type) to a preset address. The present invention relates to a memory access checking device that determines whether or not a memory access has been accessed.

[Conventional technology]

Figure 1 is a block diagram showing a conventional device. In the figure, (1) is the main memory unit (hereinafter abbreviated as MMU).
, +21 is a cooking address register, +3114 is an address conversion circuit, (41 is a physical address register, (5) is an address search mode, (6) is an access control code, (
7) is the address search mode signal, and (8) is the comparison circuit (
(hereinafter abbreviated as CMP), +91 is an address match determination signal.

In order to access MMU +11, a logical address is output from the processing unit and stored in logical address register 12). The contents of the logical address register (2) are converted into a physical address by the address conversion circuit (31) and stored in the physical address register f41.The physical address is directly connected to the physical location of the unit memory (for example, 1 byte) of N1VLTill Corresponding, you can access the desired byte in MMU ill by physical address.When creating a program,
Since it is troublesome to create a program that specifies a physical address, we create a program that specifies logical addresses by freely considering logical addresses within the program, provided that there are no self-contradictions. Therefore, the physical address output from the processing device is converted into a physical address by the address conversion circuit (31), and then
Used to access U(1).

By the way, there are cases where it is necessary to check memory access to check whether a predetermined access has been made to a predetermined address, and the device shown in FIG. 1 is a memory access check device for this purpose. The operation of the apparatus shown in FIG. 1 will be described using, as an example, a case of checking whether new data has been written to logical address 23200 (that is, whether a store operation has been performed).

In this case, 200 is set in the address search register (5).
The address is set, and a signal corresponding to the store mode is set as the address search mode signal.

Every time data processing is executed and the contents of the logical address register +21 change, the contents are compared with the contents of the address search register (5) in CMP t8+.

When the two match, that is, in the above numerical example, the logical address 23200 is stored in the logical address register +21, and the access control code +61 indicates that the access is for writing (i.e., store operation). 181 outputs a logic "1" signal as address match determination signal +91. When this address match judgment signal (9) becomes logic "1", an interrupt is generated at the end of the execution of the machine instruction currently being executed or the system is stopped to store the data in the 200@ field. can identify the execution of a machine instruction that accessed the

By the way, as is clear from the above explanation about logical addresses and physical addresses, there is no one-to-one correspondence between logical addresses and physical addresses, and the same physical address can be accessed from multiple different logical addresses. It may be necessary to check the physical address of MMU (1) to determine which address of MMU (1) a store operation was performed. However.

The conventional circuit shown in Figure 1 can only check logical addresses, so in order to check physical addresses, an address search is performed in order for all logical addresses that can be converted to the corresponding physical address. It is necessary to set it in register (5) and check it.
However, the disadvantage is that it takes time and effort to reach the corresponding physical address.

[Summary of the invention]

This invention was made in order to eliminate the drawbacks of the conventional ones as described above.In this invention, a selector is provided to select the contents of one register arbitrarily selected from the contents of the processing address register and the contents of the physical address register. CMP
It is now possible to input.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing one embodiment of the present invention.
In the figure, the same reference numerals as in FIG. 1 indicate the same or corresponding parts, U.sub.2 is a selector, and ttU is a control signal. Logical address register (2) and physical address register (4)
The contents of the selector 1101 are controlled by two people (A' signal u
When the logic of II is “1”, the logical address register (2)
When the logic of the control signal (IIJ is "0"), the contents of the physical address register (41) become one input of CMP (8).

Therefore, when the logic of the control signal U is set to "1", the operation of the circuit shown in FIG. 2 is similar to that of the circuit shown in FIG.

When checking memory access to physical address 2000 of MMU (1), set address 2000 in the address search register (5), and when checking store mode access, use the store as the address search mode signal. Set the signal corresponding to the mode. Furthermore, the logic of the control signal (1υ) is set to "0".

The contents of the logical address register (21 change sequentially, and therefore the contents of the physical address register (41 change, 200
0, and when the access control code (61) instructs store (write), the address-bedding fixed signal (9) is output.The subsequent processing is the same as that described with reference to FIG.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to check memory access with respect to physical addresses as well, so it is possible to locate the execution position of a machine instruction that changes the data content of a physical address position within the MMU.
Program debugging can be executed efficiently.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional device, and FIG. 2 is a block diagram showing an embodiment of the present invention. 111...MMU, +21...Logical address register, (3)...Address rhombus conversion circuit, (41...
Physical address register, (5)...Address search register, 18)...CMP, 110+...Selector. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Scope of Claims] A logical address register that stores a logical address output from a processing unit for accessing a main memory, converting the logical address stored in this logical address register into a physical address of the main memory. An address conversion circuit, a physical address register that stores the physical address of the output of this address conversion circuit, an address search register that stores the address to be checked, and inputs the contents of the above logical address register and the contents of the above physical address register and according to the control signal. A selector that outputs one of the inputs; A comparison that outputs an address match judgment signal when the output of this selector matches the contents of the address search register and the access condition to the main memory matches a preset condition. A memory access checking device equipped with a circuit.