JPS6146620U - microcomputer system - Google Patents

microcomputer system

Info

Publication number
JPS6146620U
JPS6146620U JP13241284U JP13241284U JPS6146620U JP S6146620 U JPS6146620 U JP S6146620U JP 13241284 U JP13241284 U JP 13241284U JP 13241284 U JP13241284 U JP 13241284U JP S6146620 U JPS6146620 U JP S6146620U
Authority
JP
Japan
Prior art keywords
microprocessor
data
key
buffer
executing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13241284U
Other languages
Japanese (ja)
Inventor
隆 岩下
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP13241284U priority Critical patent/JPS6146620U/en
Publication of JPS6146620U publication Critical patent/JPS6146620U/en
Pending legal-status Critical Current

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  • Power Sources (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示すブロック図、第2図a,
bはキーボード入力ルーチンの処理フローを示す図で
あり、それぞれ従来例、本考案実施例に相当する。 11・・・マイクロプロセッサ、12・・・メモリユニ
ット、121・・・キーインバッファ、13・・・タイ
マLSI、14・・・直並列変換回路。
Figure 1 is a block diagram showing an embodiment of the present invention, Figure 2 a,
b is a diagram showing a processing flow of a keyboard input routine, which corresponds to a conventional example and an embodiment of the present invention, respectively. DESCRIPTION OF SYMBOLS 11... Microprocessor, 12... Memory unit, 121... Key-in buffer, 13... Timer LSI, 14... Serial-to-parallel conversion circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] HALT命令実行によりパワーセ゜−ブがなされるマイ
クロプロセッサと、シリアルデータ転送路を介して供給
されるキー人力データが取込まれるキーインバツファ払
上記マイクロプロセッサに対し定時間間隔にて割込みを
発するタイマLSIと、上記キーインバツファにおける
データの有無をチェックするマイクロプロセッサ中の手
段と、この手段によるチェックの結果データの存在が確
認されたときその内要を取込むマイクロプロセッサ中の
手段と、上記キーインバッファにデータが存在しない、
いわゆるキー人力待ち時、あらかじめ挿入された}IA
LT命令を実行するマイクロプロセッサ中の手段と、こ
の命令実行によりHALT状態にされたプロセッサユニ
ットを上記タイマ割込みにより解除するマイクロプロセ
ッサ中の手段とを備えて成ることを特徴とするマイクロ
コンピューシステム。
A timer LSI that issues interrupts at fixed time intervals to a microprocessor whose power is saved by executing a HALT command, and a key-in buffer that receives key manual data supplied via a serial data transfer path. a means in the microprocessor for checking the presence or absence of data in the key-in buffer; a means in the microprocessor for fetching the content when the presence of data is confirmed as a result of the check by this means; There is no data in
}IA inserted in advance when waiting for so-called key human power
A microcomputer system comprising means in a microprocessor for executing an LT instruction, and means in the microprocessor for releasing a processor unit put into a HALT state by the execution of this instruction by means of the timer interrupt.
JP13241284U 1984-08-31 1984-08-31 microcomputer system Pending JPS6146620U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13241284U JPS6146620U (en) 1984-08-31 1984-08-31 microcomputer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13241284U JPS6146620U (en) 1984-08-31 1984-08-31 microcomputer system

Publications (1)

Publication Number Publication Date
JPS6146620U true JPS6146620U (en) 1986-03-28

Family

ID=30690979

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13241284U Pending JPS6146620U (en) 1984-08-31 1984-08-31 microcomputer system

Country Status (1)

Country Link
JP (1) JPS6146620U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5368051A (en) * 1976-11-29 1978-06-17 Sharp Corp Integrated circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5368051A (en) * 1976-11-29 1978-06-17 Sharp Corp Integrated circuit device

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