JPS6145421B2 - - Google Patents
Info
- Publication number
- JPS6145421B2 JPS6145421B2 JP56093465A JP9346581A JPS6145421B2 JP S6145421 B2 JPS6145421 B2 JP S6145421B2 JP 56093465 A JP56093465 A JP 56093465A JP 9346581 A JP9346581 A JP 9346581A JP S6145421 B2 JPS6145421 B2 JP S6145421B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- multiplication factor
- apd
- equation
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000015556 catabolic process Effects 0.000 claims description 10
- 101150098161 APD1 gene Proteins 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000004043 responsiveness Effects 0.000 description 2
- 230000003042 antagnostic effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/691—Arrangements for optimizing the photodetector in the receiver
- H04B10/6911—Photodiode bias control, e.g. for compensating temperature variations
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Light Receiving Elements (AREA)
- Control Of Amplification And Gain Control (AREA)
- Optical Communication System (AREA)
Description
【発明の詳細な説明】
本発明は、アバランシエ・フオトダイオードの
増倍率の自動制御回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic control circuit for the multiplication factor of an avalanche photodiode.
アバランシエ・フオトダイオード（以下APD
という）は、可変の増倍率を持つので、光信号の
受信素子として重用される。APDの増倍率はア
ンプのゲインとともに、フイードバツク制御によ
り自動的に調節され、受信信号のレベルが所望の
値に維持されるようになつている。 Avalanche photodiode (APD)
) has a variable multiplication factor, so it is frequently used as a receiving element for optical signals. The multiplication factor of the APD and the gain of the amplifier are automatically adjusted by feedback control to maintain the level of the received signal at a desired value.
従来は、光信号の入力範囲を２分して、入力信
号が微弱な下半分においては、アンプのゲインを
高ゲインに固定しつつAPDの増倍率をフイード
バツク信号に従つて変化させ、入力信号がそれよ
り大きい上半分においては、APDの増倍率を固
定してアンプのゲインをフイードバツク信号によ
つて変化させるようにしている。 Conventionally, the input range of the optical signal is divided into two, and in the lower half where the input signal is weak, the gain of the amplifier is fixed at a high gain and the multiplication factor of the APD is changed according to the feedback signal. In the upper half, which is larger than that, the multiplication factor of the APD is fixed and the gain of the amplifier is changed by the feedback signal.
受信信号のSN比を最良に保つために、APDの
増倍率の値には、入力信号のレベルに応じた最適
値があるが、上記のような従来例によれば、増倍
率は入力信号の全範囲において常に最適値に一致
させることはできないので、SN比との関連で許
容入力範囲は制限されたものとなる。また、入力
信号が微弱なほど、増倍率を上げようとしてバイ
アス電圧を高めるので、入力信号が零になつたと
き、バイアス電圧はブレークダウン電圧を越えて
てしまうおそれがあり、それを防ぐために何んら
かの保護手段が必要とされる。また、フイードバ
ツク制御は、アンプの出力に基づいて行われるの
で、制御点とその制御効果の検出点の間に少なか
らぬ遅れ要素が介在することになり、制御の即応
性に劣るものとなる。 In order to maintain the best signal-to-noise ratio of the received signal, the value of the APD multiplication factor has an optimal value depending on the level of the input signal, but according to the conventional example described above, the multiplication factor depends on the input signal level. Since it is not possible to always match the optimum value over the entire range, the allowable input range is limited in relation to the SN ratio. Also, the weaker the input signal is, the higher the bias voltage is to increase the multiplication factor, so when the input signal becomes zero, there is a risk that the bias voltage will exceed the breakdown voltage. protection measures are required. Furthermore, since the feedback control is performed based on the output of the amplifier, there is a considerable delay element between the control point and the detection point of the control effect, resulting in poor control responsiveness.
本発明の目的は、APDの増倍率が常に入力信
号に応じた最適値に保たれ、APDのバイアス電
圧がブレークダウン電圧を越えることがなく、か
つ、制御の速応性にすぐれたAPD増倍率の自動
制御回路を提供することにある。 It is an object of the present invention to maintain the APD multiplication factor at an optimal value according to the input signal, to prevent the APD bias voltage from exceeding the breakdown voltage, and to maintain the APD multiplication factor with excellent control responsiveness. The purpose of this invention is to provide an automatic control circuit.
本発明は、APDと抵抗とで直列回路を形成
し、この直列回路への印加電圧をAPDのブレー
クダウン電圧に等しくするとともに、抵抗におけ
る電圧降下を印加電圧に比らべて十分小さくする
ようにしたものである。 The present invention forms a series circuit with an APD and a resistor, makes the voltage applied to this series circuit equal to the breakdown voltage of the APD, and makes the voltage drop across the resistor sufficiently small compared to the applied voltage. This is what I did.
以下、図面によつて本発明を詳細に説明する。
第１図は、本発明実施例の概念的構成図である。
第１図において、１はAPD、２は抵抗、３は交
流結合用のコンデンサ、４はアンプである。
APD１と抵抗２は直列に接続され、この直列回
路の両端に一定電圧ＶCが印加される。APD１の
出力電流ｉpによる抵抗２の電圧降下の交流分
が、コンデンサＣを通じてアンプ４に入力され
る。アンプ４の出力信号は、次段の信号処理回路
（図略）に与えられる。アンプ４のゲインは、必
要に応じて自動調節するようにしてもよい。 Hereinafter, the present invention will be explained in detail with reference to the drawings.
FIG. 1 is a conceptual block diagram of an embodiment of the present invention.
In FIG. 1, 1 is an APD, 2 is a resistor, 3 is a capacitor for AC coupling, and 4 is an amplifier.
APD1 and resistor 2 are connected in series, and a constant voltage V C is applied to both ends of this series circuit. An alternating current component of the voltage drop across the resistor 2 due to the output current i p of the APD 1 is input to the amplifier 4 through the capacitor C. The output signal of the amplifier 4 is given to a next-stage signal processing circuit (not shown). The gain of the amplifier 4 may be automatically adjusted as necessary.
APD１のアソードとカソードの間には
Ｖ＝ＶC−ｉpＲ (1)
のバイアス電圧が印加され、この電圧によつて定
まる増倍率Ｍで出力電流ｉpが得られるから
ｉp＝Mip (2)
ただし、ｉp…Ｍ＝１のときの出力電流
増倍率Ｍとバイアス電圧Ｖの関係は、次式で与
えられ
これを図示すれば、第２図のようになる。ここで
ＶBはブレークダウン電圧であつて、例えば150V
程度のものである。また、ｍは定数で、例えば
0.2である。 A bias voltage of V=V C −i p R (1) is applied between the anode and cathode of APD1, and since the output current i p is obtained with the multiplication factor M determined by this voltage, i p = Mi p (2) However, when i p ...M=1, the relationship between the output current multiplication factor M and the bias voltage V is given by the following equation. This is illustrated in Figure 2. Here, V B is the breakdown voltage, for example 150V
It is of a certain degree. Also, m is a constant, for example
It is 0.2.
増倍率Ｍには、受信信号のSN比を最良に保つ
ために、入力信号のレベルに応じた最適値ＭOPT
があり、次式の関係があることが知られている。 The multiplication factor M is set to an optimal value M OPT according to the level of the input signal in order to maintain the best signal-to-noise ratio of the received signal.
It is known that there is a relationship as shown below.
ただし、ｘ…過剰雑音指数（〓0.2）
(4)式の関係を(2)式に入れると
なる関係が得られるので、この(5)式の関数を満足
すれば、増倍率は最適値ＭOPTになるといえる。 However, x...excess noise figure (〓0.2) If we put the relationship in equation (4) into equation (2), Since the following relationship is obtained, it can be said that if the function of equation (5) is satisfied, the multiplication factor becomes the optimal value M OPT .
(2)式と(3)式から、
ｉp〔１−（Ｖ／ＶＢ）m〕＝ｉp (7)
(7)式に(1)式を代入すると、
∴ｉp｛１−（ＶＣ−ｉｐＲ／ＶＢ）m｝＝ｉp (8)
電圧ＶCをブレークダウン電圧ＶBに等しく選ら
ぶと、
ｉp｛１−（１−ｉｐＲ／ＶＢ m｝＝ｉp (9)
APD１をＭ≫１の状態で使用するため、ｉpＲ
≪ＶBとすると、(9)式は級数展開した式によつて
近似でき、実用上十分な精度で次式の関係が成立
する。 From equations (2) and (3), i p [1-(V/V B ) m ] = i p (7) Substituting equation (1) into equation (7), ∴ip { 1-(V C - i p R/V B ) m }= ip (8) If the voltage V C is chosen equal to the breakdown voltage V B , then i p {1-(1- ip R/V B m }=i p (9) APD1 with M≫1. For use in the state, i p R
If <<V B , equation (9) can be approximated by a series-expanded equation, and the relationship of the following equation holds with sufficient accuracy for practical use.
ｉp（ｍｉｐＲ／ＶＢ）＝ｉp (10)
すなわち
(12)式と(5)式を比較すると、(5)式のｘを無視し
たものが、(12)式となつている。ここでｘは１に
比らべて小さな値（〓0.2）であるから、(5)式の
指数はほぼ1/2と考えてよい。このため(12)式
は、増倍率の最適値ＭOPTを与える条件にほぼ一
致し、第１図の回路は、APD１の増倍率Ｍを、
事実上最適値に保つものとなる。 i p (mi p R/V B )=i p (10) i.e. Comparing equation (12) and equation (5), equation (12) is obtained by ignoring x in equation (5). Here, since x is a small value (〓0.2) compared to 1, the exponent of equation (5) can be considered to be approximately 1/2. Therefore, equation (12) almost matches the conditions for giving the optimal value M OPT of the multiplication factor, and the circuit of FIG.
This effectively maintains the optimum value.
なお、ブレークダウン電圧ＶBは温度特性を持
つので、それにかかわらず(9)式を独立させるため
には、電圧ＶCに同様な温度特性を持たせればよ
い。また、増倍率の最適値ＭOPTは温度依存性が
あるので、(4)式と(5)式には温度の項が含まれる。
このような温度の項は、(1)式の抵抗Ｒに適宜の温
度特性を持たせ、それとＶBの温度特性との組合
わせによつて形成することができる。 Note that since the breakdown voltage V B has temperature characteristics, in order to make equation (9) independent regardless of this, it is sufficient to make the voltage V C have similar temperature characteristics. Furthermore, since the optimum value M OPT of the multiplication factor is temperature dependent, equations (4) and (5) include a temperature term.
Such a temperature term can be formed by giving the resistor R in equation (1) an appropriate temperature characteristic and combining it with the temperature characteristic of V B.
以上のように、本発明は、APDと電流検出抵
抗とで直列回路を形成し、この直列回路への印加
電圧をAPDのブレークダウン電圧に等しくする
とともに、電流検出抵抗における電圧降下を印加
電圧に比らべて十分小さくするようにした。 As described above, the present invention forms a series circuit with an APD and a current detection resistor, makes the voltage applied to this series circuit equal to the breakdown voltage of the APD, and reduces the voltage drop across the current detection resistor to the applied voltage. I tried to make it sufficiently small in comparison.
このため、本発明によれば、APDの増倍率が
常に入力信号に応じた最適値に保たれる。また抵
抗の電圧降下による拮抗作用のため、APDのバ
イアス電圧は、ブレークダウン電圧を越えること
がなく、さらに、自己バイアスによるものである
から、制御点とその制御効果の検出点の間には遅
れがなく、増倍率の制御の速応性がすぐれてい
る。 Therefore, according to the present invention, the multiplication factor of the APD is always maintained at the optimum value according to the input signal. Furthermore, due to the antagonistic effect caused by the voltage drop of the resistor, the bias voltage of the APD never exceeds the breakdown voltage, and furthermore, because it is self-biased, there is a delay between the control point and the point where the control effect is detected. It has excellent quick response in controlling the multiplication factor.
第１図は、本発明実施例の概念的構成図、第２
図は、APDの増倍率の特性図である。
１…APD、２…抵抗、３…コンデンサ、４…
アンプ。
Fig. 1 is a conceptual configuration diagram of an embodiment of the present invention;
The figure is a characteristic diagram of the multiplication factor of APD. 1...APD, 2...Resistor, 3...Capacitor, 4...
Amplifier.
Claims (1)
イオードに直列に接続されその出力電流による電
圧降下が前記ダイオードのブレークダウン電圧よ
り十分小さくなるように値が設定された抵抗と、
これらダイオードと抵抗の直列回路に前記ブレー
クダウン電圧に等しい電圧を印加する電源とを具
備するアバランシエ・フオトダイオードの増倍率
自動制御回路。1 an avalanche photodiode, a resistor connected in series with the diode and having a value set such that the voltage drop due to the output current is sufficiently smaller than the breakdown voltage of the diode;
A multiplication factor automatic control circuit for an avalanche photodiode, comprising a power supply that applies a voltage equal to the breakdown voltage to a series circuit of these diodes and a resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56093465A JPS57207449A (en) | 1981-06-17 | 1981-06-17 | Automatic controlling circuit for multiplication factor of avalanche photo diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56093465A JPS57207449A (en) | 1981-06-17 | 1981-06-17 | Automatic controlling circuit for multiplication factor of avalanche photo diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57207449A JPS57207449A (en) | 1982-12-20 |
| JPS6145421B2 true JPS6145421B2 (en) | 1986-10-08 |
Family
ID=14083077
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56093465A Granted JPS57207449A (en) | 1981-06-17 | 1981-06-17 | Automatic controlling circuit for multiplication factor of avalanche photo diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57207449A (en) |
-
1981
- 1981-06-17 JP JP56093465A patent/JPS57207449A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57207449A (en) | 1982-12-20 |
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