JPS6143787A - Crt display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a CR'r (cando ray tube) display device.

For example, regarding a system in which displays, input devices, etc. are controlled by a microcomputer, Japanese Patent Laid-Open No. 5
It is shown in No. 3-125732.

(First country filing date: April 6, 1972) An object of the present invention is to provide a CR'r display device having a high-speed dual display function.

The basic structure of the present invention is a CRT display that enables fast operation by dividing and storing information corresponding to pixels or dots in each brane (plane) of the pattern memory of the digit brane. It is a decoration.

By the way, when using a CRT display device to enjoy home video games, it must be compatible with a color television receiver in the home. The color television system in Japan is the NTSC system, which is a color camera that carries output signals of the three primary colors (R, G, and B). It converts them into signals R-Y and B-Y and conveys them.

Therefore, the conventional RGB type display device cannot be used for ordinary home color television viewing. In addition, it is necessary to change the color complexity depending on the game content, etc., but with conventional CRT display devices, the display color is limited to a fixed type (including normal days, s2fi), which is a drawback. There is.

FIG. 1 is a block diagram showing the basic configuration conceived by the inventor.

1 is a central processing bag filicPU, 2 is a refresh pattern memory PM connected to the CPU via a data bus line (8 bits), and each pattern data stored in the pattern memory consists of a 6-bit character designation code and 2 bits. It consists of a color code. Among the codes output from memory PM to register CRoc, the character specification code specifies the address of an arbitrary character in the character generator (not shown), and is 64
You can specify the character of the species. Further, the color code specifies the V base of the four types of color registers.

3 is a decoder that decodes the color code and, based on the decoding result, can send information stored in one color register to the color controller.

4- and 4-4 are color specification registers, respectively.
Color designation information can be programmed into the program. Each register can specify one type of color, so after preparing a total of 4 m of color information, any one of the four types of color information is sent to the color controller 5 by a signal from the decoder 3. However, each register is assigned a color code as shown in FIG. That is, the bits from 0 to 6 are M (masenda), B (blue), G (green), and Y (yellow).

The primary colors of C (cyan), Q (orange), and R (red) are assigned to the VC, and when displaying a character in M (masenda), for example, bit 0. set to 1”,
The other six bits are set to "0'°.

Similarly, when displaying a character in B (blue), bit 2 is set to 1'' and the other six bits are set to 0''. In other words, set the focus corresponding to the color you want to display to 1". Also, bit 7 is the bit that gives the brightness signal, and if it is here or n 1u, it will be white, and +
If +0+1, it becomes black.

FIG. 3 shows a specific example of color designation. When displaying a simple primary color, the bit corresponding to that color is set to ++Ill, and all other bits, including the bit providing the luminance signal, are set to "0°°."

By the way, as shown in the same figure (cl), if the bit that gives the luminance signal and the bit that specifies the primary color are set to 1, the color that is a lighter version of the primary color (red in this example) (light red in this example), i.e. It is possible to display a color that is a mixture of primary colors and white.And, as shown in tel in the same figure, all bits are O at 5.
′, there is no light, that is, it is black.

In this example, it is possible to obtain a thin knife with 7 primary colors and 7 primary colors mixed with white, that is, 14 A1 class colors, depending on the content of the home video game. There are 14 colors to choose from, which is extremely rich. Also,
By converting one bit of the color register to a bit that provides a brightness signal, a black and white display can be made, so a black and white television receiver can be used to play home video games. In other words, it is also possible to connect it to a black and white television receiver.

5 is a color controller which converts the color information from the color specification register into a luminance signal Y, two color difference F numbers R, -Y,
This converted signal is sent to a home color television receiver as a video signal.

When this CB, T display device is used for a home video game, color information to be displayed is written into the color designation registers 4-1 to 4-4 by a program prior to the start of the game. For example, white for register 4-, green for register 4-2, orange for register 4-3, and orange for register 4-2.
-4 is called Masenda.

Then, one character in the character generator is specified by the 6-bit information of the pattern data read out from the refresh pattern memory.
In addition to generating a character signal, one of the four color specification registers 4-0 to 4-2 is selected based on the 2-bit information of the pattern data, and the color information stored therein is sent to the color controller. 5.

This allows characters to be displayed in any color.

FIG. 4 shows the color specification registers 4-1 to 4-1 and the color controller 5.

Inverter 1.2 and NAND circuit NANDv 1 to 4 constitute the decoder circuit 3, and this decoder circuit 3 has a refresh pattern memory PM.
2-bit color code b0 read from 2,
b, is applied. 6 is a selector that selects the register to be written when writing color information to the color specification register, and has four 7-lip 70-tubes F-Fl-F.
-F4 and inverter I. It is configured by v3 to Iov6.

Each of the color specification registers 4-1 to 4-4 has its own color specification register. 8 input terminals that receive color data from 708 data buses, selection terminals ~IN, writing WJli Ol, J terminals CP and Q. Naishino, 08
It has 2 output terminals. The corresponding output terminals of each register 4-1 to 4-4 are commonly connected (not shown)
has been done.

Switch SW to write color data.

Inverter I by operation. When the outputs of 1 and 3 become logic 1, register 4-4 becomes high, and this register 4
An 8-bit color code is input to -1 from the data bus (Do input). Similarly, by sequentially operating switches SW to SW4, data is transferred from the data bus to register 4-.
,．． 4-,. 4-.

A color code is input for each K.

Reading of color codes from registers 4-1 to 4-4 is controlled by decoder circuit 3.

Registers 4-4 to 4- are selected when the logic value of the tt6 selection terminal 11vuJ becomes 0, and the respective output terminals Q. to Q, producing an output signal. For example, if the output of register CR, bo is 0.0, NAND circuit RNAANDI is selected, and this 1g! Only the output of NAND1 becomes a logic 0.

Since the output line of NANDl is connected to the register 4-4, an output signal appears on the commonly connected output line from the register 4-4. Similarly, terminal bI.

For the input signals 01, 10.11 of bo, registers 4-1, 4-, . 4-, is selected. Note that the output terminal Q of the color specification register. The bit configuration in Q7 through Q7 corresponds to bits O through Q7 in FIG.

The color controller 5 can be roughly divided into a matrix circuit section and a level conversion resistor dividing circuit.

NOR circuit N0RI~N0R6, inverter I 14n
■ ~ Engineering 17. AND circuit NAND6~NAND? .

7 to 13 are gate circuits which constitute a color matrix circuit. +R1 to R2 are resistors which constitute a level conversion resistor dividing circuit.

The color controller 5 receives the output of the selected register 4-1 to 4-4 and the burst signal BR3T.

Synchronization signal 5YNC, blanking signal BLANK.

It receives the supply signals Va and Vφ, and receives the luminance signal Y and color difference signal R.
-Y, BY is output.

As shown, the output of the color controller 5 is applied to the &-jf adjuster. A color video signal suitable for home T2 receivers can be obtained from this modulator.

The circuit configuration can be simplified by using an oven collector type gate as shown in FIG.

In FIG. 5, the Noah gates N0RI to N.

Open collector transistor Q due to the signal from R6
is turned on, one end of the resistance divider circuit is grounded, and the divided voltage is output as a color difference signal. Level conversion is performed by changing the voltage division ratio depending on which open collector transistor is turned on.

FIG. 6 is a block diagram showing an embodiment of the present invention.

This embodiment is a video system in which the pattern memory PM stores the pattern itself, and a one-time color code for selecting one of four color specification registers or a two-dimensional pattern memo according to the pattern shape. IJK
Naturally, two sets of pattern memories are required.

That is, one color designating decoder is selected via the decoder 3 based on 2-bit pattern data taken out from the two sets of pattern memories. Therefore, the information in which a set of 2 bits is stored in the two pattern memories is both pattern information and color information. The present invention is also applicable to CRT display devices of such video systems.
-f can be done.

In this way, the present invention can be carried out in 81 different modes, and in any of the modes, a plurality of color specification registers are provided in which the color specification signal can be freely rewritten, and the color code from the pattern memory is Since one of a plurality of color designation registers can be selected based on the color specification register, the type of color of the displayed character can be freely set according to the game content.

Also, the information from the color designation register is converted into a level using a color controller, and a brightness signal Y is generated.

Since the color difference signals R-Y and B-Y can be easily generated, it can be applied to home television receivers.

In particular, when allocating bits of color specification information,
One bit is assigned to the luminance signal information and the other bit is assigned to the primary color signal information, so by displaying only the child characters of the luminance signal, it can be used on CR and T displays without any problems on black and white television receivers. equipment can be applied. Furthermore, when playing games on a color television receiver, the combination of the luminance signal and the color signal of the primary color can produce a color that is a diluted primary color (mixing white with the primary color), doubling the number of color lines. do.

In the color controller as well, the circuit configuration can be extremely simplified by configuring the gate that changes the voltage division ratio of the level conversion resistor voltage divider circuit with an open collector transistor.

The present invention can be applied to CRT display devices in general, such as display interfaces in microcomputer kits, graphic displays/systems, home video game devices, and the like.

[Brief explanation of drawings]

Figures 1 to 5 are part-time explanations of examples of CRT displays devised by the Ministry of the Invention. Figure 4 is a circuit diagram showing a color designation register and color controller, and Figure 5 is a circuit diagram of a resistor dividing circuit for level conversion. Fig. 6 is a block diagram showing the basic configuration of an embodiment of the present invention.I1-17...Inverter circuit, NAND1-v9...NAND circuit, N0RI-6...NOR circuit, R
2-R1゜...Resistance, Q1~Q, transistor, AN
DI~4...AND circuit, 1...CPU, 2,2. ．．
2□...Pattern memory pNl, 3...Decoder, 4
-2 to 4-4...Color specification register, 5...Color controller, 6...Selector for register selection when writing color specification information.

Claims (1)

[Claims] a plurality of first memory cells each storing color information and brightness information;
and a second storage means for storing information to be displayed, wherein the first storage means is selectively selected from the plurality of first storage means according to a code read from the second storage means. A CR characterized in that the pattern is displayed on a CRT screen in a color according to the selected color information and brightness information of the selected first storage means.
T display device.