JPS6035783A - Ctr display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a CRT (Cathode Ray Cheve) display device.

For example, regarding a system in which displays, input devices, etc. are controlled by a microcomputer, Japanese Patent Laid-Open No. 5
No. 3-125732.

(First country filing date: April 6, 1972) An object of the present invention is to provide a CRT display device having a high-speed image display function.

The basic structure of the present invention is a CRT display device that enables high-speed operation by dividing and storing information corresponding to a pixel or dot in each plane (plane) of a plurality of planes of pattern memory.

By the way, when using a CRT display device to enjoy home video games, it must be compatible with a color television receiver in the home. The color television system in Japan is the NTSC system, which does not carry the output signals of the three primary colors (R, G.B) from a color camera, but instead transmits the output signals into one luminance signal Y and two color difference signals R. -Y, B-Y and transport it (
・Ru.

Therefore, a conventional RGB type display device cannot be used in an ordinary home color television receiver. In addition, the types of colors need to be changed depending on the game content, etc., but conventional CRT display devices have the disadvantage that the display colors are limited to a certain number of types (eight types including normal days). be.

FIG. 1 is a block diagram showing the basic configuration conceived by the inventor.

1 is the central processing unit CPU, 2 is the data nox line (8
Each pattern data stored in this pattern memory consists of a 6-bit character designation code and a 2-bit color code. Among the codes read from memory PM to register CR, the character specification code specifies the address of an arbitrary character in a character generator (not shown), and can specify 64 types of characters. . Further, the color code specifies the addresses of four types of color registers.

3 is a decoder that decodes the color code and, based on the decoding result, can send information stored in one color register to the color controller.

4-1 to 4-4 are color specification registers, respectively.
Color specification information can be written by a program. Since each register can specify one type of color, a total of four types of color information are prepared, and any one of the four types of color information is sent to the color controller 5 by a signal from the decoder 3. However, each register is assigned a color code as shown in FIG. That is, the bits from 0 to 6 are M (masenda), B (blue), G (green), and Y (yellow).

It is assigned to the primary colors of C (cyan), 0 (orange), and R (red). For example, when displaying a character in M (macenter), bit O is set to '1'', and the other six Let it be a bit NOI+.

Similarly, when displaying a character in B (blue), set upper bit 2 to fl II+, and set the other 6 bits to °
Set to '0''. In other words, set the bit corresponding to the color to be displayed to 1''.
is a bit that provides a brightness signal, and if the car is ``1'', it becomes white, and if it is 0'' (1, it becomes black).

FIG. 3 shows a specific example of color designation. When displaying a simple primary color, the bit corresponding to that color is set to 1'', and all other bits, including the bit that provides the luminance signal, are set to 0''.

By the way, as shown in the same figure (cl), if the bit that gives the luminance signal and the bit that specifies the primary color are set to 1, the primary color (red in this example) is lightened (light red in this example)' In other words, white is mixed with the primary color, so that a one-color display is possible.In the case of tlQ'l+, there is no light, that is, black, as shown in Figure (e).

According to this example, it is possible to obtain seven primary colors and pale colors of the seven primary colors by mixing each primary color with white, that is, 14 types of colors, which can be selected depending on the content of the home video game. The colors are extremely rich with 14 colors. Furthermore, by setting one bit of the color register as a bit that provides a luminance signal, a black and white display can be achieved, so that home video games can be played on a black and white television receiver. In other words, consistency with black and white television receivers can be achieved.

5 is a color controller which converts the color information from the color specification register into a luminance signal Y, two color difference signals R, -Y,
This converted signal is sent to a home color TV/vision receiver as a video signal.

When this CI (T display device is used for a home video game), prior to the start of the game, the program displays color information in the color specification registers 4-, 4-4 and writes the desired color information.For example, in the register 4-1, White, green for register 4-2, orange for register 4-8, macenda for register 4-4, and so on.

Then, one character of the character generator is specified by the information of 6 bits 7) of the pattern data read out from the refresh pattern memory, and a character signal is generated, and 2 bits of the pattern data are Based on this information, one of the four color specification registers 4-1 to 4-1 is selected and the color information stored therein is sent to the color controller 5.

This allows characters to be displayed in any color.

FIG. 4 shows the color specification registers 4-1 to 4-4 and the color controller 5.

Inverter I n v 1 + 2 and NAND circuit N
A, N D1 to D4 are gate signals constituting the decoder circuit 3, and a 2-bit color code b read from the fresh pattern memory PM2 in the decoder circuit 3. +l) I is applied. 6 is a selector that selects the register to be written when writing color information to the color specification register;
It is composed of F1 to F-F4 and inverters 3 to 1nv6.

v Each of the color specification registers 4-1 to 4-4 is different. 8 input terminals for receiving color data from 708 data buses, a selection terminal MN, and write control terminals CP and Q. It has eight output terminals from Q7 to Q7. Corresponding output terminals of the respective registers 4-2 to 4-4 are commonly connected (not shown).

In order to write color data, when the output of inverter Inv3 becomes logic 1 by operating switch SW1, registers 4-4 are selected, and 8-bit data is sent from the data bus (Do or DI) to this register 4-4. Please enter the color code. Similarly, by sequentially operating switches SW2 to SW4, data is transferred from the data bus to register 4-3.4-.
2.4-.

A color code is entered for each.

Reading of color codes from registers 4- to 4-4 is controlled by decoder circuit 3.

Registers 4-1 to 4-4 are connected to selection terminals 1't1. I
``When the logical value of J becomes 0, each is selected,
Each output terminal Q. Q7 produces an output signal. For example, register CIt. If the outputs of
Only the output of 1 will be a logic 0.

Since the output line of NAND] is connected to the register 4-4, an output signal appears on the commonly connected output line from the register 4-4. Similarly, the terminal bl.

b, for input signals 01, 10.11 of registers 4-, . 4-2.4- is selected. Note that the output terminal Q of the color specification register. The bit configuration in Q7 corresponds to bits O to Q7 in FIG.

The power 2-controller 5 can be roughly divided into a matrix circuit section and a level conversion resistor divider circuit.

NOR circuit N0RI~N0R6-inverter I, v14~
■nv17. AND circuit NAND6~NANDwa.

(2) nv7 to (1) ov13 are gate circuits constituting a color matrix circuit, and R1-R1 are resistors constituting a level conversion resistor dividing circuit.

The color controller 5 receives the output of the selected register 4-1 to 4-4 and the burst signal BR8T.

Synchronization signal 5YNC, blanking signal BLANK.

Receiving control signals VB, V, luminance signal Y and color difference signal R
-Y, BY is output.

Although not shown, the output of the color controller 5 is applied to a modulator. A color video signal suitable for home TV receivers is obtained from this modulator.

If oven collector type gates are used as the inverters 17 to Inv13 for feeding the color difference signals R-Y and B-Y, as shown in FIG. 5, the circuit configuration can be simplified.

In Figure 5, Noah gates NO11,1 to N0R
6, the oven collector transistor Q1
is turned on, one end of the resistance divider circuit is grounded, and the voltage divided based on this is output as a color difference signal. Level conversion is performed by changing the voltage division ratio depending on which oven collector transistor is turned on.

FIG. 6 is a block diagram showing an embodiment of the present invention.

This embodiment is a video system in which the pattern memory PM stores the pattern itself, and when one of the four color specification registers is selected, the color code of T is displayed on the plane according to the pattern shape. The patterns are stored in the pattern memories, and naturally two sets of pattern memories are required.

That is, one color designation decoder is selected via the decoder 3 based on the 2-bit pattern data taken out from the two sets of pattern memories. Therefore, the information in which a set of 2 bits is stored in the two pattern memories is both pattern information and color information. The present invention can also be applied to a CRT display device of such a video system.

As described above, the present invention can be implemented in various embodiments, but in any embodiment, a plurality of color specification registers that can freely rewrite color specification signals are provided,
Since one of a plurality of color specification registers can be selected based on the color code from the pattern memory, the type of color of the displayed character can be freely set according to the game content.

In addition, the information from the color designation register is level-converted using a color controller, and a luminance signal Y is generated.

Since the color difference signals R-Y and B-Y can be easily generated, it can be applied to home television receivers.

In particular, when allocating bits of color specification information,
One bit is allocated to the luminance signal information and the other bits are allocated to the primary color signal information, so by displaying characters only with the luminance signal, CRT display devices can be used without any problems on black and white television receivers. can be applied. In addition, when playing games on a color television receiver, by combining the luminance signal and the primary color signal, it is possible to obtain a diluted primary color by mixing white with the primary color, doubling the number of colors. .

In the color controller as well, the circuit configuration can be extremely simplified by configuring the gate that changes the voltage division ratio of the I-noil conversion resistor voltage divider circuit with an open collector transistor.

The present invention can be applied to CRT display devices in general, such as display interfaces in microcomputer kits, graphic display systems, home video game devices, and the like.

[Brief explanation of drawings]

Figures 1 to 5 are for explaining an example of a CRT display devised by the inventor. Figure 1 is a block diagram showing the basic configuration, and Figure 2 is a diagram showing the bit allocation of color specification information. 3(a) to 3(el) are diagrams showing examples of color designation, FIG. 4 is a circuit diagram showing a color designation register and a color controller, and FIG. 5 is a circuit diagram of a resistance dividing circuit for level conversion. FIG. 6 is a block diagram showing the basic configuration of an embodiment of the present invention. 11-17... Inverter circuit, NANDI-LV 9... NAND circuit, N0RI-6... NOR circuit, R.- R8゜...Resistance, Q, ~Q? Transistor, AN
D1-4...AND circuit, 1...CPU, 2,2.
．． 22... Pattern memory PM, 3... Decoder,
4-1 to 4-4...Color designation register,...Color controller, 6...Selector for register selection when writing color designation information.

Claims (1)

[Claims] 1. Information corresponding to a single pixel is divided and stored in a plurality of pattern memories, and each piece of information is read out and displayed substantially simultaneously. C'R
T display device. 2. The CRT display device described in the patent, wherein the information corresponding to the single pixel is color information.