JPS6143342A - Microprogram controller - Google Patents

Abstract

PURPOSE:To decrease the number of steps of a microprogram for diagnosis which requires a large amount of data within a RAM, by reading out the data having large width of the address different from that of a microinstruction that indicates the read-out a constant inside a control memory. CONSTITUTION:When a microprogram of a type as shown in a figure is stored in a reading register 1, the contents of the 1st CMD field CMD1 are decoded by the 1st decoder 6 and the control signal is produced for the periphery circuit of a control memory 1. In case the contents of the CMD1 indicates the microinstructions of the following addresses, the decoder 6 performs control so that an address switch 3 selects the output of a register 5. While the decoder 6 performs control so that the switch 3 selectes the output of an ARG field of the register 2 in case the contents of the CMD1 indicates a branching action.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a microprogram control device used in a data processing device.

(Prior Art) The reading, interpretation, and execution of software instructions in data processing devices are classified into dozens of basic operation combinations, such as information transfer between registers, operation commands to main memory, digit shifts, and additions. can.

Software instructions are executed by sequentially executing several to dozens of basic operations, and the instructions that specify these basic operations are called microinstructions.Reading, interpreting, and executing software instructions is a combination of microinstructions. It can be written in a program format (arm microprogram) consisting of: and a control memory for storing this microprogram.

Control of software instructions is provided by providing an address generation circuit for generating a control memory address and an instruction decoding conversion circuit for decoding microphone commands included in a read program and converting them into hardware control signals. It can be realized. This method is called a microprogram control method, and has the advantages of being able to clearly describe complex control, being highly flexible in expanding functions, and being easy to change. Furthermore, according to the diagnostic method (microdiagnosis) described at the microprogram level,
It is well known that a high detection rate and high resolution for failures can be achieved. Furthermore, microdiagnosis has the advantage that diagnosis can be realized with small hardware.

(Solved by the invention) When diagnosing a functional block composed of RAM such as cache memory and scratch pad memory using this microdiagnosis method in a microprogram control device, a large amount of diagnostic data is required. It's necessary. The arithmetic circuit operates under the control of a microprogram,
Although it is possible to generate this type of data,
However, since the disadvantage is that the amount of hardware increases, a method of increasing from control memory is more desirable. On the other hand, in conventional Q control storage, many constant fields that can be used as data fields also serve as branch address fields, and are rarely about 2 bytes wide. Therefore, carrying out diagnostics of blocks containing RAM in this type of control memory often has the drawback of requiring a huge number of steps. In addition, Oru's microprogram control device uses the so-called n-way branching method, which refers to multiple conditions at once and selects only one condition among multiple branch destinations depending on the results of the seven steps. are doing. In this type of branching operation, a combination of conditions is used to derive branching options that do not branch logically. The locations in the control memory indicated by the branch destination addresses corresponding to these choices exist discretely, resulting in the disadvantage that they become wasteful memory that cannot be used during execution of the microprogram.

An object of the present invention is to perform control so that a wide range of data placed at addresses different from the address of an i microinstruction that instructs a constant read operation inside a control memory can be read, and to read a large amount of data. The above-mentioned disadvantages are eliminated by making it possible to arrange the data discretely, and the number of steps of a diagnostic microprogram that requires a large amount of data inside the RAM can be reduced, and unused control storage locations can be used effectively. The object of the present invention is to provide a microprogram control device with the following features.

(Means for Solving the Problems) A microprogram control device according to the present invention includes a control memory, a read register, an address generation means, a pair of decoders, a detection means, and an /S-ware control circuit. It was constructed as follows.

The control memory is for storing microinstructions.

The read register is used to read the contents of the control memory.

The address generation means is for generating a read address for control storage.

The pair of decoders is for decoding the control field of the microinstruction word read out and stored in the read register.0 The detection means is for detecting the end of work due to execution of the microinstruction word. .

The hardware control circuit is activated by the output of the pair of decoders, controls the address generation means to select the branch destination address field of the read register as the read address, reads the microinstruction word from the control memory to the read register, and executes the above-mentioned instruction. The purpose is to suppress the decoding operation of the pair of decoders, transfer the data in the control field to the outside, and continue the above operation until the termination event of the activated operation occurs.

(Example) Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of a microprogram control device according to the present invention. In Figure 1,
1 is a control memory, 2 is a bladder output register, ru is an address switcher, 4 is an address door calculator, 5 is a micro address register, 6 is a first decoder, 7 is a second decoder, 12
20 is a working memory, 20 is a hardware control circuit, 21 is a working address register, and 26 is a detection circuit.

In FIG. 1, the microphone arithmetic instruction word read from the control memory 1 is stored in the read register 2, and the read address of the control memory 1 is selected by an address switch. This address is incremented by 1 in the address counter 4 and held in the micro address register 5 as a control storage address to be read in the next machine cycle.

FIG. 2 is a diagram showing an example of the microinstruction word format in this embodiment. When a microprogram of this type is stored in the read register 2, the contents of the first CMD field (CMDI) are decoded by the first decoder 6 and control signals for the peripheral circuits of the control memory 1 are generated. For example, if the contents of the first CMD field specify the execution of a microinstruction at a subsequent address in the next machine cycle, the address switcher selects the output of the microaddress register 5 via the control signal line 1. The output of the first decoder controls the output of the first decoder. On the other hand, when specifying a branch operation based on the content of the first CMD field, the first decoder 6 causes the address switch 6 to select the output of the ARG field of the read register 2 via the control signal line 31. Control. The second decoder 7 decodes the contents of the second CMD field and creates a control signal for the real circuit system.

In FIG. 1, only the working memory 12 is shown as an arithmetic circuit, and the others are omitted. The write address of the working memory 12 is supplied from the working address register 21. The work address register 21 increments the value held by one by a control signal from the first decoder 6 and performs a calculation operation or performs a load operation of the ARG field.

Next, the diagnostic data load 2 (MDL2) microinstruction will be explained. This type of microinstruction is specified by the first CMD field of the microinstruction word shown in FIG. The ARG field of the microinstruction word indicates the storage address of the first word of the diagnostic data. FIG. 3 is a diagram showing that each word of the data is composed of an address field and a data field. The address part is
Specifies the address where the subsequent data will be stored. FIG. 4 is a diagram illustrating the relationships among the microinstruction words. FIG. 4 shows that the microinstruction word containing the MDL2 microinstruction stored at address A and the discretely arranged diagnostic data words are linked by the address stored in the ARG field. Therefore, &6 according to the address specified by the ARG field.
．． By reading the microinstruction words in the order of &1a2+..., the discretely arranged diagnostic data are concatenated and a,
It can be used as continuous data such as +dl, d2 y, etc.

In FIG. 1, writing of the working memory 12 is started by the decode signal of the first CMD field, and the address is loaded from the ARG field of the read register 2 to the working address register 21. When the MDL2 microinstruction is loaded into the read register 2, the microinstruction is decoded by the first decoder and the hardware control circuit 20 is activated. At the same time, the ARG field (address a) of the read register 2 is sent via the control signal line 31.
The address switching circuit 3 is controlled so that O) is selected. As a result, data a1+d@ is read into the read register 2. The read data is not decoded as a microinstruction until a series of diagnostic operations are completed.
An instruction to inhibit decoding is sent via the signal line 32 to the first and second decoders 6.7. Hardware control circuit 20
sends a write instruction signal to the work memory 12 via the signal line 63, and reads the data (do) existing in the read register 2 to the address CB specified by the work address register 21.
Write. In parallel with this, the hardware control circuit 20 reads the ARG field of the read register 2 (
al) t- Select the contents of control memory 1 to 81 addresses (az, dt) Set in the address register 21 - Increment the value stored in a by 1, and write the next address CB + 1
). Thereafter, the concatenated data read from the control memory 1 can be successively written to the working memory 12 in the same manner. The output of the working address register 21 is also sent to a detection circuit 26, and when the detection circuit 2 detects a value, it sends a detection signal to the hardware control circuit 20 via a signal line 6. Hardware control circuit 20
When the above signal arrives, υ writes data into the working memory 12.

The updating of the contents of the working address register 21 is stopped and a restart operation under microprogram control is executed. That is, an instruction is sent to the address switching circuit 6 via the signal line 34 to select the next address (A+1) of the MDL2 microinstruction word held in the microaddress register 5, and (A+1) of the control memory 1 is sent to the address switching circuit 6 via the signal line 34. When the data at the address is loaded into the read register 2, the decoding inhibit signal sent through the signal line 2 is released. At this point MD
The operation of the L2 microinstruction is completed and control of the microinstruction is activated.

(Effects of the Invention) As explained above, the present invention has the ability to read a wide range of data placed in a control memory at an address different from the address of a microinstruction that instructs a constant read operation. This method has the effect of reducing the number of execution steps in block diagnosis and reducing unnecessary hardware by making it possible to control and arrange a large amount of data discretely.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a microprogram control device according to the present invention. FIG. 2 is an explanatory diagram illustrating the microinstruction word format according to the present invention. FIG. 3 is an explanatory diagram showing the data word format to be processed by the MDL2 instruction. FIG. 4 is a conceptual diagram 5 showing the operation of the MDL2 instruction. 1...Control memory 2...Read register 3...Address switcher 4@Φ/Address blade calculator 5...Micro address register 6.7/Fist/Decoder 12...One working memory 20...・Hardware control circuit 21...Work address register 2--Detection circuits 31-36...Signal line

Claims (1)

[Claims] a control memory for storing a microinstruction word; a read register for reading the contents of the control memory; an address generating means for generating a read address for the control memory; a pair of decoders for decoding a control field of the micro-instruction word stored in the micro-instruction word; a detection means for detecting the end of work due to execution of the micro-instruction word; activated by the output of the pair of decoders; controlling the address generation means to select a branch destination address field of the read register as a read address, reading a microinstruction word from the control memory to the read register, inhibiting a decoding operation of the pair of decoders, and controlling A microprogram control device comprising: a hardware control circuit for transferring data in a field to the outside and continuing the operation until an event that ends the activated operation occurs.