JPS6142890B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a limiter amplifier suitable for integration into an integrated circuit, and particularly to a limiter amplifier suitable for preventing reversal phenomena in magnetic recording and reproducing devices.

Hereinafter, a home VTR will be explained as an example of a magnetic recording/reproducing device.

In a home VTR that uses a low carrier wave FM signal, the level of the lower sideband wave is higher than the level of the FM carrier of the reproduced FM signal, and when it passes through a limiter circuit, the lower sideband wave becomes the carrier, so-called inversion. There is a circuit shown in FIG. 1 as a circuit for preventing this phenomenon. The problem here is that the configuration shown in Figure 1 requires a low-pass filter and a high-pass filter, making it difficult to integrate, and even if it can be integrated, it has the disadvantage of requiring a large number of peripheral components. .

The level of the lower sideband wave and carrier are reversed because
This is thought to be due to spacing loss caused by a space between the tape and the head, such as dust on the tape, but since spacing loss increases as the wavelength becomes shorter, it is reversed in current short wavelength recording. The situation is such that the phenomenon is likely to occur.

The circuit shown in FIG. 1 is a so-called double limiter, and focuses on the reduction in the reproduced FM level when a spacing loss occurs.

To briefly explain the principle using Fig. 1 and Fig. 2, due to the above spacing loss, the input terminal 1
When the input reproduced FM signal level decreases and the lower sideband level becomes higher than the carrier, this signal is passed through the high pass filter 2 with the characteristics shown in Figure 2 8H.
By passing through the lower sideband, the lower sideband wave is returned to a level lower than the carrier, and is passed through the adder 4 without being inverted by the limiter 3.
guided by. The level of this signal is amplitude limited by a limiter, so it will be the same as during normal operation. On the other hand, the signal at the input terminal 1 passes through the low-pass filter 5 with the characteristics shown in Fig. 2, 8L, and the lower sideband level is larger than that of the carrier, with the magnitude corresponding to the decrease in the input level.
It becomes an FM signal and is guided to adder 4. Since this signal is smaller than the first limiter output signal, the first limiter output signal becomes dominant, and even after the two signals are added, the carrier level becomes a larger FM wave than the lower sideband wave, and the second limiter continues. As mentioned above, this circuit requires a low-pass filter and a high-pass filter, so it is difficult to integrate, and even if it can be integrated, it has the drawback of requiring a large number of peripheral components.

On the other hand, there is also a similar inversion prevention circuit with a simpler circuit configuration as shown in FIG. This circuit amplifies the voltage with a transistor 10, and outputs the voltage with a diode 14,
This is a limiter amplifier that clicks at 15. The feature is that a coil 12 is connected in parallel with a resistor 11 as a load on the collector of a transistor 10 to form a high-pass filter. Usually diode 1
Since the signal level of the input terminal 9 is set so that the output terminals 4 and 15 are turned on, the signal obtained at the output terminal 16 is limited in amplitude and becomes a constant voltage. The above spacing loss occurs, and the levels of the lower band wave and carrier applied to the input terminal 9 are reversed, and the diodes 14 and 1
5 reaches the cut-off level, resistor 11
Since the output with the frequency characteristics of the high-pass filter consisting of the
Even if the signal No. 6 is input to the next limiter, it will not be inverted. However, the circuit shown in FIG. 3 is not suitable for integrated circuits, and integrated circuits generally use a differential amplifier as a limiter amplifier. An example is shown in FIG.

The transistors 18a and 18b are a differential pair of transistors, and the emitters of both transistors are connected to each other and coupled to a constant current source 19. The collector of transistor 18a is connected to a voltage source through a resistor 20, and the collector of transistor 18b is connected to the same voltage source through a resistor 21.

Diodes 22 and 23 are connected to the collectors of the transistor 18a and the transistor 18b in opposite directions.
is connected, this diode operates as a clipping diode, and the output terminals 24a, 2
A constant amplitude voltage is obtained at 4b.

By the way, the low carrier wave used in VTR etc.
One of the performance requirements for limiter amplifiers for FM signals is the problem of second-order harmonic distortion. In the limiter amplifier using the differential amplifier shown in FIG. 4, the bias voltages of the bases 17a and 17b of the differential pair transistors 188a and 18b are generally adjusted so that the second harmonic distortion is minimized.

This method has the problem that adjustment takes time. As a method of reducing second harmonic distortion without adjustment, there is a method of forcibly equalizing the collector potentials of differential pair transistors. This connects both collectors, that is, both ends of the diode to external terminals 25a and 25.
This can be achieved by connecting a large inductance coil 26, which is short-circuited in direct current and has negligible impedance in alternating current, to both ends. However, although this method does not require adjustment of the second harmonic distortion, it is not often used because it requires two external pins for the integrated circuit.Conventional limiter amplifiers of this type are inverted. There is nothing designed to have a prevention effect, but only to prevent the occurrence of second-order harmonic distortion, and if you want to have an inversion prevention effect, you need a configuration like the one shown in Figure 1.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art and to provide a limiter amplifier for integrated circuits that does not require adjustment for second harmonic distortion and has an anti-inversion effect.

A feature of the present invention is that a coil is connected to both connectors of the differential pair transistor of a limiter amplifier using a differential amplifier, and no adjustment is made for second harmonic distortion, so that the input level is reduced due to the above spacing loss. When the diode is cut off and the forward resistance increases, the inductance of the coil is reduced to form a high-pass filter consisting of the load resistor and the coil, thereby providing a reversal prevention effect.

Examples of the present invention will be described below. FIG. 5 is a circuit diagram showing a first embodiment of the present invention. Transistors 29a and 29b form a differential pair, and both emitters are connected to transistor 34 and resistor 3.
It is connected to a constant current source circuit consisting of 5. 36
and 37 are base bias resistors of the differential pair transistors 29a and 29b, and are connected to the emitter of the transistor 43.

Resistors 30 and 31 having the same resistance value are connected to the collectors of the differential pair transistors, respectively, and to the emitter of a transistor 42 serving as a voltage source.
Diodes 3 with opposite directions are connected between both collectors.
2 and 33 are connected. Both collectors are output as external terminals 46a and 46b, and a coil 47 for equalizing the DC potential is connected, so that second harmonic distortion can be eliminated without adjustment. Resistor 3
8, 39, 40, 41, 45 and transistor 4
2, 43, and 44 constitute constant voltage sources. reproduction
The FM signal is input to input terminal 28 via capacitor 27.
The output is taken out from output terminals 48a and 48b and supplied to the next stage limiter. The AC equivalent circuit on the output side of the differential transistor is shown in Figure 6. In the figure, i0 is expressed as i0=νigm, where νi is the input voltage of the differential amplifier, and gm is the mutual conductance of the differential transistor. R _L is the load resistance of the transistor, which corresponds to 30 and 31 in Fig. 5, and L represents the inductance of the coil 47.
D ₁ and D ₂ indicate diodes 32 and 33. When the voltage is sufficiently large to turn on the diodes D ₁ and D ₂ , the output voltage ν ₀ has a constant amplitude of V (forward voltage of the V diode). Normally, set the input voltage as shown above. If a spacing loss occurs and the carrier level decreases, and the lower side band level and carrier level are reversed, that is, the 7th
Consider the case where the input voltage of the limiter input/output characteristics shown in the figure drops from the normal input level νi ₁ to νi ₂ and the limiter no longer operates. Diode _D1 , _D2
Letting the forward resistance of γd be, the output circuit becomes a high-pass filter with a cut-off frequency expressed as c=(2R _L γd/2πL...(1).The forward output resistance γd of the diode is sufficiently larger than the load resistance _RL . Then, the cutoff frequency is finally c=R _L /πL (2).The smaller the input level, the larger the diode forward resistance γd, and the characteristics of the high-pass filter are as shown in Figure 8, at the cutoff frequency. becomes larger, resulting in a larger high-pass effect.Therefore, by selecting R _L /πL near the carrier frequency, as the input level decreases, the lower sideband level that becomes too large relative to the carrier level can be suppressed. The lower sideband wave becomes smaller than the carrier level and returns to the normal FM configuration wave.Even if this output is input to the next stage limiter, no inversion will occur.If the cutoff frequency is set too high, the normal input It is undesirable to increase the voltage or mutual conductance of the differential transistor, and if it is too low, the lower sideband suppression effect will be lost.The cutoff frequency should be selected near the carrier frequency.For example, R _L =
If it is 500Ω and c=4MHz, the inductance will be about L=39μH. Although a single input is shown in the embodiment, differential input is also possible.

In the first embodiment shown in FIG.
0 and 31 are constructed with resistors in the integrated circuit, so if the resistance value varies, the cutoff frequency in equation (2) above will vary, but since it is difficult to adjust this resistance value, if the variation is large, the cutoff frequency will vary. It is also conceivable that a sufficient reversal prevention effect cannot be expected.

FIG. 9 shows a second embodiment that improves the above drawbacks. The difference from the first embodiment is that the external terminal 46
A resistor 49 is connected in parallel with the coil 47 connected to terminals a and 46b. And resistor 30,
If the resistance value of the resistor 49 is made sufficiently smaller than that of the external resistor 31, the resistance value that determines the cut-off frequency of the high-pass filter becomes the resistance value of the external resistor 49. Therefore, regardless of the resistance values of the resistors 30 and 31 configured in the integrated circuit, the cut-off frequency of the high-pass filter is c=R ₀ /2πL...(3) R ₀ : Indicated by the external resistance value, Since it is determined by the element value, the variation becomes very small.

FIG. 10 shows a third embodiment of the present invention in which variation in cutoff frequency is suppressed to a small level. The difference from the first embodiment shown in FIG. 5 is that the collector load resistance 3 of the differential pair transistors 29a and 29b is
0 and 31 are replaced with constant current source transistors 54a and 54b, which are transistors with opposite polarity to the differential pair transistors, and both collectors of the differential pair transistors are brought out as external terminals 46a and 46b, and the two terminals are connected. The differential pair transistors are grounded via equal resistors 50 and 51 which serve as load resistances, and a coil 47 is connected to both terminals. The AC equivalent circuit of the differential pair transistors is the same as the circuit of the first embodiment shown in FIG.
Therefore, the cutoff frequency of the high pass filter is
It is shown by equation (2). The values of R _L and L in equation (2) have good accuracy because external elements are used, and variations in the cutoff frequency can be reduced.

As mentioned above, in a limiter amplifier that uses a differential amplifier and a clipping diode, by connecting both collectors of the differential pair transistor as external terminals and connecting a coil with relatively small inductance, the second harmonic distortion can be eliminated without adjustment. In addition, it is possible to construct a limiter amplifier for integrated circuits that has an anti-inversion effect with a very small number of elements. Further, by using the configurations described in the second and third embodiments, it is possible to configure a high-pass filter using only external elements, so that variations in cutoff frequency can be reduced.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a conventional inversion prevention circuit, Fig. 2 is a characteristic diagram of the filter shown in Fig. 1, and Fig. 3 is a circuit diagram of a conventional limiter amplifier having an inversion prevention effect.
Fig. 4 is a circuit diagram of a conventional limiter amplifier using a differential amplifier, Fig. 5 is a circuit diagram showing a first embodiment of a limiter amplifier according to the present invention, and Fig. 6 explains the inversion prevention effect of Fig. 5. Output side AC equivalent circuit diagram,
7 is an input/output characteristic curve diagram of FIG. 5, FIG. 8 is a frequency characteristic curve diagram for explaining the input level and frequency characteristics of FIG. 5, and FIG. 9 is a diagram of the second limiter amplifier of the present invention. FIG. 10 is a circuit diagram showing a third embodiment of the limiter amplifier of the present invention. 2: High pass filter, 3: First limiter,
4: Adder, 5: Low-pass filter, 6: Second limiter, 11: Resistor, 12: Coil, 14: Diode, 15: Diode, 25a: External terminal, 25b: External terminal, 26: Coil, 29a:
Transistor, 29b: Transistor, 30: Resistor, 31: Resistor, 47: Coil, 49: Resistor, 50: Resistor, 51: Resistor, 54a: Transistor, 54b: Transistor.

Claims (1)

[Scope of Claims] 1. In a limiter amplifier that limits the amplitude of a low-carrier FM signal and uses a differential amplifier, a differential pair of transistors constituting the differential amplifier and a transistor connected to the collector of this differential pair of transistors, respectively. A load resistor, diodes connected in parallel in opposite directions connected between the two collectors of this differential pair transistor, and connected between these two collectors,
and a coil that constitutes a high-pass filter with the load resistor, applies a low carrier wave FM signal to the base of the differential pair transistor, extracts the amplitude-limited FM signal from between the two collectors, and applies it to the base. When the level of the FM signal being received is normal, the above diode turns on and the FM
Input so that when the signal level drops, the above diode turns off and has bypass filter characteristics.
A limiter amplifier characterized in that the level of the FM signal is set, and the cut-off frequency of the high-pass filter composed of the coil and the load resistor is set near the carrier frequency of the input FM signal. 2. The limiter according to claim 1, wherein the differential pair transistors are constituted by an integrated circuit having respective collectors connected to external terminals, and the coils are connected to the external terminals. amplifier. 3. Claim 2, characterized in that the load resistor of the differential pair transistor is constituted by a resistor connected to the external terminal to which the coil is connected.
Limiter amplifier as described in section.