JPS6142148A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6142148A
JPS6142148A JP16305984A JP16305984A JPS6142148A JP S6142148 A JPS6142148 A JP S6142148A JP 16305984 A JP16305984 A JP 16305984A JP 16305984 A JP16305984 A JP 16305984A JP S6142148 A JPS6142148 A JP S6142148A
Authority
JP
Japan
Prior art keywords
metal
ball
fine lead
bonding
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16305984A
Other languages
Japanese (ja)
Inventor
Koichi Takegawa
光一 竹川
Manabu Bonshihara
盆子原 学
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP16305984A priority Critical patent/JPS6142148A/en
Publication of JPS6142148A publication Critical patent/JPS6142148A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/113Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134Stud bumping, i.e. using a wire-bonding apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00013Fully indexed content
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To form the titled device very easily and economically by providing a fine lead having a metal ball at the end thereof on an electrode pad and thereafter separating a ball from the fine lead wire. CONSTITUTION:A metal ball 11 is formed at the end of a metal fine lead 9 with electric dischrge or hydrogen flame, etc. The ball 11 is then connected to an aperture of electrode terminal 4 on a semiconductor element 1 by a connecting means such as the thermal bonding method or ultrasonic wave method. The fine lead 9 is lifted while it is held by a holding plate 12 and the fine lead 9 is cut at the coupling part with the ball 11 by giving gas flow or air flow to pull the fine lead 9. Thereby, a desired bump 8 can be formed.

Description

【発明の詳細な説明】 (技術分野) 本発明は、半導体装置のギヤングボンディング用の金属
突起電極(以下、バンプという)の製造方法に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a method of manufacturing a metal protrusion electrode (hereinafter referred to as a bump) for gigantic bonding of a semiconductor device.

(従来技術) 半導体素子上に設けられた電極パッドから外部端子へ電
気的接続を行なう方法としては、25〜40°μのA 
ut人1等の金属細線で前配電極端子と外部端子とを熱
圧着法もしくは超音波法によって接続するワイヤボンデ
ィングが一般的でおるが、近年これに代わる方法として
前記電極パッド上にAu、Cu等の金属突起物(バンプ
)を設け、多数の外部リードと一度に接続するテープキ
ャリヤ一方式等に代表されるギヤングボンディング法等
が実用化されてきている。
(Prior art) As a method for electrically connecting an electrode pad provided on a semiconductor element to an external terminal, an A of 25 to 40 μ
Wire bonding, in which a front electrode terminal and an external terminal are connected using a thermocompression bonding method or an ultrasonic method using a fine metal wire of 1st grade, is common, but in recent years, as an alternative method, Au, Cu, etc. The gigantic bonding method, typified by the one-sided tape carrier method, in which metal protrusions (bumps) such as these are provided and is connected to a large number of external leads at once, has been put into practical use.

前記ギヤングボンディング法は、ワイヤボンディング法
に比べて、ボンディング強度が数倍優れている仁と、リ
ード数に関係なくボンディングは一度で可能であるため
スピードが速いこと、ワイヤボンディングにおけるワイ
ヤーループ形成が不要であるため超薄虚パッケージの笑
iJlが可能であること、100〜200以上の多リー
ドボンディングが可能であること寺多くの利点を有して
いる。
The above-mentioned gigantic bonding method has the following advantages: the bonding strength is several times better than the wire bonding method, the speed is fast because bonding can be done at once regardless of the number of leads, and the wire loop formation in wire bonding is easy. Since it is not necessary, it has many advantages such as making it possible to create an ultra-thin imaginary package and making it possible to perform multi-lead bonding of 100 to 200 or more leads.

しかしながら半導体素子上に形成するバンプの形成方決
が複雑でかつコスト高である等の欠点がらり、ワイヤボ
ンディングを駆逐する迄にはいたっていない。即ち、従
来のバンプ形成方法は、第1図および第2図に示す如く
絶縁膜2を有する半導体素子1上KAl配線パターン3
が設けられ、このAノ配線は同一材料で構成される。A
l@極端子(パッド)4と接続される。さらに前記AJ
配線等を保護する九めに全面にCA D 8 ioz 
However, due to drawbacks such as the complicated and high cost of forming bumps on semiconductor elements, wire bonding has not been completely eliminated. That is, in the conventional bump forming method, as shown in FIGS. 1 and 2, a KAl wiring pattern 3 is formed on a semiconductor element 1 having an insulating film 2.
is provided, and the A wiring is made of the same material. A
Connected to l@pole terminal (pad) 4. Furthermore, the A.J.
CA D 8 ioz on the entire surface to protect wiring etc.
.

S i s N4 等CD 保護$ 5 ヲ被着シ、A
l’IE&i子4上のみをレジストを用いたエツチング
等により開孔する。ついでTi  Pt−ll−Pt−
Au−Cr−Cu−人U−Cr−C,等の複数層からな
るバリヤ金属層6を蒸着またはメッキ等により形成し、
さらKこのバリヤ金属層6をメッキ電極として選択的に
Au Ay−Cu等のバンプ7をlθ〜30μの高さに
形成する。そしてバリヤ金属層6を選択的に除去しバン
プを=ifする半導体索子lが完成する。
Sis N4 etc. CD protection $5
A hole is formed only on the l'IE&i element 4 by etching or the like using a resist. Then Ti Pt-ll-Pt-
A barrier metal layer 6 consisting of multiple layers of Au-Cr-Cu-U-Cr-C, etc. is formed by vapor deposition or plating,
Further, using this barrier metal layer 6 as a plating electrode, bumps 7 of Au, Ay-Cu, etc. are selectively formed to a height of lθ to 30μ. Then, the barrier metal layer 6 is selectively removed to complete the semiconductor wire 1 in which the bumps are formed.

このような従来のバング形成方法は、レジストを用いる
エツチング法及びリフトオフ法等を必要とするため工程
数が非常に多く、かつ複雑となっており、装置の自動化
も困難であること、さらにバンプを電解メッキにより1
00口μ程度の狭い電極端子上KIO〜30μのきわめ
て厚くメッキしなければならないためバング形成及び形
状が不安定であること等の欠点を有し、結果としてパッ
プ形成のコストを非常に高いものにしていた。さらに、
バンプ形成専用のツールも必要であった。
These conventional methods for forming bumps require an etching method using a resist, a lift-off method, etc., and therefore have a large number of steps and are complicated. Furthermore, it is difficult to automate the equipment, and it is difficult to form bumps. 1 by electrolytic plating
Since it is necessary to plate extremely thickly (KIO ~ 30μ) on a narrow electrode terminal of approximately 00μ, it has disadvantages such as unstable bang formation and shape, and as a result, the cost of pap formation becomes extremely high. was. moreover,
Specialized tools for bump formation were also required.

(発明の目的) 本発明は、非常に簡単にかつ安価にバンプを形成する方
法を提供することを目的とする。
(Objective of the Invention) An object of the present invention is to provide a method of forming bumps very easily and inexpensively.

(発明の構成) 本発明は先端に金属ボールを有する細線を電極パッド上
Jこ設け、その後ボールを細線から切り離すことによっ
てバンプを形成することを特徴とする。
(Structure of the Invention) The present invention is characterized in that a thin wire having a metal ball at the tip is provided on an electrode pad, and then the ball is separated from the thin wire to form a bump.

(実施例の説明) 以下に図面を用いて本発明の一実施例を説明する。(Explanation of Examples) An embodiment of the present invention will be described below with reference to the drawings.

本発明によるバンプ形成方法は、第3図および第4図に
示す如く、まず前記の従来のバンプ形成方法と同様に、
絶縁膜2を有する半導体素子1上にAj細線パターン3
を設け、骸配線パターンをAJ電極端子(パッド)4と
接続し、さらに全面に保護膜5を付着し、A7電極端子
4上のみをレジストを用いたエツチングにより開孔し、
ついで該開孔部上にTi−Pt−Ti−Pt Au−C
r  Cu−Au−(j−Cu等の複数層からなるバリ
ヤ金属層6を蒸着またはメッキ等公知の手法により形成
した半導体素子を製造する。ここで該半導体素子は、従
来のバンプ形成法におけるメッキによるバンプ形成前の
構造とはぼ同一であるが、本発明によるバンプ形成法は
以下に示す如〈従来のメッキによる形成法とは異なるた
め、バリヤ金属はメッキ用電極を兼用させる必要がなく
、またバンプ形成後不要なバリヤ金属層を除去する必要
もない。従って、本発明による半導体素子の製造方法は
これまでの工程をみても従来の方法と比べ簡略化された
工程で良く、そのため、コスト的にも安価ですむ。
As shown in FIGS. 3 and 4, the bump forming method according to the present invention first includes the steps as in the conventional bump forming method described above.
An Aj thin line pattern 3 is formed on the semiconductor element 1 having the insulating film 2.
, the skeleton wiring pattern is connected to the AJ electrode terminal (pad) 4, a protective film 5 is attached to the entire surface, and a hole is opened only on the A7 electrode terminal 4 by etching using a resist.
Then, Ti-Pt-Ti-Pt Au-C was deposited on the opening.
A semiconductor element is manufactured in which a barrier metal layer 6 consisting of multiple layers of Cu-Au- (j-Cu, etc.) is formed by a known method such as vapor deposition or plating. However, the bump forming method according to the present invention is different from the conventional plating method as shown below, so the barrier metal does not need to double as a plating electrode. In addition, there is no need to remove unnecessary barrier metal layers after bump formation.Therefore, the method for manufacturing semiconductor devices according to the present invention requires simpler steps compared to conventional methods, resulting in lower costs. It's also relatively inexpensive.

次に第5図(a)〜tc)に示す方法でバンプを形成す
る。即ち、第5図(a)に示す如く、Au−All−C
u等の金属細線9の先端に、電気放電または水素炎素等
で金属ボール11を形成し、ついで第5図(b)に示す
如く金属ボール11を前記半導体素子1上の電極端子4
の開孔部に熱圧着法または超音波法等の接続手段によっ
て接続後、第5図(C)に示す如く押え板12で押さえ
ながう上昇し、金IA細線9を引張るあるいはガス流も
しくは空気面を与える等により金属細線9を金属ボール
11との結合部で切断し、所望のバング8を形成し、本
実施例の半導体素子が完成する。
Next, bumps are formed by the method shown in FIGS. 5(a) to 5(tc). That is, as shown in FIG. 5(a), Au-All-C
A metal ball 11 is formed at the tip of a thin metal wire 9 such as a metal wire 9 by electric discharge or hydrogen flame, and then the metal ball 11 is connected to the electrode terminal 4 on the semiconductor element 1 as shown in FIG. 5(b).
After connecting to the opening by a connecting means such as a thermocompression method or an ultrasonic method, the gold IA thin wire 9 is pulled up while being held down by a holding plate 12 as shown in FIG. The thin metal wire 9 is cut at the joint with the metal ball 11 by providing an air surface, etc., to form the desired bang 8, and the semiconductor device of this example is completed.

ここで、金属ボールの電極端子への接合構造は、従来の
ワイヤボンディングにおける接合構造とほぼ同一であり
、また、前記の金属ボールによるバンプ形成方法は、従
来のワイヤボンディング法およびそのツールを応用する
ことで可能である。よって自動化も可能となり、さらに
電極部子への金属ボールの接合のみで良いため、ワイヤ
ボンディングにおける外部端子へのボンディングが不要
となり、バンプ形成時間は、・ワイヤボンディングの約
半分ですむ等技術的にも工数的即ちコスト的にも好適で
ある。
Here, the bonding structure of the metal ball to the electrode terminal is almost the same as the bonding structure in conventional wire bonding, and the bump formation method using the metal ball is an application of the conventional wire bonding method and its tools. This is possible. Therefore, automation is possible, and since it is only necessary to bond the metal ball to the electrode part, there is no need for bonding to external terminals in wire bonding, and the bump formation time is about half that of wire bonding. It is also preferable in terms of man-hours, that is, cost.

なお、上記実施例においては、゛半導体素子上の電極端
子および配線パターンをAIとしたが、耐腐食性、信頼
性向上のために一部または全部をAu等の貴金属、前記
のバリア金jliA!または両者の組み合わせで実施す
ることも可能である。
In the above embodiment, the electrode terminals and wiring pattern on the semiconductor element were made of AI, but in order to improve corrosion resistance and reliability, some or all of them were made of noble metal such as Au, or the barrier gold described above! Alternatively, it is also possible to implement a combination of both.

(効果の説明) 以上の様に、本発明によれば、通常のワイヤボンディン
グ法を応用することにより非常に容易に、かつ装置の自
動化もはかれることで安価にバンプを形成することがで
き、従来の電解メッキによるバンプ形成法での問題点で
あったバンプ形成が困難かつ複雑であり、非常に高価で
あるという欠点を解決した高品質で安価なバンプ付半導
体素子を提供することができる。
(Explanation of Effects) As described above, according to the present invention, bumps can be formed very easily and inexpensively by applying the normal wire bonding method and by automating the device, and compared to the conventional wire bonding method. It is possible to provide a high quality and inexpensive bumped semiconductor element which solves the problems of the bump formation method using electrolytic plating in that bump formation is difficult, complicated, and very expensive.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は従来のバンプ形成方法による半導
体装置のバンプ部分を示す断面図およびバンプを除いた
平面図であり、第3図および第4図は本発明によるバン
プ形成方法の一実施例を示す半導体装置のバンプ部分の
断面図のよびバンプを除いた平面図であり、第5図(a
)乃至(e)は本発明によるバンプ形成方法を示す各工
程図である。 1・・・・・・半導体素子、2・・・・・・絶縁膜、3
・・・・・・内部金属配線、4・・・・・・電極端子、
5・・・・・・保護膜、6・・・・・・バリヤ金属層、
7・・・・・・バンプ、8・・・・・・金属ボールバン
プ、9・−・・・金属細線、10・・・・・・電気放電
用電極ロッド、11・・・・・・金属ボール、12・・
・・・・金属細線押え。 某 l 区 第 2 図 革 3WJ 第 4−1!lI
1 and 2 are a cross-sectional view and a plan view, excluding the bumps, showing a bump portion of a semiconductor device formed by a conventional bump forming method, and FIGS. 3 and 4 are one embodiment of a bump forming method according to the present invention. FIG.
) to (e) are process diagrams showing the bump forming method according to the present invention. 1... Semiconductor element, 2... Insulating film, 3
...Internal metal wiring, 4...Electrode terminal,
5... Protective film, 6... Barrier metal layer,
7...Bump, 8...Metal ball bump, 9...Metal thin wire, 10...Electrode rod for electrical discharge, 11...Metal Ball, 12...
...Metal thin wire presser foot. Certain l Ward No. 2 Zuhaku 3WJ No. 4-1! lI

Claims (1)

【特許請求の範囲】[Claims]  絶縁膜を有する半導体素子上に金属配線パターンおよ
び電極パッドを設け、この電極パッド上にバリヤ金属層
を形成した後、先端に金属ボールを有する金属細線を用
いて該金属ボールを前記電極パッド上にボンディングし
、ボンディング後金属ボールを金属細線から切り離すこ
とによって前記電極パッド上に金属突起物を形成するこ
とを特徴とする半導体装置の製造方法。
A metal wiring pattern and an electrode pad are provided on a semiconductor element having an insulating film, a barrier metal layer is formed on this electrode pad, and then the metal ball is placed on the electrode pad using a thin metal wire having a metal ball at the tip. 1. A method of manufacturing a semiconductor device, comprising the steps of forming a metal protrusion on the electrode pad by bonding and separating the metal ball from the thin metal wire after bonding.
JP16305984A 1984-08-02 1984-08-02 Manufacture of semiconductor device Pending JPS6142148A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16305984A JPS6142148A (en) 1984-08-02 1984-08-02 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16305984A JPS6142148A (en) 1984-08-02 1984-08-02 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6142148A true JPS6142148A (en) 1986-02-28

Family

ID=15766390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16305984A Pending JPS6142148A (en) 1984-08-02 1984-08-02 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6142148A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6473626A (en) * 1987-09-14 1989-03-17 Omron Tateisi Electronics Co Forming method for mounting bonding metal
JPH0621710A (en) * 1992-07-06 1994-01-28 Matsushita Electric Ind Co Ltd Portable radio equipment
US6064863A (en) * 1996-11-18 2000-05-16 Nec Corporation Constitution of protrusible external and fixed internal antenna for radio portable remote terminal device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6473626A (en) * 1987-09-14 1989-03-17 Omron Tateisi Electronics Co Forming method for mounting bonding metal
JPH0621710A (en) * 1992-07-06 1994-01-28 Matsushita Electric Ind Co Ltd Portable radio equipment
US6064863A (en) * 1996-11-18 2000-05-16 Nec Corporation Constitution of protrusible external and fixed internal antenna for radio portable remote terminal device

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