JPS6142057A - Securing system of contents of buffer - Google Patents

Securing system of contents of buffer

Info

Publication number
JPS6142057A
JPS6142057A JP16363884A JP16363884A JPS6142057A JP S6142057 A JPS6142057 A JP S6142057A JP 16363884 A JP16363884 A JP 16363884A JP 16363884 A JP16363884 A JP 16363884A JP S6142057 A JPS6142057 A JP S6142057A
Authority
JP
Japan
Prior art keywords
buffer
contents
program
guarantee
flag
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16363884A
Other languages
Japanese (ja)
Inventor
Itaru Osada
格 長田
Koichi Nishio
浩一 西尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Usac Electronic Ind Co Ltd
Original Assignee
Fujitsu Ltd
Usac Electronic Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Usac Electronic Ind Co Ltd filed Critical Fujitsu Ltd
Priority to JP16363884A priority Critical patent/JPS6142057A/en
Publication of JPS6142057A publication Critical patent/JPS6142057A/en
Pending legal-status Critical Current

Links

Landscapes

  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To improve the reliability for processing data by providing a buffer securing means so that the contents of a buffer are secured in a period required by a module. CONSTITUTION:When a program (buffer securing means) 12 receives a notice of a fact of receiving the security of the contents of a buffer, from a module 16, the program 12 sets a use flag 22 in a buffer control block (BCB)14 corresponding to a buffer 24 whose contents must be secured, to X''01'' (on state). Subsequently, said program receives a request for using the buffer, and processes it so that the buffer in which said use flag has been set to X''01'' is not used. Also, when the program receives a notice of a fact of releasing the security of the contents of the buffer, said use flag 22 is set to X''00'' (off state). By this processing, the buffer can be used thereafter.

Description

【発明の詳細な説明】 技術分野 本発明は、バッファ内容を管理するプログラムに対して
バッファ内容をある期間保証する方式に関する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a method for guaranteeing buffer contents for a certain period of time to a program that manages buffer contents.

(2)従来技術と問題点 従来のバッファ管理方式は、プログラムの実行につれて
バッファの内容は順次変化する方式であったため、バッ
ファの内容を必要な期間保証することが出来ないという
欠点があった。
(2) Prior Art and Problems In the conventional buffer management method, the contents of the buffer are changed sequentially as the program is executed, and therefore, there is a drawback that the contents of the buffer cannot be guaranteed for a necessary period of time.

(3)発明の目的 本発明は前記欠点に鑑みて、所定の期間バッファの内容
を保証することを目的とする。
(3) Purpose of the Invention In view of the above drawbacks, the present invention aims to guarantee the contents of the buffer for a predetermined period of time.

(4)  発明の構成 該目的はバッファの使用要求を受けると空きバッファを
割付けるシステムにおいて、あるバッファの内容保証要
求を受け付けると、該バッファに対応したバッファコン
トロールブロックのフラグをオンにして、該バッファの
以後の使、1割付けを中止し、バッファの内容保証解除
の情FliIを受付けると当該フラグをオフにして以後
の該バッファの使用割付けを行なう手段を設けたことを
特徴とするバッファ内容の保証処理方式により1成され
る。
(4) Structure of the Invention The object is to provide a system that allocates a free buffer when a buffer use request is received, and when a request to guarantee the contents of a certain buffer is received, the flag of the buffer control block corresponding to the buffer is turned on, The present invention is characterized by providing means for canceling the subsequent use and allocation of the buffer, and turning off the flag when information FliI for canceling the guarantee of the buffer contents is received, and performing the subsequent use allocation of the buffer. 1 is made by the guarantee processing method.

(5)発明の実施例 以下図面を参照しつつ、本発明の詳細な説明する。(5) Examples of the invention The present invention will be described in detail below with reference to the drawings.

第1図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

図において、11はCPU (中央処理装置)。In the figure, 11 is a CPU (central processing unit).

12はプログラム(バッファ管理を行なう)、13はメ
モリ、14はバッファコントロールブロック(BCB)
、15はバッファ、16はモジュールである。
12 is a program (performs buffer management), 13 is a memory, and 14 is a buffer control block (BCB).
, 15 is a buffer, and 16 is a module.

第2図は本発明の一実施例を示すバッファコントロール
ブロックとバッファ内容の対応を示す図である。
FIG. 2 is a diagram showing the correspondence between buffer control blocks and buffer contents according to an embodiment of the present invention.

図において、21は次BCBアドレス、22は使用フラ
グ、23はバッファアドレス、24は保証されるバッフ
ァ、25は使用中バッファ、26は空きバッファである
In the figure, 21 is the next BCB address, 22 is a use flag, 23 is a buffer address, 24 is a guaranteed buffer, 25 is a buffer in use, and 26 is an empty buffer.

プログラム12(バッファ保証手段)は呼び出し元モジ
ュール16から「バッファ内容を保証する」意味のコマ
ンドを受けたならば、次に「当該バッファの内容の保証
を解除する。」意味のコマンドを受け取るまで当該バッ
ファの内容を保証する(内容を変更させない、)ことで
ある。
When the program 12 (buffer guarantee means) receives a command meaning "guarantee the contents of the buffer" from the calling module 16, the program 12 (buffer guarantee means) waits until it receives a command meaning "cancel the guarantee of the contents of the buffer concerned." The purpose is to guarantee the contents of the buffer (not allow the contents to be changed).

例えば、プログラムにはバッファの内容を保証しなけれ
ばならないバッファ24に対応するバッファコントロー
ルブロック14(BCB)の中の使用フラグ22をX’
02’(ON:犬yrs>トシテおき、次にバッファ使
用の要求を受付けて該使用フラグがX’02’になって
いるバッファは使用しない。またモジュール16からバ
ッファ内容の保証を解除する旨の通知を受けると、当該
使用フラグ22をX”00’(OFF状態)にする、該
処理によって以降の使用が回部となる。
For example, a program may set the usage flag 22 in the buffer control block 14 (BCB) corresponding to the buffer 24 to
02' (ON: dog yrs> Wait, then accept a request to use the buffer, and do not use the buffer whose usage flag is X'02'. Also, the module 16 sends a request to cancel the guarantee of the buffer contents. When the notification is received, the use flag 22 is set to X"00" (OFF state), and subsequent use is disabled by this process.

(6)発明の詳細 な説明した様に、本発明によればモジュールが必要とす
る期間バッファ内容を保証することが出来、データ処理
の信頼度の向上が図れる。
(6) As described in detail, according to the present invention, the buffer contents can be guaranteed for the period required by the module, and the reliability of data processing can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロック図である。 第2図は本発明の一実施例を示すバッファコントロール
ブロックとバッファ内容の対応を示す図である。 記号の説明、11はCPU (中央処理装置)。 12はプログラム(バッファ管理を行なう)、13はメ
モリ、14はバッファコントロールブロック(BCB)
、15はバッファである。 −三 第1図
FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a diagram showing the correspondence between buffer control blocks and buffer contents according to an embodiment of the present invention. Explanation of symbols: 11 is CPU (central processing unit). 12 is a program (performs buffer management), 13 is a memory, and 14 is a buffer control block (BCB).
, 15 are buffers. -3 Figure 1

Claims (1)

【特許請求の範囲】[Claims] バッファの使用要求を受けると空きバッファを割付ける
システムにおいて、あるバッファの内容保証要求を受け
付けると、該バッファに対応したバッファコントロール
ブロックのフラグをオンにして、該バッファの以後の使
用割付けを中止し、バッファの内容保証解除の情報を受
付けると当該フラグをオフにして以後の該バッファの使
用割付けを行なう手段を設けたことを特徴とするバッフ
ァ内容の保証処理方式。
In a system that allocates a free buffer when a buffer use request is received, when a request to guarantee the contents of a certain buffer is received, a flag in the buffer control block corresponding to the buffer is turned on, and further use allocation of the buffer is stopped. 1. A buffer content guarantee processing method, comprising: means for turning off the flag when receiving information for canceling the buffer content guarantee and allocating the buffer for future use.
JP16363884A 1984-08-03 1984-08-03 Securing system of contents of buffer Pending JPS6142057A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16363884A JPS6142057A (en) 1984-08-03 1984-08-03 Securing system of contents of buffer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16363884A JPS6142057A (en) 1984-08-03 1984-08-03 Securing system of contents of buffer

Publications (1)

Publication Number Publication Date
JPS6142057A true JPS6142057A (en) 1986-02-28

Family

ID=15777739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16363884A Pending JPS6142057A (en) 1984-08-03 1984-08-03 Securing system of contents of buffer

Country Status (1)

Country Link
JP (1) JPS6142057A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51141537A (en) * 1975-05-31 1976-12-06 Toshiba Corp Memory access control device
JPS58164080A (en) * 1982-03-25 1983-09-28 Fujitsu Ltd System for managing and processing area

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51141537A (en) * 1975-05-31 1976-12-06 Toshiba Corp Memory access control device
JPS58164080A (en) * 1982-03-25 1983-09-28 Fujitsu Ltd System for managing and processing area

Similar Documents

Publication Publication Date Title
US4704717A (en) Receive message processor for a solicited message packet transfer system
JPH04284548A (en) Data base exclusive controlling system
US5432915A (en) Interprocessor communication system in an information processing system enabling communication between execution processor units during communication between other processor units
JPS6142057A (en) Securing system of contents of buffer
JPH02128250A (en) Access control circuit for information processor
JPH0644191A (en) Buffer control method
JPS615361A (en) Communication interface circuit
JP2961542B2 (en) Data processing system
JPH06208547A (en) Communication controller
JPH0378065A (en) Reception control system for peripheral device
JPH04274524A (en) System for controlling inter-process communication
JPS6159516A (en) Timer device
JPS6154556A (en) Inter-memory data transfer system
JPH0444291B2 (en)
JPS6373453A (en) Controlling system for common bus
JPH06161951A (en) Bus control system
JPH04278659A (en) Inter-multiprocessor communication system
JPS63271521A (en) Processing controller for data
JP2003186666A (en) Microcomputer and dma control circuit
JPS6275863A (en) Control system for switching bus using request
JPS61150061A (en) Processor linking system
JPH103463A (en) Inter-processor communication method
JPS63108452A (en) Inter-processor communication control system
JPS5831441A (en) Communication controlling device
JPH03116335A (en) System for transferring from non-privileged cpu to privileged cpu