JPS614135B2 - - Google Patents
Info
- Publication number
- JPS614135B2 JPS614135B2 JP56095248A JP9524881A JPS614135B2 JP S614135 B2 JPS614135 B2 JP S614135B2 JP 56095248 A JP56095248 A JP 56095248A JP 9524881 A JP9524881 A JP 9524881A JP S614135 B2 JPS614135 B2 JP S614135B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer And Data Communications (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Small-Scale Networks (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56095248A JPS57211628A (en) | 1981-06-22 | 1981-06-22 | Controller for shared input and output loop bus of multicomputer system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56095248A JPS57211628A (en) | 1981-06-22 | 1981-06-22 | Controller for shared input and output loop bus of multicomputer system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57211628A JPS57211628A (en) | 1982-12-25 |
| JPS614135B2 true JPS614135B2 (show.php) | 1986-02-07 |
Family
ID=14132447
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56095248A Granted JPS57211628A (en) | 1981-06-22 | 1981-06-22 | Controller for shared input and output loop bus of multicomputer system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57211628A (show.php) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6033761A (ja) * | 1983-08-04 | 1985-02-21 | Amada Co Ltd | ロ−カルネットワ−クシステムのオペレ−ティングシステム |
| US6108755A (en) * | 1990-09-18 | 2000-08-22 | Fujitsu Limited | Asynchronous access system to a shared storage |
| JP3141948B2 (ja) * | 1990-09-18 | 2001-03-07 | 富士通株式会社 | 計算機システム |
| DE69130946T2 (de) * | 1990-09-18 | 1999-07-08 | Fujitsu Ltd., Kawasaki, Kanagawa | Verfahren zur ausschliesslichen steuerung für einen gemeinsamen speicher |
-
1981
- 1981-06-22 JP JP56095248A patent/JPS57211628A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57211628A (en) | 1982-12-25 |