JPS6139780B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a control system for time division switching equipment for data, voice, image information, etc. A data exchange has the function of setting a route between an incoming line and an outgoing line according to connection control information and transferring data between them, but depending on how the data is handled, line switching and There are two methods of wire storage exchange. In the circuit switching system, data is transferred after setting a communication route between incoming and outgoing lines using a selection signal.For example, as shown in Figure 1a, incoming trunk 1
The connection control information of the message received at 5 is temporarily stored in the register sender 18, this information is decoded by the marker 17, and the communication path switch 14 is closed according to the result, and at the same time, the outgoing trunk 16 is connected, Transfer message information. Therefore, arbitrary codes and data can be sent and received instantly with only a delay in propagation time, making it suitable for data that requires immediacy, such as conversational systems with strict response time requirements, as shown in Figure 2. Are suitable. It is also suitable for exchanging analog data that requires synchronization (indicated by ○). However, this method is not suitable for data with a short holding time because the cost of the common control device increases and the influence of increased connection time due to congestion is large (indicated by an x). Note that circuit switching systems include space division and time division systems, depending on the type of communication path.The latter divides the time division multiplexed data signal from the incoming line into bits or other units using selection signals in synchronization with signal pulses. It is assigned to an empty channel of a predetermined outgoing line and sent out. Next, in the store-and-forward (message exchange) method, the connection control information and message information from the incoming line are stored in the exchange, and then an empty outgoing line is selected and these signals are sent to the next exchange. , when using a computer, as shown in FIG.
After processing, it is temporarily accumulated in a magnetic drum etc. 13,
The communication control device 12 selects an outgoing line and sends out all at once. In this method, information is stored once and connections are made after waiting for an available space, which increases the efficiency of outgoing line usage.The storage function is also used to perform processing such as converting code formats and changing transmission speeds. be able to. Therefore, as shown in FIG. 2, although it is suitable for information with a short hold time, it is not suitable for transmitting information that requires immediacy or analog data that requires synchronization. Also, one type of store-and-forward method is the packet switching method, which divides data into blocks called packets of up to 1000 bits, adds connection control information to each block, and performs high-speed transfer via a switch in each block. This is the method to do it. This method makes it possible to shorten transmission delay time while taking advantage of the characteristics of the store-and-forward method. Suitable for data that requires gender. In the end, in the conventional circuit switching system, the line is held for each call, so the line is held for the duration of one call regardless of the presence or absence of messages, and when the density of messages being communicated is low, the transmission line The disadvantage is that the efficiency of the system decreases. On the other hand, in the conventional packet switching method, not only connection control information but also message information is stored in the exchange before being sent out.
This has the disadvantage that it requires a large amount of memory elements and also increases the delay time. The purpose of the present invention is to eliminate these drawbacks, reduce the amount of storage elements for storing messages and connection control information, and shorten the delay time of messages within the exchange compared to conventional packet exchanges. The object of the present invention is to provide a time division switching control method. The time division switching control method of the present invention adds connection control information to the message information in advance of each message communication request, and further searches for an empty channel on the line to transmit the communication information. The incoming line is connected to a shift register at the front stage of the time-division communication path, and the connection control information preceding the message information of each channel is read from the shift register, and the outgoing line of the corresponding message and the empty channel of the outgoing line are connected. After selecting the time-division communication path and controlling the time-division communication path according to the selection result, the corresponding message information is taken out from the shift register and route conversion and channel conversion are performed via the time-division communication path. Embodiments of the present invention will be described below with reference to the drawings. 3 and 4 are diagrams showing the configuration of the time division highway of the present invention and explanatory diagrams of the data format used in the present invention. As shown in Figure 3, a line that is time-division multiplexed in channel units, that is, a time-division highway, is
It consists of N channels per frame and x bits per channel, and an empty channel among the N channels is hunted for each telegram communication request. As shown in FIG. 4, a user's message transmitted using a hunted channel is sandwiched between a start flag and an end flag, and each message includes a header that displays peer connection control information. Note that it is necessary to set a pattern for the start flag and end flag that does not appear in the header or user data.
For example, it is conceivable to use techniques such as F pattern (01111110) used in HDLC (High Level Data Link Transmission Control Procedure) frames, header, and user data 0 insertion. FIG. 5 is a schematic block diagram of a time division switching control system showing an embodiment of the present invention. In FIG. 5, m time-division highways shown in FIG. 3 are each accommodated as an incoming highway 1 and an outgoing highway 2. The incoming highway 1 passes through a header reading unit 4 before connecting to the communication path unit 3 that converts routes and channels. The header reading section 4 has an internal shift register 4.
1 provides a time margin for connection control, and has the function of completing the operation of the time division communication path 3 during this time. That is, the header reading unit 4 stores data in the shift register 41, monitors each channel, reads the header of the channel in which the start flag appears, and sends the information to the path matching unit 6 via the information line 5. Send. The path matching unit 6 receives the incoming highway number, channel number, and connection control information read from the header sent via the information line 5, and first selects the outgoing highway 2 corresponding to the destination route. . Next, an empty channel is selected from among the N channels of the outgoing highway 2, and based on the result, the communication path section 3 is controlled to control switching of the routes and channels of the incoming and outgoing highways 1 and 2. . In this way, the path matching unit 6 performs route and channel matching, and the user data is stored in the shift register 41 in the header reading unit 4 for a time longer than the time τ until the control of the communication path unit 3 is completed. If the data is retained, intermediate highway 7 can be stored without losing the data.
is exchanged at communication route section 3, and exit highway 2
is output to. Therefore, the communication path section 3 only needs to be formed during the time during which data passes, and the efficiency of the line transmission path can be increased compared to the conventional circuit switching system. FIG. 6 is a block diagram of the header reading section in FIG. 5. Incoming highway 1 is connected to intermediate highway 7 via shift register 41 . shift·
The register 41 is the connection port 1 with the input highway 1.
As shown in FIG. 6, k channel reading sections 42 are provided for each channel and every frame interval thereafter. Note that k is set by [(start flag + header) number of bits/number of channel bits x], and if it is not divisible, the decimal point is rounded up. Information on each channel on the incoming highway is read into the channel controller 43 from the #1 channel reading section 42 located at the entrance of the shift register 41. Channel controller 43 updates the contents of channel state holding memory 44, which holds the communication state of each channel, based on the received data of each channel. The channel state holding memory 44 rotates cyclically in correspondence with N channels #0...#N-1 to multiplex process the state of each channel. Due to the operation of the channel controller 43 and channel state holding memory 44, data arrives on a certain channel i, and its header is transferred to the shift register 4.
1 and k channel readout units 4
At the time when it is determined that the header information has arrived at each of
At the same time, the header information is transmitted to the path matching unit 6 via the data information line 52. In this way, the header information is immediately sent to the path matching section 6. 7 and 8 are explanatory diagrams of the channel status of the channel state holding memory in FIG. 6, and a flowchart of the channel status transition operation. The channel status holding memory 44 includes a channel status section (ST) 441 that stores the channel status corresponding to each channel, and a counter section (CNT) that counts [start flag + header] that arrive divided into k channels. )442. The channel status (ST) is as shown in Figure 7.

[0] indicates empty, waiting for a call, [1] indicates header receiving status, [2]
When , it indicates that header reception has been completed, data is being transferred, and the state is waiting for disconnection. As shown in FIG. 8, the channel controller 43 performs state transitions each time ST=0, ST=1, and ST=2. That is, in the #1 channel reading unit 42, the data D _i of channel 1
Upon arrival, the channel controller 43 reads the channel status (ST) of channel i from the channel state holding memory 44, and (1) ST=
If it is 0, check whether D _i has a start flag in step 101, and if it is a start flag, check in step 102.
ST=1 (header being received), at step 103
Rewrite each to CNT=1 (one channel arrived). Moreover, if it is not a start flag, the state is maintained as it is. Next, (2) if ST=1, the counter unit CNT for calculating the number of channels arrived at step 111 is set to +1, and step 1
In step 12, it is checked whether the specified value k has been reached, and if it has not reached it, it is kept as it is, and if it has reached k, it is rewritten to ST=2 (header reception complete) in step 114. Then, the header information of the channel i is sent to the path matching unit 6 via the information line 5. Next, (3) if ST=2,
In step 121, it is checked whether or not it is an end flag. If it is not an end flag, the state is kept as is. If it is an end flag, ST is rewritten to 0 (empty state) in step 122, and then in step 123, the control information line is A path release request for the channel i is sent to the path matching unit 6 via the channel i, and the processing for the channel i is terminated. Each device performs the above operations for each channel in a time-division multiplexed manner, and sequentially processes data generated in each channel each time it is requested. Note that the shift register 4 used in the present invention
The bit length l of 1 can be found as follows. Now, the channel bit length x, the number of channels in a frame N, and the time division highway bit length x.
Assuming that the rate is V, the number of channels required from the start flag to the end of the header is k, and the time from the reception of the header to the completion of channel matching is τ, it takes {( k−1)N+1}x bits are required,
Furthermore, the τ time required for channel matching can be shifted.
Since .tau.V bits are required to be reserved in the register, the bit length l of shift register 41 is given by the following equation. l{(k-4)N+1}x+τV (bit)
...(1) As explained above, according to the present invention, in a time division multiplexed line, like bucket exchange,
For each message communication request, connection control information (header) is added in advance of the message information, and the system searches for an empty channel on the line, which reduces line transmission compared to the conventional circuit switching method. road efficiency can be improved. Furthermore, a shift register is connected to the time-division multiplexed incoming line to provide time margin for connection control, during which time the operation of the time-division channel is completed, making it more efficient than conventional packet switching systems. As a result, it is possible to reduce the amount of storage elements for storing messages and connection control information, and at the same time shorten the delay time of messages within the exchange.

[Brief explanation of the drawing]

Figure 1 is a schematic block diagram of the conventional circuit switching system and store-and-forward system, Figure 2 is a diagram showing the compatibility of each switching system with various types of data traffic, and Figure 3 is a diagram showing the configuration of the time division highway of the present invention. Figure 4 is an explanatory diagram of the data format used in the present invention, Figure 5 is an explanatory diagram of the data format used in the present invention.
The figure is a schematic block diagram of a time division switching control system showing an embodiment of the present invention, FIG. 6 is a block diagram of the header reading section in FIG. 5, and FIG. 7 is a channel status diagram of the channel status holding memory in FIG. FIG. 8 is a flow chart of the channel status transition operation in FIG. 1: Incoming highway, 2: Outgoing highway, 3: Communication path section, 4: Header reading section, 5: Information line, 6: Path matching section, 7: Intermediate highway, 41: Shift.
Register, 42: Channel reading section, 43: Channel controller, 44: Channel state holding memory, 441: Status section (ST), 442: Counter section (ONT), 51: Control information line, 5
2: Data information line.

Claims (1)

[Claims] 1 For each telegram communication request, connection control information is added in advance of the telegram information, and the incoming circuit is shift·
It connects to the register, reads the connection control information preceding the message information of each channel from the shift register, selects the outgoing line of the corresponding message and an empty channel of the outgoing line, and establishes a time-sharing communication path based on the selection result. After controlling, the corresponding message information is retrieved from the shift register, and route conversion and channel conversion are performed via a time division communication path.