JPS6139708A - Power supply voltage fluctuation correcting method in pulse width modulation amplifier - Google Patents

Power supply voltage fluctuation correcting method in pulse width modulation amplifier

Info

Publication number
JPS6139708A
JPS6139708A JP15898784A JP15898784A JPS6139708A JP S6139708 A JPS6139708 A JP S6139708A JP 15898784 A JP15898784 A JP 15898784A JP 15898784 A JP15898784 A JP 15898784A JP S6139708 A JPS6139708 A JP S6139708A
Authority
JP
Japan
Prior art keywords
power supply
signal
supply voltage
pulse width
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15898784A
Other languages
Japanese (ja)
Other versions
JPH0431203B2 (en
Inventor
Tsutomu Ishikawa
勉 石川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Akai Electric Co Ltd
Original Assignee
Akai Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Akai Electric Co Ltd filed Critical Akai Electric Co Ltd
Priority to JP15898784A priority Critical patent/JPS6139708A/en
Publication of JPS6139708A publication Critical patent/JPS6139708A/en
Publication of JPH0431203B2 publication Critical patent/JPH0431203B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To eliminate output fluctuation due to power supply voltage fluctuation by detecting the fluctuation of a power supply voltage fed to a power amplifier circuit, converting the detected signal into a digital signal and using the digital signal so as to correct an input signal. CONSTITUTION:When an input signal Sin is an analog signal, a level adjusting circuit 5 adjusts a level of a power supply voltage + or -V fed to a power amplifier circuit 2 from a power supply 4 and detects the fluctuation. That is, the level of a power supply voltage +V is decreased by a DELTAV, the power voltage is set to a level (a) when it is a specified voltage to a sawtooth reference pulse CP so that the upper limit of the expected fluctuation is a level (b) and the lower limit is within a level (c), and the fluctuated voltage DELTAV is inputted to a pulse width modulation (PWM) circuit 6. The PWM circuit 6 applies the pulse width modulation to the fluctuated voltage DELTAV to convert it into a digital signal. That is, the fluctuated voltage DELTAV is compared with the reference pulse Cp to output a signal A of pulse width modulation waveform going to ''H'' only at DELTAV>Cp. The duty of the signal A is selected to 10% at, e.g., the specified voltage so as to attain level adjustment by the level adjusting circuit.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、パルス幅変調アンプ(以下「PWMアンプ
」と略称する)における電源電圧変動補正方法に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power supply voltage fluctuation correction method in a pulse width modulation amplifier (hereinafter abbreviated as "PWM amplifier").

〔従来の技術〕[Conventional technology]

PWMアンプは、入力信号のレベルをパルス波形のデユ
ーティによって表わすパルス幅変調波に変換して電力増
幅するもので、例えば第4図に示すように、パルス幅変
調(PWM)回路1と電力増幅回路2とローパスフィル
タ3及び電源4とによって構成される。
A PWM amplifier converts the level of an input signal into a pulse width modulated wave represented by the duty of a pulse waveform and amplifies the power. For example, as shown in Fig. 4, a pulse width modulation (PWM) circuit 1 and a power amplifier circuit are used. 2, a low-pass filter 3, and a power supply 4.

そして、PWM回路1としては、例えば第S図に余すよ
うな比較器を使用し、第6図(イ)に示すようなアナロ
グの入力信号Sinを鋸歯状波の基準パルスCpと比較
して、Sin>CPの時に出方を”H= 、5in(C
pの時に出力をL″にして同図(ロ)に示すようなパル
ス幅変調波の信号Sp↓川に変換する。
The PWM circuit 1 uses, for example, a comparator like the one shown in FIG. S, and compares the analog input signal Sin as shown in FIG. When Sin>CP, the output is “H=, 5in(C
When p, the output is set to L'' and converted into a pulse width modulated wave signal Sp↓ as shown in FIG.

この信号SpwI11のデユーティT■/Tが入力信号
レベルに対応する。
The duty T■/T of this signal SpwI11 corresponds to the input signal level.

電力増幅回路2は、例えば第5図に示すように直列接続
したNPN型とPNP型のパワートランジスタQl’、
Q2を正負電源の間に接続し、PWM回路1からのパル
ス−変調波の信号Sp%1I11によってこのパワー1
ランジスタQl、Q2をオン・オフ制御(S ptrm
が゛” H”のときはQlがオンでQ2がオフ、Spt
imがT−″のときはQ2がオンでQIがオフ)し、両
l・ランジスタQ+ とQ2のエミッタ接続点から第6
図(ハ)に示すような電力増幅されたパルス幅変調波に
よる出力信号Spaを得る。
The power amplifier circuit 2 includes, for example, NPN type and PNP type power transistors Ql' connected in series as shown in FIG.
Q2 is connected between the positive and negative power supplies, and this power 1 is controlled by the pulse-modulated wave signal Sp%1I11 from the PWM circuit 1.
On/off control of transistors Ql and Q2 (S ptrm
When is “H”, Ql is on and Q2 is off, Spt
When im is T-'', Q2 is on and QI is off), and the sixth transistor is connected from the emitter connection point of transistor Q+ and Q2.
An output signal Spa as a power amplified pulse width modulated wave as shown in FIG. 3(C) is obtained.

この出力信号Spoをローパスフィルタ3を通すと、高
周波成分が除去されて第6図(ニ)に示すように、入力
信号Sinと相似波形の出力信号S out(出力信号
Spaのデユーティに応じたレベルの信号で、テ゛ニー
ティ50%の時出力レベルが0)となる。
When this output signal Spo is passed through a low-pass filter 3, high frequency components are removed, and as shown in FIG. With this signal, the output level becomes 0 when the unity is 50%.

なお、この出力信号によって例えばスピーカを駆動する
ような場合には、そのボイスコイルがローパスフィルタ
の役目をなすので、電力増幅回路2の出力信号を直接ス
ピーカに供給することができる。
Note that when this output signal drives a speaker, for example, the voice coil serves as a low-pass filter, so that the output signal of the power amplifier circuit 2 can be directly supplied to the speaker.

また、入力信号Sinがパルス符号化されたデジタル信
号(PCM信号)である場合には、PWM回路としてP
CM/PWM変換器を用いてパルス幅変調波の信号に変
換すればよい。
In addition, if the input signal Sin is a pulse-encoded digital signal (PCM signal), the PWM circuit
The signal may be converted into a pulse width modulated wave signal using a CM/PWM converter.

このようなPWMアンプは、回路構成が簡単で。This kind of PWM amplifier has a simple circuit configuration.

しかも電力増幅をパワートランジスタのオン・オフによ
るスイッチング動作によって行なうため効率が常に略1
00%であり、その有用性が注目されている。
Moreover, since power amplification is performed by switching on and off of power transistors, the efficiency is always approximately 1.
00%, and its usefulness is attracting attention.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、このようなPWMアンプは、上述のよう
に電力増幅をパワートランジスタのスイッチング動作に
よって行ない、常に電源電圧をパルス幅変調して出力す
ることになるため、電源電圧が変動すると、例えば第6
図(ハ)に破線で示すように、全ての信号レベルにおい
てその影響がそのまま出力信号波形に表われてしまうと
いう問題点があった。
However, as described above, such a PWM amplifier performs power amplification by the switching operation of the power transistor, and always outputs the power supply voltage by pulse width modulation. Therefore, when the power supply voltage fluctuates, for example, the
As shown by the broken line in Figure (C), there is a problem in that the effect of this effect is directly reflected in the output signal waveform at all signal levels.

この問題を解決するため、電力増幅回路のパワートラン
ジスタを完全にオンさせないようにその入力側でPWM
信号の振幅を制限する方法があるが、この方法では出力
段の効率を下げてしまうことになり、PWMアンプの最
大のメリットを低下させる結果になる。
To solve this problem, PWM is applied to the input side of the power transistor of the power amplifier circuit so as not to turn it on completely.
Although there is a method of limiting the amplitude of the signal, this method reduces the efficiency of the output stage, resulting in a reduction in the greatest advantage of the PWM amplifier.

〔問題点を解決するための手段〕[Means for solving problems]

この命明によるパルス幅変調アンプにおける電源電圧変
動補正方法は、上記の問題点を解決するため、電力増幅
回路に供給する電源電圧の変動を検出してデジタル信号
に変換し、そのデジタル信号によって入力信号又はその
パルス幅変調波を補正して、電源電圧変動による出力変
動をなくすようにしたものである。
In order to solve the above-mentioned problems, this method of correcting power supply voltage fluctuations in pulse width modulation amplifiers based on this proposal detects fluctuations in the power supply voltage supplied to the power amplifier circuit, converts it into a digital signal, and inputs the digital signal using the digital signal. The signal or its pulse width modulated wave is corrected to eliminate output fluctuations due to power supply voltage fluctuations.

〔実施例〕〔Example〕

以下、この発明の実施例を第1図乃至第3図を参照して
説明する。
Embodiments of the present invention will be described below with reference to FIGS. 1 to 3.

第1図は、入力信号Sjnがアナログ信号の場合の一実
施例を示すPWMアンプのブロック構成図であり、第4
図の従来例と同じ部分には同一符号を付してあり、それ
らの説明は省略する。
FIG. 1 is a block configuration diagram of a PWM amplifier showing an example in which the input signal Sjn is an analog signal.
The same parts as in the conventional example in the figure are given the same reference numerals, and their explanation will be omitted.

レベル調整回路5は、電源4から電力増幅回路2に供給
する電源電圧±Vのレベルを調整して変動分を検出する
役目をなすものである。
The level adjustment circuit 5 has the role of adjusting the level of the power supply voltage ±V supplied from the power supply 4 to the power amplifier circuit 2 and detecting the variation.

電源電圧+■と一■の絶対値は等しいので、その一方の
電圧十Vのレベルを第2図(イ)にΔVで示すように下
げて、鋸歯状波の基準パルスCpに対して、電源電圧が
規定電圧の時にaのレベルになり、予想される変動の」
−眼がbのレベル、下限がCのレベル内に納まるように
し、この変動電圧ΔVをPWM回路6に入力させる。
Since the absolute values of the power supply voltages +■ and -■ are equal, the level of one of the voltages, 10 V, is lowered as shown by ΔV in Figure 2 (A), and the power supply voltage is When the voltage is at the specified voltage, it will be at the level a, and the expected fluctuation will be
- Make sure that the eye is within the level b and the lower limit is within the level C, and input this fluctuating voltage ΔV to the PWM circuit 6.

PWM回路6は、この変動電圧ΔVをパルス幅変調して
デジタル信号に変換する役目をなす。
The PWM circuit 6 serves to pulse width modulate this fluctuating voltage ΔV and convert it into a digital signal.

すなわち、第2図(イ)に示すように変動電圧ΔVを基
準パルスCpと比較して、同図(ロ)に示すようにΔV
>Cpの時だけH″になるパルス幅変調波形の信号Aを
出力する。
That is, as shown in FIG. 2 (a), the fluctuating voltage ΔV is compared with the reference pulse Cp, and as shown in FIG.
>Cp, a signal A with a pulse width modulation waveform that becomes H'' is output.

この信号Aのチューティが、電源電圧の変動によって例
えば0〜20%の間で変化し、規定電圧の時に10%に
なるように、前述のレベル調整回路によるレベル調整を
行なう。
The level adjustment is performed by the level adjustment circuit described above so that the tute of this signal A changes, for example, between 0 and 20% due to fluctuations in the power supply voltage, and becomes 10% at the specified voltage.

この信号Aをインバータ7によって反転して、第2図(
ハ)に示ようなデユーティが80〜100%の間で変化
するパルス波形のデジタル信号Bにし、これをアンド回
路8に入力する。
This signal A is inverted by the inverter 7 and is
A digital signal B having a pulse waveform with a duty varying between 80 and 100% as shown in c) is generated and inputted to the AND circuit 8.

アンド8は、この信号BとPWM回路1から入力する第
2図(ニ)に示すようなパルス幅変調された信号S p
wmとのアンドをとり、同図(ホ)に示すように、信号
S pwmがH″のパルス幅を信号BがL″の期間だけ
減らしてデユーティを補正した信号Spwm’ を電力
増幅回路2に入力させる。
AND 8 combines this signal B with a pulse width modulated signal S p as shown in FIG. 2 (d) input from the PWM circuit 1.
As shown in the same figure (e), the pulse width of the signal Spwm is H'' is reduced by the period that the signal B is L'', and the duty is corrected. Let them input.

この補正量は、電源電圧の変動を相殺するように変化し
、電源電圧が規定値より大きくなると出力信号Spoの
デユーティの減少を10%以上にし、電源電圧が規定値
より小さくなると10%以下にする。
This correction amount changes to offset fluctuations in the power supply voltage, and when the power supply voltage becomes larger than the specified value, the duty of the output signal Spo is reduced by 10% or more, and when the power supply voltage becomes smaller than the specified value, it decreases by 10% or less. do.

ローパスフィルタ3を通した出力信号S outのパワ
ーは、電力増幅回路2の出力信号Spoの振幅とデユー
ティの積に比例するので、電源電圧の変動によって第6
図(ハ)に破線で示したように出力信号Spoの振幅が
変化しても、その分だけ上述のようにデユーティを補正
することによって出力信号S outのパワー変動をな
くすことができる。
Since the power of the output signal Sout passed through the low-pass filter 3 is proportional to the product of the amplitude and duty of the output signal Spo of the power amplifier circuit 2, the power of the output signal Sout that has passed through the low-pass filter 3 is
Even if the amplitude of the output signal Spo changes as shown by the broken line in FIG.

なお、この実施例によると、電源電圧が規定値の時でも
電力増幅回路2へ入力するパルス幅変調波の信号のデユ
ーティを一定量(例えば10%)だけ小さくしてしまう
ので、ダイナミックレンジがそれだけ減少することにな
る゛が、電源電圧の変動幅はそれ程大きくないので実用
上問題はない。
According to this embodiment, even when the power supply voltage is at the specified value, the duty of the pulse width modulated wave signal input to the power amplifier circuit 2 is reduced by a certain amount (for example, 10%), so the dynamic range is reduced accordingly. However, since the fluctuation range of the power supply voltage is not that large, there is no practical problem.

さらに、この点を改善するために、第1図のアンド回路
8の出力信号S pwm’ に、一定のデユーティ(例
えば10%)分だけパルス幅を増加させる回路を設けれ
ば、電源電圧が規定値の時に、出力信号Spwm’のデ
ユーティがPWM回路1の出力信号S pwmのデユー
ティと同じになるようにすることができる。
Furthermore, in order to improve this point, if a circuit is provided for increasing the pulse width by a certain duty (for example, 10%) in the output signal S pwm' of the AND circuit 8 in FIG. The duty of the output signal Spwm' can be made to be the same as the duty of the output signal Spwm of the PWM circuit 1 when the value of the output signal Spwm' is the same as that of the output signal Spwm of the PWM circuit 1.

次に、第3図によって入力信号Sjnがデジタル信号(
PCM信号)である場合の実施例を説明する。
Next, according to FIG. 3, the input signal Sjn is converted into a digital signal (
An example in which the signal is a PCM signal will be described.

この場合には、電源4から電力増幅回路2に供給される
電源電圧上■の絶対値を規定値と比較とするなどにより
、その変動分ΔVを電圧変動検出回路10によって検出
する。
In this case, the absolute value of the power supply voltage supplied from the power supply 4 to the power amplifier circuit 2 is compared with a specified value, and the variation ΔV is detected by the voltage fluctuation detection circuit 10.

この変動分ΔVt1−A/D変換器によって正負を反転
して入力信号Sinと同様なデジタル信号Dvに変換す
る。
This variation ΔVt1 is converted into a digital signal Dv similar to the input signal Sin by inverting the sign and negative by the A/D converter.

このデジタル信号Dvを加算器12に入力する。This digital signal Dv is input to the adder 12.

加算器12は、入力信号Sinとこの電圧変動に応じた
デジタル信号Dvとを加算して(電源電圧が規定値より
大きくなった時は負の値を加算し、規定値より小さくな
った時は正の値を加算する)、入力信号Sinのデジタ
ル値を補正する。
The adder 12 adds the input signal Sin and the digital signal Dv according to this voltage fluctuation (when the power supply voltage becomes larger than a specified value, a negative value is added; when it becomes smaller than the specified value, a negative value is added; (adding a positive value), the digital value of the input signal Sin is corrected.

その補正した入力信号^in′ をPCM/PWM変換
器13゛に入力してパルス幅変調波の信号Spw+eに
変換し、電力増幅回路2によって電力増幅し゛てローパ
スフィルタ′3を通して出力する。
The corrected input signal ^in' is input to the PCM/PWM converter 13' and converted into a pulse width modulated wave signal Spw+e, which is power amplified by the power amplifier circuit 2 and outputted through the low-pass filter '3.

CkはA/D変換器11とPCM/PWM変換器13の
動作□タイミングの同期をとるためのクローツクパルス
である。
Ck is a clock pulse for synchronizing the operation timings of the A/D converter 11 and the PCM/PWM converter 13.

このように、入力信号Sinがデジタル信号の場合には
、電圧変動分をデジタル信号に変換し、それを入力信号
Sinに直接加算(又は減算)することによって補正し
て、電源電圧変動による出力変動をなくすことができる
In this way, when the input signal Sin is a digital signal, the voltage fluctuation is converted into a digital signal, and it is directly added (or subtracted) to the input signal Sin to correct the output fluctuation due to the power supply voltage fluctuation. can be eliminated.

〔発明の効果〕〔Effect of the invention〕

以上説明してきたように、この発明によれば、PWMア
ンプにおける電力増幅回路の増幅効率を低下させること
なく、電源電圧の変動分を確実に補正して出力信号に対
する影響をなくすことができる。       ”
As described above, according to the present invention, it is possible to reliably correct the variation in power supply voltage and eliminate the influence on the output signal without reducing the amplification efficiency of the power amplifier circuit in the PWM amplifier. ”

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、この発明の一実施例を示すPWMアンプの加
ツク竺、成図、 第2図は、第1図の轡施例の動作説明のための各第3図
ニア7::二:−の実施例を示すPWMアンプのブーツ
ク構成図である。 第4図は、従来のPW′Mアンプの一例を示すブロック
構成図。 第5図は、同じくそのPWM回路と電力増幅回路の具体
例を示す、回路図、 第6図は、第4図の従:来例の動作説明のための各部の
信号波形図モある。 1・・・PWM回路     2・・・電力増幅回路3
・・・ローパスフィルタ  4・・・電源5・・・レベ
ル調整回路   6・・・PWM回路7・・・インバー
タ     8・・・アンド回路10・・・電圧変動検
出回路 11・・・A/D変換器   12・・・加算器13・
・PCM/PWM変換器
FIG. 1 is a schematic drawing of a PWM amplifier showing an embodiment of the present invention, and FIG. It is a boot storage block diagram of the PWM amplifier which shows the Example of :-. FIG. 4 is a block diagram showing an example of a conventional PW'M amplifier. FIG. 5 is a circuit diagram showing a specific example of the PWM circuit and the power amplifier circuit, and FIG. 6 is a signal waveform diagram of each part for explaining the operation of the conventional/conventional example of FIG. 1...PWM circuit 2...Power amplifier circuit 3
... Low pass filter 4 ... Power supply 5 ... Level adjustment circuit 6 ... PWM circuit 7 ... Inverter 8 ... AND circuit 10 ... Voltage fluctuation detection circuit 11 ... A/D conversion Device 12... Adder 13...
・PCM/PWM converter

Claims (1)

【特許請求の範囲】[Claims] 1 入力信号をパルス幅変調波に変換して電力幅増回路
のパワートランジスタをオン・オフ制御することによつ
て電力増幅するパルス幅変調アンプにおいて、前記電力
増幅回路に供給する電源電圧の変動を検出してデジタル
信号に変換し、該デジタル信号によつて前記入力信号又
はそのパルス幅変調波を補正して前記電源電圧の変動に
よる出力変動をなくすことを特徴とする電源電圧変動補
正方法。
1 In a pulse width modulation amplifier that amplifies power by converting an input signal into a pulse width modulation wave and controlling on/off of a power transistor of a power width amplification circuit, fluctuations in the power supply voltage supplied to the power amplification circuit are A method for correcting power supply voltage fluctuations, comprising: detecting the input signal and converting it into a digital signal, and correcting the input signal or its pulse width modulated wave using the digital signal to eliminate output fluctuations due to fluctuations in the power supply voltage.
JP15898784A 1984-07-31 1984-07-31 Power supply voltage fluctuation correcting method in pulse width modulation amplifier Granted JPS6139708A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15898784A JPS6139708A (en) 1984-07-31 1984-07-31 Power supply voltage fluctuation correcting method in pulse width modulation amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15898784A JPS6139708A (en) 1984-07-31 1984-07-31 Power supply voltage fluctuation correcting method in pulse width modulation amplifier

Publications (2)

Publication Number Publication Date
JPS6139708A true JPS6139708A (en) 1986-02-25
JPH0431203B2 JPH0431203B2 (en) 1992-05-25

Family

ID=15683738

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15898784A Granted JPS6139708A (en) 1984-07-31 1984-07-31 Power supply voltage fluctuation correcting method in pulse width modulation amplifier

Country Status (1)

Country Link
JP (1) JPS6139708A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0447002A2 (en) * 1990-03-15 1991-09-18 Magnavox Electronic Systems Company Dual path amplitude modulated RF amplifier
WO2003005570A1 (en) * 2001-07-03 2003-01-16 Niigata Seimitsu Co., Ltd. Audio reproducing device and method, audio amplifier, and integrated circuit for audio amplifier
US6518838B1 (en) 1999-02-05 2003-02-11 Texas Instruments Denmark A/S Circuit for compensating noise and errors from an output state of a digital amplifier
US6768779B1 (en) 1997-04-02 2004-07-27 Bang & Olufsen Powerhouse A/S Pulse referenced control method for enhanced power amplification of a pulse modulated
EP1447907A1 (en) * 2003-02-17 2004-08-18 Denon, Ltd. Pulse width modulation amplifier
JP2005278039A (en) * 2004-03-26 2005-10-06 Onkyo Corp Switching amplifier
JP2007124370A (en) * 2005-10-28 2007-05-17 Oki Electric Ind Co Ltd Amplifier circuit
US7239200B2 (en) 2002-11-15 2007-07-03 Matsushita Electric Industrial Co., Ltd. Power amplifying apparatus
JP2008047945A (en) * 2005-03-28 2008-02-28 Nec Saitama Ltd Amplifier apparatus
JP2011004221A (en) * 2009-06-19 2011-01-06 Arrow Co Ltd Warning sound generation circuit
US9001881B2 (en) 2011-05-09 2015-04-07 Panasonic Intellectual Property Management Co., Ltd. Wireless power and data transmission system, power transmitting apparatus, and power receiving apparatus

Cited By (14)

* Cited by examiner, † Cited by third party
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EP0447002A2 (en) * 1990-03-15 1991-09-18 Magnavox Electronic Systems Company Dual path amplitude modulated RF amplifier
US6768779B1 (en) 1997-04-02 2004-07-27 Bang & Olufsen Powerhouse A/S Pulse referenced control method for enhanced power amplification of a pulse modulated
US6518838B1 (en) 1999-02-05 2003-02-11 Texas Instruments Denmark A/S Circuit for compensating noise and errors from an output state of a digital amplifier
WO2003005570A1 (en) * 2001-07-03 2003-01-16 Niigata Seimitsu Co., Ltd. Audio reproducing device and method, audio amplifier, and integrated circuit for audio amplifier
US7102426B2 (en) 2001-07-03 2006-09-05 Niigata Seimitsu Co., Ltd. Audio reproducing device and method, audio amplifier, and integrated circuit for audio amplifier
US7239200B2 (en) 2002-11-15 2007-07-03 Matsushita Electric Industrial Co., Ltd. Power amplifying apparatus
US6967527B2 (en) 2003-02-17 2005-11-22 Denon, Ltd. Pulse width modulation amplifier
EP1447907A1 (en) * 2003-02-17 2004-08-18 Denon, Ltd. Pulse width modulation amplifier
JP2005278039A (en) * 2004-03-26 2005-10-06 Onkyo Corp Switching amplifier
US7224217B2 (en) 2004-03-26 2007-05-29 Onkyo Corporation Switching amplifier
JP2008047945A (en) * 2005-03-28 2008-02-28 Nec Saitama Ltd Amplifier apparatus
JP2007124370A (en) * 2005-10-28 2007-05-17 Oki Electric Ind Co Ltd Amplifier circuit
JP2011004221A (en) * 2009-06-19 2011-01-06 Arrow Co Ltd Warning sound generation circuit
US9001881B2 (en) 2011-05-09 2015-04-07 Panasonic Intellectual Property Management Co., Ltd. Wireless power and data transmission system, power transmitting apparatus, and power receiving apparatus

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