JPS6136956A - Ultraviolet erasing type semiconductor device - Google Patents
Ultraviolet erasing type semiconductor deviceInfo
- Publication number
- JPS6136956A JPS6136956A JP15966084A JP15966084A JPS6136956A JP S6136956 A JPS6136956 A JP S6136956A JP 15966084 A JP15966084 A JP 15966084A JP 15966084 A JP15966084 A JP 15966084A JP S6136956 A JPS6136956 A JP S6136956A
- Authority
- JP
- Japan
- Prior art keywords
- ultraviolet
- chip
- semiconductor device
- erasing type
- ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/18—Circuits for erasing optically
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16151—Cap comprising an aperture, e.g. for pressure control, encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は紫外線消去型半導体装置に係り、特に紫外線を
通す透光部構造に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an ultraviolet erasable semiconductor device, and more particularly to a light-transmitting structure that transmits ultraviolet rays.
従来例の構成とその問題点
近時情報処理装置等に於て、紫外線消去型の消去、書き
込み可能な半導体記憶装置（以下、ＥＰ’−ＲＯＭと略
す）が多く用いられている。2. Description of the Related Art Structures of Conventional Examples and Their Problems Recently, ultraviolet erasable erasable and writable semiconductor memory devices (hereinafter abbreviated as EP'-ROMs) have been widely used in information processing devices and the like.
従来、ＥＰ−ＲＯＭは第１図（イ）の断面図に示すよう
に、セラミック・ケース内に封止したもの１、或いは第
１図（ロ）、（ハ）の平面図および断面図のように、プ
ラスチック・ケースを用いて形成されたものが一般的で
ある。Conventionally, EP-ROMs have been sealed in a ceramic case 1, as shown in the cross-sectional view of Figure 1 (A), or as shown in the plan view and cross-sectional view of Figures 1 (B) and (C). Generally, they are made using a plastic case.
即ち、従来はＥＰ−ＲＯＭチップ１又は２２のＦにガラ
ス窓３或いは透光体２７がのり、この面と反対の面、い
わゆる裏面側に外部リード８，２５を引き出していた。That is, conventionally, a glass window 3 or a transparent body 27 was placed on the F of the EP-ROM chip 1 or 22, and the external leads 8, 25 were drawn out to the opposite side, the so-called back side.
従来の構造においては、プリント基板或いはセット回路
板にＥＰ−ＲＯＭを挿入した時、ガラス窓あるいは透光
体のような透光部が表面に出るため、実動作時には、紫
外線が外部からこの透光部を通してＥＰ−ＲＯＭチップ
に達して記憶内容がこわれないように、同透光部の表面
を別の光じゃへい物でおおう必要があった。又、この透
光部表面のくもり等の汚染が加わり易く、紫外線の消去
特性が悪くなる等の問題もあった。In the conventional structure, when an EP-ROM is inserted into a printed circuit board or a set circuit board, a transparent part such as a glass window or a transparent body comes out to the surface, so during actual operation, ultraviolet rays are absorbed from the outside. It was necessary to cover the surface of the light-transmitting part with another light barrier so that the stored contents would not be damaged by reaching the EP-ROM chip through the light-transmitting part. Further, there are also problems in that the surface of the light-transmitting portion is easily contaminated by clouding, and the erasing characteristics of ultraviolet rays are deteriorated.
発明の目的
本発明は上記問題点を解消することの可能な紫外線消去
型半導体装置を提供するものである。OBJECTS OF THE INVENTION The present invention provides an ultraviolet erasable semiconductor device that can solve the above problems.
発明の構成
本発明は、紫外線消去型半導体装置の構造に於頼性のＥ
Ｐ−ＲＯＭの実現が可能である。Structure of the Invention The present invention provides reliable E in the structure of an ultraviolet erasable semiconductor device.
It is possible to implement a P-ROM.
実施例の説明 以下木発ツ１の実施例について詳細に説明する。Description of examples The embodiment of Kibatsu 1 will be described in detail below.
第２図（イ）は、本発明を適用したセラミ、り・ケース
ＥＰ−ＲＯＭの断面図、第２Ｎ−）および（ハ）は、そ
れぞれ樹脂対１［；’４ＥＰ−ＲＯＭの実施例断面構造
である。第２図（イ）で、ＥＰ−ＲＯＭチンチップがセ
ラミック・ケース４２内に配設され、このセラミック・
ケース４２の下側にガラス窓４３を有する金属蓋（又は
セラミック蓋）４４がろう材（又は低融点ガラス）４５
によって気密封着された構造になっている。なお、同図
中、４６はチップ・ステージ、４了は内部配線、４８が
外部リードであり、この外部リード４８の先端は、チッ
プ４１に対して窓側に出ている。４９はボンディング・
ワイヤ５０はボンディング・パッド、５１は金シリコン
（Ａｕ −Ｓｉ ）合金、６２はメタライズ部を示して
いる。第２図（ロ）では、ＥＰ−ＲＯＭチップ６２の下
側に透光体６７があり、透光体６γの下面がモールド樹
脂６９の下面に表出する。６５の外部リードが、チップ
６２に対して透光体６７と同一の側に出ている。第２図
（ｃ＋の実施例では、ＥＰ−ＲＯＭチップ８２の周囲を
紫外線を通すシリコーン樹脂８７でモールドし、更にそ
の１わりを所定の形状にエポキシ等の樹脂８８でモール
ドしたものである。この場合、チップをおおうシリコー
ン樹脂８７の下面がモールド樹脂８８の下面に表出する
。８５が外部リードであり、チップ８２に対してシリコ
ーン樹脂８７と同一の側に折り曲げられている。FIG. 2(A) is a cross-sectional view of a ceramic case EP-ROM to which the present invention is applied, and FIG. It is. In FIG. 2(a), an EP-ROM chip is disposed within a ceramic case 42, and this ceramic
A metal lid (or ceramic lid) 44 having a glass window 43 on the lower side of the case 42 is filled with a brazing material (or low melting point glass) 45
It has a hermetically sealed structure. In the figure, 46 is a chip stage, 4 is an internal wiring, and 48 is an external lead, and the tip of the external lead 48 is exposed to the window side with respect to the chip 41. 49 is bonding
A wire 50 is a bonding pad, 51 is a gold-silicon (Au-Si) alloy, and 62 is a metallized portion. In FIG. 2(B), a light transmitting body 67 is provided below the EP-ROM chip 62, and the lower surface of the light transmitting body 6γ is exposed on the lower surface of the molding resin 69. External leads 65 protrude from the chip 62 on the same side as the transparent body 67 . In the embodiment shown in FIG. 2 (c+), the periphery of the EP-ROM chip 82 is molded with a silicone resin 87 that transmits ultraviolet rays, and a portion of it is further molded into a predetermined shape with a resin 88 such as epoxy. In this case, the lower surface of the silicone resin 87 covering the chip is exposed on the lower surface of the mold resin 88. 85 is an external lead, which is bent to the same side as the silicone resin 87 with respect to the chip 82.
発明の詳細
な説明したように、本発明によれば、紫外線消去型のＥ
Ｐ−ＲＯＭを従来製品とピンコンパチブルで、紫外線を
通すガラス窓或いは透光体と同一側に金属リードを出す
ことにより、このＥＰ−ＲＯＭの実使用時にガラス窓或
いは透光体が表面に出ることなく裏面に出るように取り
付けられる。As described in detail, according to the present invention, ultraviolet erasable E
By making the P-ROM pin-compatible with conventional products and protruding the metal lead on the same side as the glass window or transparent material that allows ultraviolet rays to pass through, the glass window or transparent material can be exposed to the surface when this EP-ROM is actually used. It can be installed so that it appears on the back side without any problems.
このため、ＥＰ−ＲＯＭの記憶内容が不要の紫外線によ
って消去されることがなく、ガラス窓或いは透光体でな
る透光部の表面が使用時にきすがつくなどして紫外線の
透過性が悪くなることもほとんど起らない。Therefore, the stored contents of the EP-ROM are not erased by unnecessary ultraviolet rays, and the surface of the transparent part made of a glass window or transparent material becomes scratched during use, resulting in poor ultraviolet ray transmittance. It almost never happens.
第１図（イ）は従来のＥＰ−ＲＯＭのセラミックケース
の断面図、同図（ロ）はそのプラスチック完成体の上面
図、同図（ハ）は同図（ロ）のＡ −Ａ’断面図、第２
図Ｇ）は本発明のＥＰ−ＲＯＭに於けるセラミックケー
スの断面図、同図（ロ）はプラスチック完成体の断面図
、同図（ハ）は別のプラスチック完成体の断面図である
。
１．２２，４１．６２．８２・・印・チップ、３゜４３
・・・・・・ガラス窓、２７．６７．８７・・・・・・
透光体。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
特開Ｉ］ＲＧＩ−３６９５６（３）
丙２図Figure 1 (A) is a cross-sectional view of the ceramic case of a conventional EP-ROM, Figure 1 (B) is a top view of the completed plastic case, and Figure 1 (C) is the A-A' cross section of Figure 1 (B). Figure, 2nd
Figure G) is a cross-sectional view of the ceramic case in the EP-ROM of the present invention, Figure (B) is a cross-sectional view of a completed plastic body, and Figure (C) is a cross-sectional view of another completed plastic body. 1.22, 41.62.82...mark/chip, 3°43
...Glass window, 27.67.87...
Translucent body. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure JP-A-I] RGI-36956 (3) Figure 2
Claims (1)
とを特徴とする紫外線消去型半導体装置。An ultraviolet erasable semiconductor device characterized in that a transparent part that transmits ultraviolet rays is provided on the back side of the package.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15966084A JPS6136956A (en) | 1984-07-30 | 1984-07-30 | Ultraviolet erasing type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15966084A JPS6136956A (en) | 1984-07-30 | 1984-07-30 | Ultraviolet erasing type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6136956A true JPS6136956A (en) | 1986-02-21 |
Family
ID=15698555
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15966084A Pending JPS6136956A (en) | 1984-07-30 | 1984-07-30 | Ultraviolet erasing type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6136956A (en) |
-
1984
- 1984-07-30 JP JP15966084A patent/JPS6136956A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0580987A1 (en) | Semiconductor device having a flag with opening | |
| US5115299A (en) | Hermetically sealed chip carrier with ultra violet transparent cover | |
| US4766095A (en) | Method of manufacturing eprom device | |
| JPH07120732B2 (en) | EPROM type semiconductor device erasable by ultraviolet rays and manufacturing method thereof | |
| JPH026192A (en) | Personal data card and manufacture thereof | |
| JPS6136956A (en) | Ultraviolet erasing type semiconductor device | |
| JPS58210646A (en) | Ic chip mold product | |
| JPS62241358A (en) | One-time program type semiconductor device | |
| JPS58207656A (en) | Resin-sealed type semiconductor device | |
| JPS62131555A (en) | Semiconductor integrated circuit device | |
| JPS62239554A (en) | Ic card type ep-rom structure | |
| JPS6130743B2 (en) | ||
| JPS5989469A (en) | Semiconductor memory device | |
| US4918512A (en) | Semiconductor package having an outwardly arced die cavity | |
| JPS63133653A (en) | Optically erasable semiconductor storage device | |
| JPS5814553A (en) | Semiconductor device | |
| JPS60194552A (en) | Hybrid ic device | |
| JPH09298249A (en) | Semiconductor device | |
| JPH02110961A (en) | Semiconductor element lead frame structure and manufacture thereof | |
| JPS6237790A (en) | Semiconductor device | |
| JPS58128755A (en) | Semiconductor device | |
| JPS62136053A (en) | Semiconductor device | |
| JPS592155U (en) | Resin-encapsulated integrated circuit | |
| JPH03203355A (en) | Ultraviolet-erasable semiconductor device | |
| JPS62152144A (en) | Package for semiconductor device |