JPS6135620B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention is applied, for example, to recording a PCM signal obtained by PCM modulating an audio signal onto a magnetic tape using a fixed head.
Concerning a PCM signal recording method. It is desirable that the recording format, such as the number of occupied tracks per channel, be unified in order for fixed head type PCM recording and reproducing devices to be widely used. However, when recording PCM signals encoded with the same redundancy at the same linear density, the number of tracks is inversely proportional to the tape speed. It is difficult to unify the format.
For example, the method of recording one channel of PCM signal as one track is advantageous in that many channels can be recorded, but at the same time the tape speed becomes faster.
Inconveniences arise in that the recording time for a predetermined amount of magnetic tape is shortened, and that it becomes troublesome to design a tape drive mechanism for controlling tape running in a predetermined manner. Conversely, recording a single channel of PCM signal by dividing it into multiple tracks allows the tape speed to be slowed down, but does not allow for a large number of channels. In view of this, the present invention proposes a compatible PCM signal recording method that is capable of reproducing any of a plurality of recording formats that differ in the number of occupied tracks per channel. Further, according to the present invention, it is possible to realize a fixed head type PCM signal recording and reproducing apparatus that can record and reproduce PCM signals in an optimal recording format depending on the purpose of use. An embodiment of the present invention will be described below with reference to the drawings. In this example, PCM signals are recorded in three different recording formats with different numbers of occupied tracks per channel. The number of data tracks formed on a magnetic tape depends on the width of the magnetic tape. As shown in FIG. 1A, eight data tracks _TD1 to _TD8 are formed on a magnetic tape 1 having a width of 1/4 inch. Tracks TA ₁ and TA ₂ on which analog signals are recorded are formed along the upper and lower edges of the magnetic tape 1, and between the analog tracks TA ₁ and TA ₂ , eight data tracks TD ₁ to _{TD 8} and a control track are formed. Track TC and time code track TT are positioned. In this case, magnetic tape 1
Control track TC is located above the center (indicated by a dashed line), and data tracks TD ₁ to _{TD 4} are located between analog track TA ₁ and track TC.
A time code track TT is located below the center of the magnetic tape 1, and data tracks _TD5 to _TD8 are located between this track TT and the analog track _TA2 . As shown in the figure, for data tracks TD ₁ to TD ₈ , (track pitch: a) (track width: b)
(guard width: c), analog track TA ₁ ,
Regarding TA ₂ , assuming that (clearance: d) (track width: e) and tape width is f, each dimension is determined as follows. a = 480 [μm] b = 280 ~ 380 [μm] c = 200 ~ 100 [μm] d = 540 [μm] e = 445 [μm] f = 6.30 [mm] ⁺⁰ _-20 [μm] Also, magnetic tape The track pattern in case 1 is 1/2 inch wide is shown in FIG. 1B. Analog tracks TA ₁ and TA ₂ are formed along the upper and lower edges of the magnetic tape 1, and 12 data tracks TD ₁ to TD are formed in the upper half.
TD ₁₂ and control track TC are formed,
A time code track TT and 12 data tracks TD ₁₃ to _{TD 24} are formed in the lower half. Each dimension is shown below. a = 440 [μm] b = 240 ~ 340 [μm] c = 200 ~ 100 [μm] d = 500 [μm] e = 325 [μm] f = 12.65 [mm] ±10 [μm]
m] Furthermore, a track pattern when the magnetic tape 1 has a width of 1 inch is shown in FIG. 1C. Analog tracks TA ₁ and TA ₂ are formed along the upper and lower edges of the magnetic tape 1, and 24 data tracks TD ₁ to TD are formed in the upper half.
TD ₂₄ and control track TC are formed,
A time code track TT and 24 data tracks TD ₂₅ to TD ₄₈ are formed in the lower half. Each dimension is shown below. a = 480 [μm] b = 280 ~ 380 [μm] c = 200 ~ 100 [μm] d = 540 [μm] e = 325 [μm] f = 25.35 [mm] ±10 [μm]
m] Of course, there is no need to consider compatibility when the width of the magnetic tape 1 is different. As an example 1/
The recording format for a tape width of 4 inches is shown below.

[Table] The above tape speeds are values when the sampling frequency _s of the PCM signal is 50.4 [KHz].
In addition, the sampling frequency _s is 44.1 [k
Hz], 32.0 [kHz], and the tape speed in that case is slightly different from the above-mentioned value. Furthermore, the code structure and modulation format of the PCM signal are common to each format. FIG. 2 shows one unit (one sector) of control track TC and data track TD (=TD ₁ to TD ₈ ). The data recording head forms a data track TD, the data reproducing head reproduces the track TD, and the control recording head forms a control track TC.
is formed, and the track TC is reproduced by the control reproduction head. This data track TD
The recording and reproduction of the control track TC and the recording and reproduction of the control track TC are assumed to be synchronized with each other. In other words, by arranging the heads so that the magnetic gaps of the data recording head and the control recording head meet in the width direction of the magnetic tape, the section of the track TC where the control signal of one predetermined sector is recorded and the data of one predetermined sector are recorded. Both ends of the track TD are made to coincide with the recorded section of the track TD in the width direction. The same relationship applies to the arrangement of the reproduction head. Of course, the positions of the control head and data head may be shifted by an integral multiple of the distance corresponding to one sector. Four blocks of data are recorded as one sector of the data track. At the beginning of each block, a data synchronization signal is recorded as shown by diagonal lines in FIG. One block of data inserted after the synchronization signal has one word of 16 bits.
PCM words W ₁ to _{W 12} and one word are composed of a 16-bit parity word P _O P _E Q _O Q _E and a CRC code for error detection with respect to these 16 words. PCM words W ₁ to _{W 12} belong to the same channel, and consecutive PCM words are divided into odd and even numbers,
Interleaving processing (rearrangement of examples) and error correction encoding are performed for each. The parity words P _O and P _E are formed based on the odd and even six words before interleaving, and the parity words Q _O and Q _E are formed based on the odd and even six words after interleaving. It is formed based on each of the six even-numbered words. Furthermore, within one block, the parity word is located in the center, and before interleaving, adjacent odd or even words, e.g.
W ₁ and W ₃ are separated by the maximum distance within one block. Such error correction encoding makes it easy to correct the reproduced data containing uncorrectable errors, such as interpolation using the average value of correct data located before and after the data. In other words, the possibility that two or more adjacent words in the PCM data series in the original order will become uncorrectable is minimized. The data synchronization signal inserted into each block of data track TD has a length of 16 bits, which is the same as one word, and includes a synchronization pattern indicating the beginning of one block, and a 3-bit block address [B ₂ B ₁ B ₀ ] and 2 flag bits [E _B1 F
_B0 ]. The data synchronization signal is
It is recorded using the same modulation method as the data, and the synchronization pattern is a pattern that does not appear in the data. In this example, the minimum value of magnetization reversal interval (Tmin) is 1.5T (however, T
is the 1-bit time slot of the original data)
A modulation method is used in which the maximum value (Tmax) is 4.5T. And the synchronization pattern is
The reversal intervals are sequentially 1.5T, 4.5T, 4.5T, and 0.5T. Note that there are two types of polarity of the synchronization pattern depending on whether the number of inversions in the block is odd or even. The most significant bit _B2 of the three bits of the block address is made to match the least significant bit _S0 of the sector address. Therefore, the block address [B ₂ B ₁ B ₀ ] is
There are 8 types: [000] [001]...[111]. Furthermore, flag bits F _B1 and F _B0 indicate whether or not the PCM data has been subjected to emphasis processing.
[F _B1 F _B0 ] is set to [00], and when emphasized, it is set to [01]. A flag bit present after the block address [000] indicates whether emphasis is on or off.
Both the block address and flag bit, along with the PCM word and parity data, are subject to error checking using the CRC code of each block. The 1 selector of the control track TC is
As shown in Figure 2, a 4-bit synchronization signal and a 16
A bit control word, a 28-bit sector address, and a 16-bit CRC code are located sequentially. The configuration of this control track TC is the same for formats A, B, and C.
Control word, sector address, CRC
The code modulation method is the FM method.
If the 1-bit cell of the FM system is T', the synchronization signal is 4 bits (4T'), a preamble period of 0.5T' is provided, and the least significant bit of the CRC code of the previous sector is Regardless of whether it is "0" or "1", the synchronization pattern has a predetermined polarity as shown in the figure. Synchronization signal followed by 16-bit control word _C0
~ _C15 is provided. The 4 bits _C15 to _C12 determine the sampling frequency _s , and the four bits _C11 to C12 determine the sampling frequency s.
The 3 bits of _C9 determine the format. In this example, all 9 bits _C0 to _C8 are set to "0". However, if the data code structure, data modulation method, etc. are different, the bits C ₀ to _{C 8} may be used for discrimination. 28 bits after the control word (S ₀ ~
S ₂₇ ) sector address is inserted. The sector address is set such that all bits are "0" and increments in an increasing direction for each sector, and indicates the absolute address of each sector. A CRC code (16 bits) for error detection is added to these control words and sector addresses. The format discrimination code (C ₁₁ C ₁₀ C ₉ ) in the control word is different depending on the format. As in this example, when there are only 3 formats, 2
Although a bit discrimination code may be used, 3 bits are used in consideration of the wide variety of codes. Fig. 3 shows the relationship between data series, block addresses, and sector addresses. Fig. 3A shows the case of format A, Fig. 3B shows the case of format B, and Fig. 3C shows the case of format C. It shows the case. This FIG. 3 shows the relationship for one channel, where n and m mean 0 and positive integers. In the case of format A, one channel is recorded as one data track, in the case of format B, one channel is recorded as two data tracks A and B, and in the case of format C, one channel is recorded as four data tracks. The data are recorded as data tracks A, B, C, and D. In one embodiment of the present invention, the discrimination bits C ₁₁ to _{C 9} in the control word are set according to the recording format.
By setting the recording format to a predetermined value and identifying the recording format from this discrimination bit at the time of reproduction, it is possible to reproduce any of the three recording formats without any problem. As an example, magnetic tape 1 is 1/4 inch wide and
The recording system and reproducing system when the track pattern shown in FIG. A is formed will be explained. Each channel (CH) as shown below according to each format.
PCM data is recorded.

[Table] Such track assignment is designed to simplify the configuration of data distribution or composition processing even when the formats are different. FIG. 4 shows the configuration of the recording system applied when the tape width is 1/4 inch, and FIG. 5 shows the configuration of the reproducing system. In Figure 4, 2a~
PCM data obtained by PCM modulating an audio signal is supplied to eight input terminals indicated by 2h. For format A, CH ₁
PCM data for each channel of ~CH ₈ is supplied. Further, a format designation signal is supplied to an input terminal indicated by 3. The PCM data is supplied to encoders 4a to 4h, respectively, and subjected to error correction encoding including interleaving, block address addition processing, and synchronization signal addition processing. Also,
A format designation signal is supplied to the control encoder 5. The control encoder 5 is
sector address generator, synchronization signal generator,
It includes a CRC generator, and is further supplied with a sampling frequency designation signal (not shown), and is
A sector-by-sector signal is generated and supplied to the recording control head _HRc via an FM modulator 6 and a recording amplifier 7. The data sequences emerging from encoders 4a to 4h are processed in multiplexer 8. The derma multiplexer 8, as shown in FIG.
It is composed of switch circuits 9a to 9h provided for the data series of each channel, and a switching signal for controlling each switch circuit is sent to the controller 1.
Formed by 0. The controller 10 generates a switching signal according to the format designation signal. Further, since the encoders 4a to 4h output data at different timings when the formats are different, their operations are switched by a format designation signal. The outputs of the switch circuits 9a to 9h of the demultiplexer 8 are connected to the modulation circuits 11a to 11h and the recording amplifiers 12a to 12.
The signals are supplied to the recording heads HR ₁ -HR ₈ via the signals H, respectively, and recorded as data tracks TD ₁ -TD ₈ . To explain the demultiplexer 8 in detail, each switch circuit 9a to 9h is connected to an encoder 4a to 4h.
Input terminals 13a~ to which data system examples are supplied from
13h, and output terminals 14a to 14h corresponding to tracks _TD1 to _TD8 , respectively. The switch circuit 9a has terminals 14a, 14e, 14c, 14
It has four output terminals, a, e, c, and g, which are respectively connected to g. The state of the switch circuit 9a is controlled by the controller 10 in accordance with each format as follows. When recording in format A, output terminal a is always selected and the data of CH1 is recorded as track _TD1 . When recording format B, output terminals a and e are selected alternately in a block period, and when the nth block of CH1 is recorded as track TD ₁ , the next (n+1)th block is recorded as track TD. Recorded as ₅ . When recording in format C, output terminals a, e,
c and g are selected sequentially at the block period, and n of CH1
The th block is recorded as track TD ₁ ,
The (n+1)th block is recorded as track TD ₅ , and the (n+2)th block is recorded as track TD 5.
The (n+ ₃ )th block is recorded as track TD ₇ . The switch circuit 9b of the demultiplexer 8 includes four output terminals b, f, d, and h connected to terminals 14b, 14f, 14d, and 14h, respectively.
The state of this switch circuit 9b is controlled by the controller 10 as follows. When recording in format A, output terminal b is always selected and data on CH2 is recorded as data track _TD2 . When recording format B, output terminals b and f are selected alternately in block cycles, and data on CH2 is transferred to data tracks TD2 and _TD2 .
Recorded alternately in blocks on TD ₆ . When recording in format C, output terminals b, f,
d and h are sequentially selected at a block period and are recorded alternately on data tracks TD ₂ , TD ₆ , TD ₄ and TD ₈ . The switch circuit 9c of the demultiplexer 8 is
It has output terminals c and g connected to terminals 14c and 14g, respectively, and an open output terminal i. The switch circuit 9c always selects output terminal c when recording format A and records the data of CH3 on data track _TD3 , and selects output terminals c and g alternately at a block period when recording format B. Select CH3 data and data track TD ₃ ,
Recording is performed alternately on TD ₇ , and control is performed so that output terminal i is always selected when recording in format C. Further, the switch circuit 9d has terminals 14d, 1
It has output terminals d and h connected to 4h, respectively, and an open output terminal i. In the case of format C, since there are two channels, output terminal i is selected in the same way as switch circuit 9c. Further, the controller 10 controls so that when recording format A, output terminal d is selected, and when recording format B, output terminals d and h are selected alternately at a block period. Other switch circuits 9e of the demultiplexer 8,
9f, 9g, 9h are output terminals 14e, 14, respectively.
Output terminal e connected to f, 14g, 14h,
f, g, h, and an open output terminal i. These switch circuits 9c to 9h are for recording data of CH5 to CH8 on data tracks _TD5 to _TD8 when recording in format A. The demultiplexer 8 allows recording in a specified format. As shown in FIG. 5, the data track TD ₁ ~
The data reproduced from each of the TDs ₈ by the reproduction heads HP ₁ to _{HP 8} is sent to the multiplexer 1 via reproduction amplifiers 15a to 15h and demodulators 16a to 16h.
7. You can also control playback head
The reproduction output of the HP _c is supplied to a CRC checker 20 via a reproduction amplifier 18 and an FM demodulator 19, and errors in control words and sector addresses are detected. A reproduction signal of the control track passed through the CRC checker 20 is supplied to the control decoder 21. The control decoder 21 outputs a synchronization signal,
Control words ( _fs determination and format determination) and sector addresses are each taken out. In this case, the result of error detection by the CRC checker 20 is used, and a control word or sector address that is considered to be error-free is used as a normal output. In addition, since there is a risk that the reproduced control word may lose continuity during reproduction because it contains an error, the control word is supplied to the one sector delay circuit, and as described above, when an error is included, the control word is The output of the delay circuit is used. The synchronization signal reproduced from the control track TC is used as a comparison signal for the servo circuit. The format determination bits C ₉ to C ₁₁ from the control decoder 21 are supplied to the controller 22, and a signal for controlling the switch circuit of the multiplexer 17 is generated from the controller 22. The multiplexer 17 has the same configuration as the demultiplexer 8 (FIG. 6) provided in the recording system.
That is, if the input/output relationship of the demultiplexer 8 is reversed, it becomes the multiplexer 17, and the switch circuits 9a to 9h can be controlled in the same manner as described above by format discrimination. Multiplexer 1
Decoders 23a to 2 for the eight output terminals of
3h is connected. Decoders 23a to 23h
has an error correction circuit including a deinterleaver, and the error-corrected PCM data of each channel appears at output terminals 24a to 24h. Unlike the above example, when the tape width is 1/2 inch and the track pattern shown in FIG. 1B is used, the following recording is performed according to format A and format B. However, n is 1
is an integer between 6 and 6.

[Table] When the tape width is 1 inch and the track pattern shown in FIG. 1C is used, the following recording is performed according to format A and format B. However, n is an integer from 1 to 12.

[Table] The present invention can also be applied to cases where the tape widths are 1/2 inch and 1 inch. As can be understood from the above description of an example of the present invention, in the present invention, the relative positional relationship between the magnetic tape and the fixed head is determined so that a predetermined track pattern is formed, and the magnetic tape is formed at a predetermined position. Since the control code signal is recorded on the control track to be used for format determination,
By reproducing this control code signal, the recording format can be determined and a plurality of different recording formats can be used.
Therefore, there is an advantage that the optimal format can be selected depending on the purpose of use, and even when recording is performed in any of multiple recording formats,
A PCM recording and reproducing device capable of reproducing PCM data can be realized. Other specific examples of recording formats include formats in which the number of occupied tracks per channel is 4 like format C, but the tape speed is 38 [cm/s], or format A.
Similarly, the number of occupied tracks per channel is 1.
One example of a track is one with a tape speed of 38 [cm/s]. In addition to this, the present invention can also be applied to cases where the data code structure and data modulation method are different.

[Brief explanation of the drawing]

Fig. 1 is a schematic diagram showing some examples of track patterns to which the present invention can be applied, Fig. 2 is a schematic diagram showing signal configurations recorded on control tracks and data tracks, and Fig. 3 is a data series. , a schematic diagram used to explain the relationship between block addresses and sector addresses, and FIG. 4 is a diagram to which the present invention is applied.
FIG. 5 is a block diagram showing the configuration of the recording system of the PCM recording and reproducing apparatus, FIG. 5 is a block diagram showing the configuration of the reproducing system, and FIG. 6 is a connection diagram showing the configuration of the multiplexer. TD ₁ to _{TD 48} are data tracks, TC is a control track, 1 is a magnetic tape, 2a to 2h are input terminals for PCM data of each channel, 3 is an input terminal for a format designation signal, 8 is a demultiplexer, 9a to 9h are input terminals switch circuit, 17 is a multiplexer, HR ₁ to _{HR 8} are recording heads, TR _c is a recording control head, HP ₁ to _{HP 8} are playback heads,
HP _c is a playback control head.

Claims (1)

[Scope of Claims] 1. In a PC signal recording method in which a plurality of data tracks are formed in which data of a plurality of channels are recorded in the longitudinal direction of a magnetic tape by a fixed head, the data track includes an occupied track per channel. The data of the plurality of channels are recorded in one recording format selected from a plurality of recording formats that differ in number, data code structure, data speed, modulation method, etc., and in the longitudinal direction of the magnetic tape. A control track is formed parallel to the data track at a different position from the data track, and the control code signal containing information regarding the selected recording format of the data to be recorded on the data track is transmitted to the control track. A PCM signal recording method characterized in that recording is performed using a recording method different from the above data track so that the signal can be played back in playback states of a plurality of recording formats. 2. The PCM signal recording method according to claim 1, characterized in that an error detection code is added to the control code signal.