JPS6132491A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPS6132491A JPS6132491A JP15361484A JP15361484A JPS6132491A JP S6132491 A JPS6132491 A JP S6132491A JP 15361484 A JP15361484 A JP 15361484A JP 15361484 A JP15361484 A JP 15361484A JP S6132491 A JPS6132491 A JP S6132491A
- Authority
- JP
- Japan
- Prior art keywords
- rom
- integrated circuit
- hybrid integrated
- memory
- chip carrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔技術分野〕
本発明は混成集積回路C:関し、特し混成集積回路に実
装されるROM(読み出し専用メモリ)に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a hybrid integrated circuit (C), and more particularly to a ROM (read-only memory) mounted on the hybrid integrated circuit.
ROMとは、メモリICの一押で、簡単に説明すれば次
のようになる。ROM is a type of memory IC, and can be briefly explained as follows.
メモリは、各種情報を記憶、保持し必要じ応じて取り出
すことができる機能を有するもので、電子計算機等のデ
ータ処理楼械ではデータを一時的に記憶し高速に情報の
出し入れをするメモリ、処理命令等を蓄える半固定メモ
リ、入出力機器とデータ処理装置のバッファとして使用
されるメモリなどがあり、使用目的によって要求される
性能は異なる。メモリICは半導体メモリ、特にMOS
メモリが集積化に連していることから集積度の増大1価
格の低下をもたらし、論理用ICとは比較にならないほ
ど大量に使われるようになり、現在では大形、中形電子
計算機以外にもパーソナルコンピュータや応用OA機器
、家電製品などにも多数使用されている。半導体メモリ
をその動作状態で分類すると、アドレス(番地)によっ
てデータの書き込み/読み出しを行なうアドレスアクセ
スメモリと、記憶している内容によってアクセスする連
想メモリとに大別され、アドレスアクセスメモリは更に
、任意の記憶場所を呼び出すときに、
呼び出し時間がその直前に呼び出した記憶場所【二無関
係なRA M (random accea s me
mory )と、情報を逐次的じしか呼び出せなイS
AM(5equential accessmemor
y )とに大別される。RAMはさらに、データの読み
出しと書き込みが可能なRWM (reacl/wri
tememory )と、書き込みはできても書き換え
回数が制限されていたり極端(−書き込み時間が遅く王
として読み出し専用(=使われるROM (read
only me−mory)とに分かれる。このROM
+二は、製造時に情報を書き込む完全固定形のROM
(mask ROM)と、使用者が書き込めるPROM
(programmable ROM)とがある。いず
れのROMも、電源を切っても記憶された情報が失われ
ない不揮発性メモリである・従来、このROMを配線さ
れた絶縁基板上C実装する場合には、チップキャリア内
に半導体テツフをマウント・ボンディングして刺止した
チップキャリアをはんだ付けによって実装していた。し
かしながらこの方法では、例えばポケットベルなどで加
入者呼出しコードとし又使用する場合は加入者9個人毎
に異った特定のROMコードが必要となる。Memory has the function of storing and retaining various information and retrieving it as needed.In data processing machines such as electronic computers, memory is a memory that temporarily stores data and allows information to be retrieved at high speed. There are semi-permanent memories for storing instructions, etc., and memories used as buffers for input/output devices and data processing devices, and the performance required varies depending on the purpose of use. Memory IC is semiconductor memory, especially MOS
As memory has become more integrated, an increase in the degree of integration has led to a decrease in price, and it has come to be used in large quantities incomparably with logic ICs, and is now used in applications other than large and medium-sized electronic computers. They are also widely used in personal computers, applied office automation equipment, and home appliances. Semiconductor memories can be categorized according to their operating state, and are broadly divided into address access memory, in which data is written/read based on addresses, and associative memory, in which data is accessed based on stored contents.Address access memory is further divided into arbitrary When calling up a memory location, the call time is the memory location called immediately before [2 unrelated RAM (random access me)].
(mory) and an iS that can only call up information sequentially.
AM (5equential access memory)
y). The RAM also has RWM (reacl/wri) that can read and write data.
There are ROMs that can be written, but the number of times they can be rewritten are limited, or extreme (-the writing time is slow, and the king is read-only.
only me-mory). This ROM
+2 is a completely fixed ROM in which information is written during manufacturing.
(mask ROM) and PROM that can be written by the user
(programmable ROM). Both ROMs are non-volatile memories that do not lose stored information even when the power is turned off. Conventionally, when mounting this ROM on a wired insulating board, a semiconductor TETSU was mounted inside a chip carrier.・The chip carrier was mounted by soldering after being bonded and fixed. However, this method requires a different specific ROM code for each of the nine subscribers when used as a subscriber calling code, for example in a pager.
しかもはんだ付けで固定実装されているため、加入者が
変わった場合には異ったROMコードを持つ別の製品(
装置)を新たC用意する必要かあつ〔目的〕
本発明の目的は、上述の問題点を解消し、ROMを着脱
可能とする混成集積回路を提供することにある。Moreover, since it is fixedly mounted by soldering, if the subscriber changes, another product with a different ROM code (
OBJECTS OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to provide a hybrid integrated circuit in which a ROM can be attached or removed.
本発明は、上記目的を達成するために、配線された基板
上に固定され外側の側面上に突部を有する枠を備え、前
記枠の内部1二、読み出し専用のメモリを塔載したチッ
プキャリアが導電性の介在部材を前記基板側に介在させ
、前記突部じ嵌合するくぼみを有するギャップ【二より
嵌入されている。In order to achieve the above object, the present invention provides a chip carrier comprising a frame fixed on a wired substrate and having a protrusion on the outer side surface, and a chip carrier having a read-only memory mounted inside the frame. A conductive intervening member is interposed on the substrate side, and the protrusion is fitted into the gap having a recess into which the protrusion fits.
以下、図面を参照しながら本発明の実施例について説明
する。Embodiments of the present invention will be described below with reference to the drawings.
第1図は本発明の一実施例の分解組立図で、第2図は組
立後の断面図を示す。第1図において、配aされた絶縁
基板1上に、非導電性の材料から成りその側面に突部2
を有する外枠6が固定されて設けられている。この外枠
6内に、ROM4を塔載したチップキャリア5が、導電
性ゴム6を絶縁基板1g8に介在させて、前記突部2に
嵌合する溝7を有するキャップ8により嵌入されている
。ここで、導′亀性ゴム6は、全体的に導電性を帯びて
いるのではなく、ROM4の各端子と絶縁基板1上の配
線された所定の部分とが電気的に接続されるように導電
性ゴム6の所定の部分のみにおいて、
導電性を有している。FIG. 1 is an exploded view of an embodiment of the present invention, and FIG. 2 is a sectional view after assembly. In FIG. 1, an insulating substrate 1 is placed on an insulating substrate 1, which is made of a non-conductive material, and has protrusions 2 on its sides.
An outer frame 6 is fixedly provided. A chip carrier 5 carrying a ROM 4 is fitted into this outer frame 6 by a cap 8 having a groove 7 that fits into the protrusion 2, with a conductive rubber 6 interposed on an insulating substrate 1g8. Here, the conductive rubber 6 is not entirely conductive, but is designed so that each terminal of the ROM 4 and a predetermined wired portion on the insulating substrate 1 are electrically connected. Only a predetermined portion of the conductive rubber 6 has conductivity.
図面から明らかなように、ROM4 (チップキャリア
5)が、緩衝材として作用する導電性ゴム6を介してキ
ャップ8と外枠3とのスナップ結合により基板1上≦二
圧接されるので、ROMの交換を迅速かつ容易に行なう
ことができ、しかも振動等に対して接続不良になること
も防止できる。As is clear from the drawing, the ROM 4 (chip carrier 5) is brought into contact with the substrate 1 by a snap connection between the cap 8 and the outer frame 3 through the conductive rubber 6 that acts as a buffer material, so that the ROM is Replacement can be done quickly and easily, and connection failures due to vibrations and the like can also be prevented.
なお、本実施例では突部2を2方向としたが、4方向、
すなわち外枠乙の側面すべてに突部を設けてもよい。In addition, in this example, the protrusion 2 is provided in two directions, but it is provided in four directions,
In other words, protrusions may be provided on all sides of the outer frame B.
本発明は以上説明したように、ROMが着脱可能である
ため、その交換を容易τ;しかも迅速【:行なうことが
でき、汎用性を図ることができる。また、振ラリ1等に
対しても確実な電気的接続を行なうことができる。As described above, in the present invention, since the ROM is removable, it can be replaced easily and quickly, and versatility can be achieved. Further, reliable electrical connection can be made to the swinging rally 1 and the like.
第1図は本発明の一実施例の分解組立図で、嬉2図は組
立後の断面図である。
1・・・絶縁基板、 2・・・突部。
3・・・外枠、 4・・・ROM。
5・・・チップキャリア、 6・・・導電性コム。
7・・・溝、 8・・・キャップ。FIG. 1 is an exploded view of an embodiment of the present invention, and FIG. 2 is a sectional view after assembly. 1... Insulating substrate, 2... Protrusion. 3... Outer frame, 4... ROM. 5... Chip carrier, 6... Conductive comb. 7...Groove, 8...Cap.
Claims (1)
する枠を備え、前記枠の内部に、読み出し専用のメモリ
を塔載したチツプキヤリアが導電性の介在部材を前記基
板側に介在させ、前記突部に嵌合するくぼみを有するキ
ヤツプにより嵌入されていることを特徴とする混成集積
回路。A chip carrier is provided with a frame fixed on a wired substrate and has a protrusion on an outer side surface, and a chip carrier having a read-only memory mounted inside the frame has a conductive intervening member interposed on the substrate side, A hybrid integrated circuit characterized in that the hybrid integrated circuit is fitted with a cap having a recess that fits into the protrusion.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15361484A JPS6132491A (en) | 1984-07-24 | 1984-07-24 | Hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15361484A JPS6132491A (en) | 1984-07-24 | 1984-07-24 | Hybrid integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6132491A true JPS6132491A (en) | 1986-02-15 |
Family
ID=15566335
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15361484A Pending JPS6132491A (en) | 1984-07-24 | 1984-07-24 | Hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6132491A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110461089A (en) * | 2018-05-07 | 2019-11-15 | 欧姆龙株式会社 | Electronic device |
-
1984
- 1984-07-24 JP JP15361484A patent/JPS6132491A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110461089A (en) * | 2018-05-07 | 2019-11-15 | 欧姆龙株式会社 | Electronic device |
CN110461089B (en) * | 2018-05-07 | 2023-06-30 | 欧姆龙株式会社 | Electronic device |
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