JPS61296738A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS61296738A JPS61296738A JP13792985A JP13792985A JPS61296738A JP S61296738 A JPS61296738 A JP S61296738A JP 13792985 A JP13792985 A JP 13792985A JP 13792985 A JP13792985 A JP 13792985A JP S61296738 A JPS61296738 A JP S61296738A
- Authority
- JP
- Japan
- Prior art keywords
- aluminum electrode
- aluminum
- film
- nitride film
- plasma nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明はアルミニウム層、あるいはアルミニウムにシリ
コンを数%含有したアルミニウム合金層を使用した2層
もしくは多層電極構造を有する半導体装置の製造方法に
関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device having a two-layer or multilayer electrode structure using an aluminum layer or an aluminum alloy layer containing several percent silicon in aluminum.
従来回路素子が形成された半導体基板上にアルミニウム
電極を多層配線する方法として第2図に示すような製造
方法が一般的に行なわれている。Conventionally, a manufacturing method as shown in FIG. 2 is generally used as a method for wiring aluminum electrodes in multiple layers on a semiconductor substrate on which circuit elements are formed.
すなわちシリコン等の半導体基板10上に形成された8
i02等の第1の絶縁層20に第1アルミニウム電極形
成用の窓開けを行ないアルミニウム膜を電子ビーム又は
抵抗加熱等の手段で0.5μm〜1μmの厚さに被着し
、感光性樹脂膜を用いて第1アルミニウム電極30を形
成する。That is, 8 formed on a semiconductor substrate 10 made of silicon or the like.
A window for forming a first aluminum electrode is formed in the first insulating layer 20 such as i02, and an aluminum film is deposited to a thickness of 0.5 μm to 1 μm by means such as an electron beam or resistance heating, and a photosensitive resin film is formed. The first aluminum electrode 30 is formed using the following method.
次に第2アルミニウム電極を形成する念めに、半導体基
板に配線された第1アルミニウム電極を含む全領域上に
ポリイミド等の絶縁層40ヲ形成し、第1アルミニウム
電極上の絶縁層を感光性樹脂膜を用いて除去し第2アル
ミニウム電極接続用の開孔を行なった後第2アルミニウ
ム電極50を形成する。Next, in order to form the second aluminum electrode, an insulating layer 40 of polyimide or the like is formed over the entire area including the first aluminum electrode wired on the semiconductor substrate, and the insulating layer on the first aluminum electrode is photosensitive. After removing the resin film and making an opening for connecting the second aluminum electrode, a second aluminum electrode 50 is formed.
この様な従来の多層アルミニウム電極構造の製造方法に
おいては次のような問題がある。This conventional method for manufacturing a multilayer aluminum electrode structure has the following problems.
第1アルミニウム電極に第2アルミニウム電極を接触さ
せ多層配線を行なうには第1アルミニウム表面をアルミ
ニウムの状態に保たなければならない。In order to bring the second aluminum electrode into contact with the first aluminum electrode and perform multilayer wiring, the surface of the first aluminum must be kept in an aluminum state.
しかし、ポリイミド膜のエツチングにはヒドラジン等を
用いる必要があるが、このコンタクト形成工程で表面が
酸化されバリヤ層60が生ずる。However, although it is necessary to use hydrazine or the like for etching the polyimide film, the surface is oxidized in this contact forming step, and a barrier layer 60 is formed.
また、ポリイミドの熱硬化処理は、スルーホール形成後
に行なわれるが、その工程で人ぎ表面が酸化されやけり
バリア層60が生ずる。これはシリース抵抗となシ、そ
の抵抗値は数100にΩから数100MΩで半導体素子
特性を著しく悪化させてしまうという問題があった。Furthermore, although the polyimide is thermally cured after the through holes are formed, the surface of the polyimide is oxidized in this step, resulting in the formation of a burnt barrier layer 60. This is a series resistance, and its resistance value ranges from several 100 Ω to several 100 MΩ, which poses a problem in that it significantly deteriorates the characteristics of the semiconductor device.
本発明は第1アルミニウム!極と第2アルミニウム電極
の接触部分のバリヤ金魚くしシリース抵抗を数100に
減少できる多層構造アルミニウム電極配線の形成方法を
提供することを目的とする。The present invention is the first aluminum! It is an object of the present invention to provide a method for forming a multilayer aluminum electrode wiring that can reduce the barrier goldfish comb series resistance of the contact portion between the pole and the second aluminum electrode to several hundred.
本発明は半導体基板上に配線された第1アルミニウム電
極を含む領域にプラズマナイトライド膜を形成し、更に
その領域上に絶縁膜(例えばポリイミド膜)を形成し第
1アルミニウム電極上の絶゛縁膜の所望の位置に開孔部
を設は第1アルミニウム電極上のプラズマナイトライド
膜を除去し、その露出した第1アルミニウム成極に第2
アルミニウム電極を形成する多層構造のアルミニウム電
極配線の形成方法である。In the present invention, a plasma nitride film is formed in a region including a first aluminum electrode wired on a semiconductor substrate, and an insulating film (for example, a polyimide film) is further formed on the region to form an insulating film on the first aluminum electrode. An opening is formed at a desired position in the film, the plasma nitride film on the first aluminum electrode is removed, and a second electrode is formed on the exposed first aluminum electrode.
This is a method for forming an aluminum electrode wiring having a multilayer structure to form an aluminum electrode.
本発明に係る多層構造のアルミニウム電極の形成方法に
よれば第1アルミニウム電極と第2アルミニウム電極の
接触部分にはバリヤが発生しなくシリース抵抗が数10
0とな9半導体素子の特性を向上させることができる。According to the method for forming an aluminum electrode with a multilayer structure according to the present invention, no barrier is generated at the contact portion between the first aluminum electrode and the second aluminum electrode, and the series resistance is several tens of thousands.
It is possible to improve the characteristics of a semiconductor device.
以下本発明の実施例について図面を参照して説明する。 Embodiments of the present invention will be described below with reference to the drawings.
先ず例えば第1図(人)て示す如くシリコン基板1の所
定領域に不純物の選択拡散によシネ細物領域2を形成す
る。次いで熱酸化法等によシネ細物領域2及びシリコン
基板1の表面を覆う酸化膜3を形成する。First, as shown in FIG. 1, for example, a thin film region 2 is formed in a predetermined region of a silicon substrate 1 by selectively diffusing impurities. Next, an oxide film 3 covering the thin film region 2 and the surface of the silicon substrate 1 is formed by thermal oxidation or the like.
次回(B)に示す如く不純物領域2と電気的に接続する
配線を形成するために酸化膜3に不純物領域2に通じる
コンタクトホール4を周知の写真蝕刻法にて開口する。As shown in the next step (B), in order to form a wiring electrically connected to the impurity region 2, a contact hole 4 communicating with the impurity region 2 is opened in the oxide film 3 by a well-known photolithography method.
次いでコンタクトホール4を介して不純物領域2に接続
するアルミニウム層5をスパッタ蒸着法又は抵抗加熱法
により約1μmの厚さで酸化膜上に形成する。ここでア
ルミニウム層5の中には約数%のシリコンが含有されて
いる。Next, an aluminum layer 5 connected to the impurity region 2 through the contact hole 4 is formed on the oxide film to a thickness of about 1 μm by sputter deposition or resistance heating. Here, the aluminum layer 5 contains about several percent of silicon.
次に図(’C)に示す如く写真蝕刻法にて所望の第1ア
ルミニウム電極6を形成し然る後450℃のN2とN2
の混合ガスからなるフォーミングガス中で約15分間の
熱処理を施す。次に主面を覆うプラズマナイトライド膜
7t−形成する。Next, as shown in Figure ('C), a desired first aluminum electrode 6 is formed by photolithography, and then N2 and N2
A heat treatment is performed for about 15 minutes in a forming gas consisting of a mixed gas of. Next, a plasma nitride film 7t is formed to cover the main surface.
このプラズマナイトライド膜によって第1アルミニウム
電極表面6はその後の工程による酸化や腐食が防げ安定
なアルミニウム表面が保たれる。This plasma nitride film prevents the first aluminum electrode surface 6 from being oxidized and corroded in subsequent steps, thereby maintaining a stable aluminum surface.
更にプラズマナイトライド膜の主面を覆うポリイミド膜
8を形成する。次いで180〜250 Cに加熱してガ
ス抜きを行な、い、次に図(D)に示す如くヒドラジン
溶液を用いて写真蝕刻法で不純物領域2と電気的に接続
されている第1アルミニウム電極上のポリイミド膜を除
去しプラズマナイトライド膜7の表面を露出させる。こ
の後、ポリイミド膜’t 450℃、30分熱硬化処理
する。Furthermore, a polyimide film 8 is formed to cover the main surface of the plasma nitride film. Next, the first aluminum electrode is heated to 180 to 250 C to degas it, and then the first aluminum electrode is electrically connected to the impurity region 2 by photolithography using a hydrazine solution as shown in Figure (D). The upper polyimide film is removed to expose the surface of the plasma nitride film 7. Thereafter, the polyimide film was heat-cured at 450° C. for 30 minutes.
次に図(E)に示す如く露出したプラズマナイトライド
膜7 i CF4 ;02ガスを用いてケミカルドライ
エツチング(CDE )法(第1図G)により除去し、
第2アルミニウム電極と接続する化学的に安定な第1ア
ルミニウム゛屯極を露出させる。然る後直ちに第2アル
ミニウム′電極とたるアルミニウム層9を形成する。Next, as shown in Figure (E), the exposed plasma nitride film 7 was removed by chemical dry etching (CDE) using CF4;02 gas (Figure 1G).
A chemically stable first aluminum electrode is exposed which connects to the second aluminum electrode. Immediately thereafter, a second aluminum electrode and a barrel aluminum layer 9 are formed.
次に図(F)に示す如く写真蝕刻法によシ第2アルミニ
ウム電極1(l形成する。Next, as shown in Figure (F), a second aluminum electrode 1 is formed by photolithography.
この様にして得られた多層アルミニウム電極配線は第1
アルミニウム電極と第2アルミニウム′電極の接続部分
にはバリヤの発生はなくシリース抵抗も数100となシ
安定な半導体素子特性が保たれ歩留シ向上が図れる。The multilayer aluminum electrode wiring obtained in this way is the first
No barrier is generated at the connecting portion between the aluminum electrode and the second aluminum' electrode, and the series resistance is several hundred, so that stable semiconductor device characteristics are maintained and the yield can be improved.
実施例に記載した第1.第24極はアルミニウームとし
たが、アルミニウームに限らず、導電性のある金属、例
えば銅、その他の金属であっても良い。又プラズマナイ
トライド膜に変ってスノくツタによる酸化膜でも良い。1. described in Examples. Although the 24th pole is made of aluminum wool, it is not limited to aluminum wool, and may be made of a conductive metal such as copper or other metal. Alternatively, instead of the plasma nitride film, an oxide film made of snow ivy may be used.
面図、第2図は従来法を示す断面図である。The plan view and FIG. 2 are cross-sectional views showing the conventional method.
図において、
1.10・・・シリコン基板、 2・・・不純物拡散領
域、3.20・・・酸化膜層、 4・・・コンタク
トホール、5・・・アルミニウム層、6.30・・・第
1アルミニウム電極、7・・・プラズマナイトライド膜
、8.40・・・ポリイミ ド膜、9・・・第2アルミ
ニウム電極層、
10.50・・・第2アルミニウム電極、60・・・バ
リヤ層。In the figure, 1.10... Silicon substrate, 2... Impurity diffusion region, 3.20... Oxide film layer, 4... Contact hole, 5... Aluminum layer, 6.30... First aluminum electrode, 7... Plasma nitride film, 8.40... Polyimide film, 9... Second aluminum electrode layer, 10.50... Second aluminum electrode, 60... Barrier layer.
代理人 弁理士 則近憲佑 (ほか1名)第2図Agent: Patent attorney Kensuke Norichika (and 1 other person) Figure 2
Claims (1)
領域上にプラズマナイトライド膜を形成する工程と、該
領域上にポリイミド膜を形成する工程と、前記第1アル
ミニウム電極上のポリイミド膜の所望の位置に電極取り
出し用の窓開けを行なう工程と、前記第1アルミニウム
電極上のプラズマナイトライド膜を除去する工程と、窓
開けを行なった開口部に第2アルミニウム電極を形成す
る工程とを具備することを特徴とする半導体装置の製造
方法。A step of forming a plasma nitride film on a region including a first aluminum electrode wired on a semiconductor substrate, a step of forming a polyimide film on the region, and a step of forming a desired shape of the polyimide film on the first aluminum electrode. The method comprises the steps of: opening a window for taking out the electrode at the position; removing the plasma nitride film on the first aluminum electrode; and forming a second aluminum electrode in the opening where the window was opened. A method for manufacturing a semiconductor device, characterized in that:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13792985A JPS61296738A (en) | 1985-06-26 | 1985-06-26 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13792985A JPS61296738A (en) | 1985-06-26 | 1985-06-26 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61296738A true JPS61296738A (en) | 1986-12-27 |
Family
ID=15209984
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13792985A Pending JPS61296738A (en) | 1985-06-26 | 1985-06-26 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61296738A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54125985A (en) * | 1978-03-24 | 1979-09-29 | Hitachi Ltd | Semiconductor device and its manufacture |
JPS57159040A (en) * | 1981-03-26 | 1982-10-01 | Toshiba Corp | Manufacture of semiconductor device |
-
1985
- 1985-06-26 JP JP13792985A patent/JPS61296738A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54125985A (en) * | 1978-03-24 | 1979-09-29 | Hitachi Ltd | Semiconductor device and its manufacture |
JPS57159040A (en) * | 1981-03-26 | 1982-10-01 | Toshiba Corp | Manufacture of semiconductor device |
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