JPS6129473B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a so-called schedule management device that notifies you by some means when a preset time has arrived. Generally speaking, it is preferable to make this notification by "sound", and from this point of view, various devices have been proposed. This is a so-called alarm sound generating device or similar device, which attempts to generate an alarm at a predetermined time by appropriately combining a clock device, a display, and an alarm device that generates an alarm. However, these devices only notify the arrival of a desired time with a simple sound (for example, an oscillating beep sound) or a continuous sound, and the operator must reconsider what to do at that time. Must be. This becomes more necessary as the number of alarm settings increases, and it means that each time the alarm sounds, it is necessary to take out the memo and check the meaning of the alarm sound. As a means to solve this problem, the present applicant has created a schedule management machine in Japanese Patent Application No. 52-152112 by attaching memo paper directly to the schedule management machine, and when the alarm time arrives, the memo paper is placed in the position of the corresponding memo. We proposed an easy-to-use schedule management device that lights up the display. The present invention aims to further improve ease of use, and when the alarm time comes, necessary matters are directly uttered by voice. According to the present invention, the device itself can be made very small, so if you put it in your chest pocket, for example, you don't have to take out a notepad even when the alarm time comes, and you don't have to worry about what the alarm means. can be easily understood. Furthermore, the alarm time and its related information can be rewritten arbitrarily, and there is no need to make memo sheets every time. In addition to this convenience, the present invention has several other advantages, which will be easily understood from the following description of the embodiments and their associated effects. First, FIG. 1 shows an external view of an embodiment of the present invention, and FIG. 2 is a block diagram of the circuit. In FIG. 1, a display section 1 made of liquid crystal or the like, keys 2, and a speaker 3 for notifying sound are each positioned at appropriate locations on a main body 4. In addition, the sliding alarm setting switch 5 is
This is used to select a memory for inputting the alarm time and information related to the time using the key 2, and in this embodiment, four settings are possible. In this embodiment, information related to time is used as a keyword with content corresponding to that time, and it is used as a keyword in the schedule number.
shall be. The sliding mode switch 6 is used for alarm setting (1-ALin) and alarm notification (2-ALin).
It is possible to switch between four modes: clock time setting (3-TIMEin), time display (4-TIME), and each input is performed with key 2, and can be switched as appropriate on display 1. will be displayed. Also, 7 is a memo paper, if necessary, you can use it on the left side.
This is for writing the content of the meeting, etc. corresponding to the No. (number). However, business-related schedules often involve responding several times a day, so if you check the response time and its contents once in the morning, you can then check the time and keywords (in this example, when the alarm occurs). If the schedule number (No.) is announced audibly, the user will be able to recall the response relatively accurately. In this sense, the memo paper 7 is provided for confirmation. Next, the block diagram shown in FIG. 2 will be explained. When the mode selector switch 6 is set to 1-ALin and the alarm time and schedule number are input successively using the key 2, one of the alarm memories 9 (ALM ₁ to _{ALM 4} ) corresponding to the alarm setting switch 5 is input through the alarm input circuit 8. The alarm time and schedule number entered above are stored in . At this time, the display selection/drive circuit 10 is also energized, and the contents entered by the keys are displayed on the display section 1. There are a maximum of four alarm settings, and the alarm contents are set by switching the alarm memory 9 using the alarm setting switch 5. When mode selector switch 6 is set to 2-ALout,
The contents of the alarm memory 9 corresponding to the alarm setting switch 5 are displayed on the display section 1 through the display selection/driving circuit 10, and the alarm time and its schedule number can be confirmed. When the mode changeover switch is set to 3-TIMEin and the time to be corrected is entered using the key 2, the time is inputted to the clock circuit 12 through the time setting circuit 11, and the contents of the clock are corrected to the time to be corrected. Of course, at this time as well, the time is displayed on the display section 1 through the display selection/drive circuit 10. When the mode selector switch 6 is set to 4-TIME, the ever-changing timekeeping contents of the clock circuit 12 are displayed on the display section 1 through the display selection/driving circuit 10, and the clock operates as a normal clock. The coincidence circuit 13 compares the time measurement contents of the clock circuit 12 and the alarm time, which is the contents of one of the alarm memories 9, and detects a coincidence. That is, when a match is detected, the signals S ₁ and S ₂ are output, and the display selection/drive circuit is controlled by the S ₂ signal, so that the matching contents of the alarm memory 9 are directly displayed on the display section 1. The signal is output to the gate 14, and the gate 14 is opened by the _S1 signal. Therefore, the matched contents of the alarm memory 9 are transferred as they are to the buffer register 15(R). When the matching signal S ₁ is detected by the discrimination circuit 16 (J _S1 ), the audio output circuit 17
(Vo) operates, and the contents of the buffer register 15(R) are announced by voice. For example, if the content of ALM ₁ is “07301”,
The display unit 1 displays as shown in FIG. 3, and the audio output circuit 17 (VO) issues a voice notification saying "Nanaji Sanjiyutsupun Number One".
Note that the display format on the display unit 1 is not limited to this example and may be arbitrary. FIG. 4 is a block diagram of the audio output circuit 15. Register B stores _H2 and _H1 areas that store time information for the 10th and 1st digits, _M2 and _M1 areas that store minute information for the 10th and 1st digits, and the schedule number. Consists of No areas.
This register B inputs and stores the information of the buffer registers 15 and R when the aforementioned _S1 signal is detected, and these information is further stored by inputting a desired one digit into the buffer register D. is transferred to and stored. Read only memory
(memory) RM stores speech quantization information, and the speech fragments are shown in Table 1.

[Occurrence of time]

- Utterance of 10 o'clock digit - Since flip-flops F ₁ and F ₂ are in the reset state, the output of their discriminator circuits JF ₁ and JF ₂ causes the process to proceed from n ₆ → n ₇ → n ₈ , and the micro order is selected at n ₈ . The 10th digit time information _BH2 generated and stored in register R is transferred to buffer register D. _n9
Then, if the content is "0", the discrimination circuit J
With the output J _D =0 of _D , the process proceeds to n ₂₆ →n ₁₀ , generates the micro order, sets flip-flops F ₃ and F ₂ , and proceeds to n ₆ . If it is other than "0", proceed to _n11 . Here, the content is "1"
If so, the process proceeds to _n12 from the output J _D =1 of the discriminating circuit J _D , generates a micro order, and sends "J" through the second voice initial address determining circuit CB.
Set the initial address NN of the word segment NN in the address counter AC, and say "Jiyuu" at _n13 . _n13 indicates a branch to a subroutine Vo for generating audio, specifically as shown in FIG. When the voice initial address NN of "JIU" is set in the address counter AC at n ₁₂ , the first step of the "JIU" area in the read-only memory RM is accessed and output.
The data of the first step is output to Ro. Then, n ₁₄ →n ₁₅ →n ₁₄ in the voice production subroutine Vo until the END code is determined by the determination circuit _JE .
→……Repeat, micro order is generated at n ₁₅ , and address counter is counted by adder FA.
Count up AC one by one. When “Jiyuu” is uttered and the END code is output from the read-only memory RM, n ₁₆
Proceed to generate micro-order and reset circuit.
Activate CAC and reset address counter AC. This completes the utterance processing of one word segment. In this manner, if the content of the buffer register D is "1", the user utters "JIUU" and ends the utterance of the time information _BH2 of the 10th digit. If this time information BH ₂ is not "0" or "1", it is only "2", and the process proceeds to n ₁₁ → n ₁₇ and generates a micro order.
The phonetic initial address NC of the word segment "ni" is set in the address counter AC via the second audio initial address setting circuit CB. Then, in the next step _n18 , "ni" is uttered in the same manner as in the voice utterance subroutine Vo described above. After uttering “ni”, proceed from n ₁₂ → n ₁₃ and continue to utter “jiyuu”. In other words, utter "nijiyuu". If you say “Jiyuu” or “Nijiyuu”, flip-flop F ₃ will not be set and n ₁₀
Set only flip-flop _F2 and return to _n6 . - Utterance of 1 hour digit - At n ₆ , flip-flop F ₁ remains reset, so the program goes to n ₇ again, and at n ₇ it is determined that flip-flop F ₂ has been set.
Proceed to n ₁₉ . In n ₁₉ a micro-order occurs,
This time, time information BH ₁ of the first digit of register B is transferred to buffer register D. If the determination circuit _JD determines that this content is "0" at _n20 , the process advances to _n21 . Now, if the time information _BH2 of the 10th digit is "0", the flip-flop _F2 is set at _n26 . Therefore, the time information of the 10th digit and 1st digit BH ₂ ,
If both _BH1 are "0", the process proceeds to _n27 based on the set discrimination output of the discrimination circuit _JF3 . At _n27 , a micro order is generated and the voice initial address NS of the word segment "Ray" is set in the address counter AC via the second voice initial address determining circuit CB. And the following n ₂₈ voice utterance subroutine
Generates a “ray” with Vo. 10th digit time information
If BH ₂ is not 0, flip-flop F ₃
remains reset, and instead of proceeding as n ₂₁ → n ₂₇ → n ₂₈ , it directly advances to n ₂₂ , which follows n ₂₈ . On the other hand, when the time information BH ₁ of the first digit is not "0", that is, when it is "1" to "9", n ₂₀ → n ₂₉
Proceed to. At _n29 , a micro order is generated, and an audio initial address is set in the address counter AC based on the output from the first audio initial address determining circuit CC corresponding to the contents of the buffer register D. The first voice initial address determination circuit CC consists of two parts CC ₁ and CC ₂ and a circuit described later.
It has 1 part of CC ₃ , and "1" to CC ₁ and CC ₂ .
Each word segment of "9" corresponds to a phonetic initial address as shown in Table 2. (Table 4 for CC ₃ content). Note that when a micro order is generated, the voice initial address from CC ₁ is set. Once the voice initial address is set in this way, the voice production subroutine Vo of _n28
utter the word segments "1" to "9" mentioned above.

【table】

[minute utterance]

- Utterance of 10 minute digits - When the time has finished generating, the flip-flops F ₂ and F ₁ have been set at n ₁₀ and n ₂₂ , so when returning to n ₆ , the sequence proceeds as n ₆ → n ₃₀ → n ₃₁ . In n ₃₁ , a micro order is generated, and first, the minute information of the first digit of register B is
Move BM ₁ to buffer register D. And n ₃₂
Then, the determination circuit J _D determines whether the content is "0" or not. This is part of the information
Depending on whether the digit is "0" or not "0",
This is because the utterance of the 10th digit changes to "jiyutsu" or "jiyuu", and this is controlled by n ₃₂ . If the determination circuit J _D determines that the content is "0" at _n32 , the process proceeds from the output J _D =0 to _n33 , where a micro order is generated and the flip-flop _F3 is set. If it is not "0", _the next
Proceed to n ₃₄ . In n ₃₄ , a micro-order occurs,
For the first time, the tenth digit minute information _BM2 for utterance is transferred from register B to buffer register D. The content is discriminated at _n35 , and if it is "0", the process proceeds to _n36 based on the output J _D =0 of the discriminating circuit J _{D. n36}
determines the set state of flip-flop _F3 ,
If there is a set discrimination output from the discrimination circuit _JF3 , proceed to _n37 . That is, in this case, the minute information BM ₁ and BM ₂ of the 1st and 10th digits are both "0",
A micro-order is generated at _n37 , and the audio initial address NS of the word segment "Ray" is set in the address counter AC via the second audio initial address determining circuit CB. Then, "Ray" is uttered in the next voice utterance subroutine Vo of _n38 . If there is no set discrimination output at _n36 , the process goes to _n39 , generates a micro order, and flips the flip-flop _F2.
Reset and return to _n6 . If minute information BM ₂ of the 10th digit is not “0”, n ₃₅
→n ₄₀ and it is determined whether the content is "1" at n ₄₀ . If it is “1”, J _D of the discriminator circuit J _D = 1
The output advances to n ₄₁ and then flip-flop F ₃
The set state of is determined. Here, if the flip-flop F ₃ is set, the minute information BM ₁ of the first digit is "0" as described in n ₃₅ and n ₃₃ , and especially in this case, the entire minute information is 10 minutes. It means that. Therefore, a micro-order is generated at _n42 , and the voice initial address No. of the word segment "Jiyutsu" is set in the address counter AC via the second voice initial address setting circuit CB. In the voice production subroutine Vo of _n43 , ``Jiyutsu'' is uttered in accordance with this. If _n40 is other than "1", the process proceeds to _n45 , where a micro-order is generated and the voice initial address from the CC ₂ section of the first voice initial address determining circuit CC is set in the address counter AC.
In other words, the words for minute information in the 10-minute digit are 20 minutes...d, 30 minutes...san, 40 minutes...yon, 50 minutes...go, so this word fragment is _Two copies of the CC containing are used. These word segments are uttered in the voice production subroutine Vo of _n46 . Next, the process goes to _n41 , but if the flip-flop _F3 is set as mentioned above, the information _BM1 for the first digit is "0", and the process goes to _n42 → _n43 and becomes "JYUTSU". vocalize. flipflop F ₃
If not set, the process proceeds to _n44 , where a micro-order is generated, and the audio initial address NN corresponding to the word segment of "JIU" is sent to the address counter AC via the second audio initial address determining circuit CB. Set. In this way, "Jiyuu" is uttered in the voice production subroutine Vo of _n43 . Then, in the same manner as when the minute information _BM1 of the 10th digit is "0" and the flip-flop _F3 is not in the set state, the flip-flop _F39 is reset at _n39 and the process returns to _n6 . - Utterance of 1 minute digit - At this time, flip-flop _F1 is in the set state and flip-flop _F2 is in the reset state. Therefore, the process proceeds as n ₆ → n ₃₀ → n ₄₈ , a micro order is generated at n ₄₈ , and the information BM ₁ of the first digit of register B is transferred to buffer register D again. In n ₄₉ , the content _is "1", "3", "4",
It is determined whether it is one of "6". This is because it is necessary to distinguish whether the minute is pronounced as "hun" or "pun" depending on the contents of the first digit. That is, as shown in Table 3,

[Table] Minutes are pronounced as “Pun” with “1”, “3”,
This is either "4" or "6". If the output J _D of the discrimination circuit J _D is 1, 3, 4, 6, the process proceeds to _n50 ; otherwise, a micro order is generated at _n47 , the flip-flop _F2 is set, and the process proceeds to _n50 . The set state of the flip-flop _F3 is determined at _n50 , and if it is in the set state, the first digit information _BM1 is "0" as explained at _n32 and _n33 . In this case as well, the minute is pronounced as "pun". Therefore, proceed to n ₅₁ , generate a micro order, and set the phonetic initial address NQ of the word segment "Pun" to the second
is set in the address counter AC via the voice initial address determination circuit CB. and next n ₅₂
Say "Pun" using the voice production subroutine Vo. In other words, in conjunction with the utterance of the 10-minute digits mentioned above, the students say 10 minutes...Jiyutsupun 20 minutes...Nijiyutsupun 30 minutes...Sanjiyutsupun 40 minutes...Yonjiyutsupun 50 minutes...Gojiyutsupun. If the minute information BM ₁ of the first digit is not "0" and the flip-flop F ₃ remains reset, n ₅₀
→n Proceed to ₅₃ . The utterance of the 1-minute digit is as shown in Table 3 above, and each voice initial address is generated from the CC ₂ part of the first voice initial address determining circuit CC which generates micro-orders and corresponds to these word segments. Set the address counter AC. This is then uttered in the voice utterance subroutine Vo of _n54 . The determination of the set state of flip-flop _F2 at the next step _n55 is to distinguish between "Hun" and "Pun" depending on the contents of the first digit as described above, and if it is not set, the one-minute digit is determined. Since the content is one of "1", "3", "4", and "6", the process proceeds as n ₅₅ → n ₅₁ → n ₅₂ and "pun" is uttered. If it is not set, the content of the first digit is one of "2", "5", "7", or "9" other than those, and the process proceeds to _n55 → _n56 , and a micro order is generated.
The audio initial address NR of the word segment "hun" is set in the address counter AC via the second audio initial address determination circuit CB. thus
Proceed to n ₅₂ and utter "Hun" in this voice production subroutine Vo. These are the 10-minute utterances, 10-minute range...Jiyuu 20-minute range...Nijiyuu 30-minute range...Sanjiyuu 40-minute range...Yonjiyuu 50-minute range...Following Gojiyuu, Table 3 Make a sound like this. In addition, if n ₃₃ is pronounced “Rei”, n ₃₈ →
Proceed as n ₅₆ → n ₅₂ and say “hun”. After saying “hun” or “pun” in n ₅₂ , n ₁
and the operation is completed. As described above, the time can be output as voice. When the voice notification of the time ends in the subroutine TIME, the process branches to the next subroutine No. which notifies the schedule number. Here, the ``number'' is uttered and the numerical value in the No area of register B is notified.
The flow in FIG. 7 shows this content. The correspondence relationship with the contents of the buffer register D in the audio initial address determining circuit _CC3 is as shown in Table 4.

[Table] To explain in detail in Figure 7, first, the phonetic initial address NT of the word segment "number" is set to n ₁₀₀ in the second
The audio initial address setting circuit CB is used to set the address counter AC. Then, at the next step _n101 , a branch is made to the voice production subroutine Vo, and "number" is produced. Next, when branching to _n102 , a micro order is generated and the contents of the No area of register B are transferred to buffer register D. Next, generate a micro order with n ₁₀₃ and enter the buffer register D.
The audio initial address is set in the address counter AC by the output from the first audio initial address determination circuit _CC3 corresponding to the contents of.
Then, in the next n ₁₀₄ , the corresponding word segment shown in Table 4 is uttered aloud. Therefore, for example, if the content of BNo is "1",
The subroutine number is notified as “number one.” When this notification ends, the routine returns to _n1 and waits for the next _S2 signal. As mentioned above, generally, if an alarm time and a keyword corresponding to that time are announced, the response to the alarm will be remembered.
If this keyword is made more detailed, it will be easier to understand. FIG. 9 shows a partial block diagram of another embodiment that realizes this.
This is H ₂ to _{M 1} plus three regions a, b, and c. Furthermore, the areas a, b, c and the capacity of the buffer register D are each composed of 5 bits, and the correspondence between the alphanumeric characters of AB...Z and the initial address determining circuit CC ₃ are as follows. Table 5 shows the correspondence with each word segment. To input these alphanumeric characters into the alarm memory 9, the decimal numbers corresponding to the binary codes in the middle column can be input using the key 2.

【table】

[Table] Since three of these word fragments are consecutively announced after the time is announced, the keyword is three characters, and the understanding of the response to the alarm is significantly improved. For example, the last letter is assigned a significance of "K" for a meeting, "C" for a visit to the office, and "P" for a private relationship. Then, the first two letters of “K” should be the first two letters of the meeting name, the first two letters of “C” should be the initials of the other party, and the first two letters of “P” should be private information. It is sufficient to set the two characters that are easiest to understand. FIG. 10 is a flowchart of subroutine No. 1 for continuously reporting three alphanumeric characters in this embodiment, and is an alternative to subroutine No. of FIG. 5. Here the first character is n ₂₀₁ ~ n ₂₀₃
So, the second character is n ₂₀₄ ~ n ₂₀₆ , and the third character is n ₂₀₇ ~
n ₂₀₉ indicates that each voice is uttered.
Control of each step is similar to that described above. Figure 11 shows display section 1 when the alarm time has arrived.
This shows the displayed content. Part A of the figure shows the display content at 8:30 a.m., and the audio notification at that time was "Hachijisanjiyutsupun keai kei." This means that the planning meeting will begin at 8:30. Figure B is 10am:
The display content is 00 minutes, and the audio notification is "Jyuujireifun kayikay". i.e. 10am:
This means that the management meeting will begin at 00 minutes. Similarly, C in the same diagram means that Mr. M will come to the office at 3:00 pm, and D in the same diagram means that he has an appointment to meet with Mr. I at 6:30 pm. It goes without saying that it is not necessary to assign meaning to the letters of the alphabet as in the embodiment. Since the keyword corresponds to the user's own code, the setting thereof is at the discretion of the user. As explained above in the two embodiments, according to the present invention, the alarm time and information related to that time, that is, keywords, can be automatically announced at a predetermined time, so each time an alarm occurs, There is no need to look at the memo paper, and the meaning of the alarm can be immediately understood. Furthermore, keywords can be set arbitrarily by the operator, so that only the operator can understand them. Moreover, all the main circuits can be constructed of semiconductors, and it is possible to achieve miniaturization as shown in FIG. Furthermore, since the meaning of the alarm is understood through auditory recognition, the brightness and darkness of the place of use is irrelevant, and the range of use is also spatially wide. As explained in detail above, according to the audio schedule management device of the present invention, the alarm time and the keyword related to the time are audibly announced, so not only the content of the alarm but also the alarm time can be notified. Because it can be clearly recognized,
There is no need to check the alarm time each time it is notified. In addition, if you miss the content of the audio notification, you can check it again on the display.Moreover, the content of the schedule is expressed by keywords, so the memory and display can be made smaller. It is possible to provide a schedule management machine that is very easy to use.

[Brief explanation of the drawing]

The drawings show embodiments of the invention. Figure 1 is an external view, Figure 2 is a block diagram of the first embodiment, and Figure 3 is a block diagram of the first embodiment.
The figure shows the display mode, Figure 4 is a block diagram of the audio output circuit, Figure 5 is the audio output control procedure main routine, Figure 6 is the detailed flow of subroutine TIME, and Figure 7 is the detailed flow of subroutine No. ,
FIG. 8 is a detailed flow of subroutine Vo, FIG. 9 is a partial block diagram of another embodiment, and FIG.
The detailed flow of subroutine No. 1 corresponding to the figure, and FIG. 11 is a diagram showing a display mode in another embodiment. 1...Display section, 2...Key, 3...Speaker, 4...Main unit, 5...Alarm setting switch,
6...Mode switch, 7...Memo paper, 9
...Alarm memory, 12...Clock circuit, 13
... Matching circuit, 15 (R) ... Buffer register, 17 ... Audio output circuit.

Claims (1)

[Claims] 1. A display unit, a memory that stores a plurality of alarm times and keywords related to the times, and when the current time and one of the alarm times in the memory match, the alarm time and the keyword related to the time are output by voice. and means for displaying the audibly output alarm time and keyword on the display section.