JPS6129143A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce a floating capacity between a parasitic inductance between a chip and a GND, and electrodes by providing a hold in a beryllia resin, and bonding a semiconductor chip on a metal projection to be inserted. CONSTITUTION:The opposed side and bottom of a beryllia resin 11 are coated with a metal plate 12 to become a source electrode, and a gate electrode 13 and a drain electrode 14 are secured. A hole 15 is opened at the center, and a MOSFET chip 16 is soldered onto the projection 12a inserted into the hole. The electrode 12 is soldered by a solder 23 to an earth pattern 22 on a printed board 21, the chip 16 and the pattern 22 are connected at the shortest distance, and a distance between the source electrode and other electrodes becomes large.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to semiconductor devices such as bipolar transistors and MO8 field effect transistors (hereinafter referred to as MOSFETs).

[Background technology]

Both bipolar transistor and MOSFET have several hundred MH
Became used in high frequency circuits ranging from z to several GHz℃
came. Regarding MOSFETs in particular, [Electronics Complete Book J [3] (May 28, 1978, 4th edition MOS devices, published by Kogyo Kenkyukai, pages 12-17) describes various advantages of MOSFETs compared to bipolar transistors. ing.

The present inventor has developed not only the bipolar transistor but also the above-mentioned M
O8FET to UHF (Ultra High preq)
We are considering using it as an amplifier for wireless communication equipment that handles frequencies above the frequency range (for example, several hundred MHz or more), and improving the high frequency characteristics of MOSFETs.
Various technical studies were conducted to increase output.

Here, an overview of the transmission system considered as the wireless communication device will be explained with reference to FIGS. 5 and 6.

A carrier wave signal (for example, 80 MHz to 900 MHz) e7 and a modulation signal (for example, an audio signal) ea are subjected to FM modulation by the modulation circuit 1. 2 is a band pass filter,
3. 4. Reference numeral 5 designates amplifiers connected in multiple stages, of which amplifier 5 is in the form of a band amplifier as shown in FIG. Further, 6 is a band pass filter, and the output circuit 7 is configured as 5 to be able to radiate radio waves with an output of about 5 W to 10 W from the antenna 8.

In the amplifier 5, Ql is a MOSFET and G
is supplied with an input signal via a coupling capacitor C8. Coil IJI + capacitor C2 constitutes an input tuning circuit, and drain D has coils L, l and capacitor C4.
Output tuning circuit consisting of.

A DC blocking capacitor C8 is provided.

The inventor has proposed a MOSFET 0.0 to be used as described above.
Regarding the structure of No. 1, we have developed the following technology.

In other words, the 51M08FE has a structure in which the source electrode S is led out from the bottom surface of the chip at the center surface of the insulator stem (base of the package) plated with Au to serve as the conductor layer.
Connect the T using conductive paste. A of the above stem
The u-plating is connected to GND during customer use.

The gate G and drain D are comb-shaped electrodes facing each other, and wire bonding is performed between these electrodes and leads provided at both ends of the cross cage using Au wires. Next, the stem is sealed from above using a sealing body made of a material such as ceramic to form a hermetically sealed package.

However, in this technology, when increasing the MOSFET chip size to increase the amplification degree or when providing multiple MO8FET chips on the stem, A
The U-plated stem area also becomes larger, and the distance between the source S and GND (in other words, the distance from the bottom surface of the chip to the ground plane becomes longer), which increases the parasitic inductance L shown by the dotted line in Figure 2. It was also found that unnecessary stray capacitance CO was formed because the source surface and the gate surface and the source surface and the drain surface were close to each other.

By the way, "High Frequency Circuit Design" (November 2, 1975)
The 7th edition published on the 5th, published by CQ Publishing Co., Ltd., P2O) states that it is necessary to prevent signal feedback from occurring due to the inductance of conductors in electronic circuits.

Similarly, in the MO8FET, the parasitic inductance becomes a dog, and when input/output matching is performed, the parasitic inductance is affected (impedance change in response to frequency change, etc.), and the output power decreases. In addition, problems such as an increase in the amount of feedback, making stable operation impossible and increasing the possibility of abnormal oscillations occurring, were identified.

Also, regarding stray capacitance Co, capacitors C2 and C4
The inventor of the present invention has clarified the problem that the combined capacitance between the input and output tuning circuits changes, which causes the tuning frequencies of the input tuning circuit and the output tuning circuit to fluctuate.

[Object of the Invention] The present invention was made in view of the above-mentioned circumstances, and its purpose is to provide a semiconductor device that can perform stable amplification operation in a high frequency band and obtain high output. There is a particular thing.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief summary of the invention disclosed in this application is as follows:
It is as follows.

That is, an opening is provided in the insulating resin, a semiconductor chip, for example, an MO8FET chip, is bonded onto the metal protrusion that is inserted through the opening, and the source of the MO8FET chip is integrated with the metal protrusion. The object of the present invention is to reduce the parasitic inductance between the MO8FET chip and GND as well as the stray capacitance between the MO8FET chip and other electrodes.

[Example 1] Next, a first example of a semiconductor device to which the present invention is applied will be described.
This will be explained with reference to FIGS. Note that Fig. 1 is a perspective view of the MO3FET chip bonded to the stem, and Fig. 2 is a perspective view of the MO3FET chip attached to the stem.
The figure is a side view showing the soldering situation during mounting, and FIG. 3 (5) [F]) (C) is a sectional view of the main part showing the structure of the stem.

The feature of this embodiment is that an opening for fitting the source electrode is provided in the resin or ceramic constituting the stem, and the MO8FET chip is bonded onto the source electrode. The distance between the electrode and the gate electrode is increased to reduce the parasitic inductance and stray capacitance.

As shown in FIGS. 1 and 2, the opposing sides and lower part of the beryllia resin 12 are connected to the metal plate 1 which becomes the source electrode.
A gate electrode 13 and a drain electrode 14 are fixed on the base IJ resin 12. An opening 15 is provided approximately in the center of the beryllia resin 12, and an MO8FET chip 16 is attached to the metal protrusion 12a (integrated with the source electrode 12) through the opening 15 by soldering or the like.

The above structure is further clarified by FIG. 3 (Al) (Q).

That is, as shown in FIG. 3, an opening 15 is provided at approximately the center of the beryllia resin 11, and a metal protrusion integral with the source electrode 12 is formed from the bottom of the beryllia resin 11, as shown in FIG. 3(B). Insert the portion 12a. The lower part of the beryllia resin 11 and the source electrode 12 are bonded to each other at the bonding surface, and the two are integrally formed.

Moreover, the MO8FET chip 16 is soldered on the metal protrusion 12a with solder 17 as shown in FIG.
The source terminal of the 8FET chip 12 will be connected to the source electrode 12. Note that each gate of the MO8FET chip 16 is connected to the gate terminal 13 and the drain is connected to the drain terminal 14 by a wire 23, respectively.

The source electrode 12 is soldered to a ground pattern 22 on a printed substrate 21 with solder 23, as shown in FIG. As a result, the MO3FET chip 16 and the ground pattern 22 are connected by the shortest distance, and the distances between the source electrode] 2 and the gate electrode 13, and further between the source electrode 12 and the drain electrode 14 are also increased.
1. Therefore, the parasitic inductance L5 and stray capacitance Co are also significantly reduced, and when this semiconductor device is used in the same manner as Q1, the defects described above can be corrected and extremely stable amplification operation can be achieved. can be done.

Furthermore, since both side surfaces of the source electrode 12 extend upward, it is also possible to easily check the extent to which the solder 23 is spread during mounting.

[Example 2] Next, a second embodiment of the present invention will be described with reference to FIG.

The difference between this embodiment and the first embodiment is that the source electrode 1
2 is cut at the bottom of the resin 11, and the other structures are the same, so the same reference numerals are given and the explanation will be omitted.

As shown in FIG.
, Furthermore, the distance between the source electrode 12 and the drain electrode 14 is
The distance is larger than the distance shown in the first embodiment.

Therefore, at least the stray capacitance will be further reduced. Then, the semiconductor device shown in this example was manufactured using the MO8F
When used as ETQI, the parasitic inductance L3
Coupled with this reduction, extremely stable amplification operation can be performed.

Note that the thermal expansion coefficients of the resin 11 and silicon shown in each of the above embodiments are almost the same.

Then, due to the deformation of beryllia resin 11 due to heat, MO8
For the purpose of preventing cracks in FET16, beryllia resin 1
1 was frequently used.

However, according to the above structure, the deformation of the beryllia resin 11 has almost no effect on the MO8FET chip 16, and instead of the beryllia resin 11, ceramic or a material with a low dielectric constant can be used. In this way, the stray capacitance can be further reduced, and the degree of freedom in material selection when manufacturing a semiconductor device is improved. 23 indicates a wire.

[Effects] (1) A conductor passing through an opening formed in a dielectric,
For example, since a semiconductor chip is bonded to a metal and the metal is grounded at the shortest distance, the parasitic inductance between the grounded electrode of the semiconductor chip and the ground during mounting can be reduced (2 ), since the distance between the grounded electrode and other electrodes is increased, stray capacitance between the two can be reduced.

(3), above (11 (2+), amplifiers etc. using semiconductor devices with the above structure can perform extremely stable circuit operation without signal feedback, fluctuations in resonance frequency, etc. even in high frequency bands. can.

(4) According to (3) above, a plurality of semiconductor chips can be provided on metal and these can be electrically driven in parallel, so that a high-output amplifier can be easily constructed.

(5) With (4) above, there is no need to create new chips, and the variety of products can be expanded.

Although the invention made by the present inventor has been specifically explained based on the examples above, the present invention is not limited to the above examples, and it is understood that various changes can be made without departing from the gist of the invention. Needless to say.

For example, the number of MO8FBT chips provided on a metal protrusion is not limited to one, but may be multiple.

Further, the semiconductor chip is not limited to a MOS FET chip, but may be a bipolar transistor.

Further, the shape of the metal convex portion may be changed to a round shape, a square shape, etc. In this case as well, the same effects as in each of the above embodiments can be obtained.

[Application field]

In the above explanation, the invention made by the present inventor has mainly been explained in relation to semiconductor devices, which is the field of application behind the invention, but the invention is not limited thereto.

For example, it can be used in power amplifiers for devices that transmit or receive high frequency signals, such as personal radios and car phones.

Furthermore, it can also be used when it is desired to reduce the inductance and stray capacitance that tend to occur in multilayer printed circuit boards.

[Brief explanation of the drawing]

FIG. 1 does not show the first embodiment of the present invention but shows a perspective view of the conductor device, FIG. 2 shows a side view showing the situation when the semiconductor device is mounted, and FIG. B) and (C) show cross-sectional views of essential parts explaining the structure of the semiconductor device, FIG. 4 shows a perspective view of the semiconductor device showing a second embodiment of the present invention, and FIG. A block diagram of a transmission system previously studied by the present inventor is shown, and FIG. 6 shows a circuit diagram of an amplifier forming a part of the above transmission system. 11... Bereria resin, 12... Source electrode, 12
a...Metal convex portion, 13...Gate electrode, 14...
Drain electrode, 15...opening, 16...MOS
FET chip, 17.23...Solder, 21...
Printed circuit board, 22... wiring pattern, 23... wire. Agent Patent Attorney Akio Takahashi Figure 1

Claims (1)

[Claims] 1. An opening is provided in the insulator, a semiconductor chip is provided on a conductor that passes through the opening, and one electrode of the semiconductor chip is electrically integrated with the conductor and the conductor. A semiconductor device characterized in that it is connected to the outside via an electrode for external connection.