JPS61288427A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To contrive stabilization of the characteristics of the title semiconductor device by a method wherein the infiltration of sodium into a substrate when a resist ashing treatment is performed is prevented by inserting a metal film between a resist and a substrate in a pattern forming process. CONSTITUTION:An Si oxide film 102 is formed by performing a thermal oxidization on an SiO substrate 101, and then a thin Mo film 103 is deposited thereon. A resist 104 is applied, a prescribed baking is performed, and then a resist pattern 105 is formed by performing exposing and developing treatment. Subsequently, the Mo film is etched using the resist pattern 105 as a mask, and an Mo pattern 106 and a silicon oxide film pattern 107 are formed by etching the Si oxide film. Then, the resist pattern 105 is incinerated in oxygenous plasma using a cylindrical type incinerating device, and after the resist is removed, the Mo pattern located under the resist pattern is removed using sulfuric acid and hydrogen peroxide mixed solution. An Si oxide film pattern is formed by performing the above-mentioned procedures.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and particularly to prevention of contamination during resist ashing treatment used in the manufacturing process.

[Summary of the Disclosure] The present invention provides a technology for preventing sodium contamination of a substrate when iodizing a resist by inserting a metal thin film between a substrate and an organic polymer layer in a method of manufacturing a semiconductor device. This is to disclose.

Please note that this summary is provided solely for the purpose of quickly accessing the technical content of the present invention, and does not have any influence on the technical scope of the present invention or the interpretation of rights. .

[Prior Art] Conventionally, semiconductor devices, typified by LSIs, have been manufactured using photolithographic processing technology. This method involves coating a resist film on a substrate to be processed, forming a resist pattern by exposure, and then etching the substrate using the resist pattern as a mask. After etching, the resist pattern used as the etching mask is removed using a wet method using a resist stripper or an ashing method using oxygen plasma.

However, as the performance of semiconductor devices has improved in recent years, microfabrication is required, and for this reason, the method of etching materials has changed from the conventional wet etching method to dry etching using plasma. It is coming. Along with this, the iodization method using oxygen plasma has become the mainstream resist stripping method. This is because the surface of the resist pattern is altered during the dry etching process.
This is because the resist cannot be removed by a general wet method.As mentioned above, at present, both etching and subsequent resist removal are performed by a dry process using plasma.

However, recently, it has become clear that sodium in the resist invades the silicon oxide film under the resist during the resist ashing process (H, Akiya et al.
al: Jpn J, Appl, Phys, 20
(1981,) p647). Commonly used resists contain sodium on the order of 1 ppm, and if no measures are taken, almost all of this will penetrate into the silicon oxide film.The mechanism of this penetration is Although it is not clear at this stage, the following explanation has been given: During resist ashing, the organic polymer that is the constituent material of the resist is removed in the form of a gas through an oxidation reaction with oxygen atoms in the plasma. On the other hand, the sodium atoms contained in the resist are almost never vaporized and are therefore accumulated on the substrate surface, so that a highly concentrated sodium layer is formed on the substrate surface at the end of ashing. In this state, when bombarded by ions such as oxygen whose ionization potential is greater than 10 eV (the energy level at the top of the valence band of the silicon oxide film),
The ion neutralization process ionizes and mobilizes sodium, which moves into the silicon oxide film.A large amount of sodium from 1011 to 10c2 is introduced into the silicon oxide film. Silicon oxide film is a basic material that forms the planar structure of semiconductor devices, and is often used as a protective film or insulating film in the manufacturing process of semiconductor devices.Sodium is also a major cause of unstable characteristics, especially in MOS type semiconductor devices. For these reasons, sodium contamination into the silicon oxide film during the resist ashing process is considered to be a serious problem.As a way to prevent this sodium from entering, ashing in a shield plasma is considered to be a serious problem. methods to avoid ion bombardment and to change the atmospheric gas have been proposed.
None of these methods have had sufficient effects, and although efforts have been made to reduce the amount of sodium in the resist, it is difficult to achieve a significant improvement.

[Problem to be Solved by the Invention 1] As stated above, it is difficult to completely prevent sodium contamination during resist ashing in the conventional semiconductor device manufacturing process using photolithography. Therefore, there was a drawback that the stability of the characteristics of the semiconductor device deteriorated.

An object of the present invention is to prevent sodium contamination of a substrate when an organic polymer layer typified by a resist is ashed.

[Means for Solving the Problems] In order to achieve the above object, in the present invention, in order to prevent sodium from entering into the silicon oxide film during ashing of the organic polymer layer, the substrate and the organic polymer layer are A thin metal film is inserted between them.

[Function] According to the configuration of the present invention, when the resist is ashed using plasma, the presence of the metal thin film deposited on the surface of the silicon oxide film prevents the ionization of sodium.
Sodium does not penetrate into the oxide film.

[Example] [Example 1] FIG. 1 is a diagram illustrating an example in which the present invention is applied to processing a silicon oxide film formed on a silicon substrate. As shown in FIG. 1(a), a silicon oxide film 102 having a thickness of 500 wafers was formed by thermally oxidizing a silicon oxide film 101. As shown in FIG. Next, as shown in FIG. 1(b), a thin Mo film 103 was deposited. The No film was deposited using DC magnetron sputtering, and two types of samples were prepared with film thicknesses of 30 and 3000. For reference, a sample without depositing a Mo film was also prepared as in the conventional process. Subsequently, the first
As shown in Figure (C), a known resist 104 is coated with a thickness of 1
．． Figure 1 (Fig. 1)
As shown in d), a resist pattern 105 was formed by exposure and phenomenon processing. Although ordinary light exposure was used as the exposure method in this case, electron beam exposure may be effective depending on the type of resist. When performing electron beam exposure on a resist on an insulating film, it may be impossible to form a fine pattern due to the effect of charge-up, but in the case of the present invention, since there is a conductive thin film under the resist, this can be avoided. Next, as shown in FIG. 1(e), the Mo film is etched using the resist pattern 105 as a mask, and then the silicon oxide film is etched to form the MO pattern 106 and the silicon oxide film pattern. 1
The etching of the 0MO film on which 07 was formed was carried out using N.

Since the film is extremely thin, it only needs to be lightly etched using an ordinary nitric acid-based, hydrogen peroxide-based, or potassium ferricyanide-based etching solution, and it can also be processed satisfactorily by dry etching. In either case, the No film thickness can be made sufficiently thin, and the difference in pattern conversion with the resist can be suppressed to a level that causes no problem at all. In this example, diluted nitric acid was used to remove nitrogen.

The film was etched, and then the silicon oxide film was etched using a buffered hydrofluoric acid solution. Next, Figure 1(f)
As shown in FIG. 3, the resist pattern 105 was ashed in oxygen plasma using a cylindrical iodizing device. The ashing conditions were a pressure of 0.1 torr and a power of 100111 for 40 minutes. After removing the resist in this way, the No pattern under the resist pattern was removed using a mixed solution of sulfuric acid and hydrogen peroxide. At this time, N.

A silicon oxide film pattern as shown in FIG. 1(g) was formed by simultaneously immersing a sample in the conventional process in which the film was not inserted under the resist. TVS (Triangular Voltag
The amount of mobile ions in the silicon oxide film was evaluated using the Sweep method. The TVS method evaluates the amount of mobile ions by applying a ramp voltage to the silicon oxide film at an elevated temperature of about 200 to 300° C. and detecting the transition current of ions moving in the silicon oxide film.

In order to apply a voltage, an An electrode was formed on the silicon oxide film having the structure shown in FIG. 1(g), and ↑vS measurements were performed.

As a result, in the conventional process that does not use a thin Mo film under the resist, approximately l Q 12 cm -2 ions were detected. On the other hand, in the samples in which a Mo film with a thickness of 30 or 3000 was deposited under the resist, the amount of mobile ions was below the detection limit of the TVS method (3×10 9 cm −2 ). In this way, simply by depositing a thin Mo film before applying the resist, it is possible to prevent sodium from penetrating into the silicon oxide film that occurs when the resist is ashed. The reason for this is not clear at this stage, but one possible model is that even if ions are incident on the Mo film deposited on the surface of the silicon oxide film, the M
The reason for this is that the sodium is neutralized by the electrons within the o-film and does not ionize.

Although a Mo film is used in this embodiment, other metals or alloys such as W, Ta, and Al can also be used to obtain sufficient effects. Furthermore, the thickness of the metal film is 3 as shown in this example.
Since it is possible to prevent the incorporation of mobile ions even when the film is extremely thin, it has a wide range of application in film thickness. However, when the metal film becomes thin, the film structure becomes island-like, and furthermore, when the distance between the islands is longer than the distance that allows electron tunneling, conductivity cannot be obtained. Therefore, the expected effects of the present invention cannot be obtained. The thickness of the film forming the island-like structure varies greatly depending on the type of metal. In general, high melting point metals are less likely to form an island structure, for example M
In the case of the O film, conductivity was exhibited even at a film thickness of 1-0λ. On the other hand, in the case of an Au film, although it depends on the formation conditions,
Conductivity could not be obtained below the thickness of a human. on the other hand,
When the metal film is made thicker, a difference in pattern conversion occurs between the resist and the metal, which is disadvantageous in terms of microfabrication. If workability is not an issue, it can be made as thick as desired.

Regarding resist types, contamination was observed in conventional commercially available resists such as AZ series and 0FPR, but contamination could be prevented by employing the process of the present invention. Furthermore, although Fig. 1 shows an example for processing a silicon oxide film formed on a silicon substrate, in the case of a silicon oxide film, it is possible to process a silicon oxide film by using a CVD method or the like in addition to thermally oxidizing the silicon substrate. A similar effect can be obtained with a deposited film or a film containing phosphorus, poron, or the like.

That is, it is fully applicable to the processing of a living room insulating film in a wiring process and the processing of a silicon oxide film on polycrystalline silicon.

Furthermore, considering the mechanism of invasion, the present invention can be applied to not only silicon oxide films but also silicon nitride films, etc., since the same phenomenon occurs when considering the mechanism of invasion.

[Example 2] FIG. 2 is a diagram showing an example in which the present invention is applied to processing a silicon oxide film using a three-layer resist. Figure 2 (a
), after depositing a W film 203 with a thickness of 100 nm on the surface of a silicon oxide film 202 formed on a substrate 201, an organic polymer layer 204, an intermediate layer 205 . Resist layers 206 are sequentially deposited 204, 205.

A resist pattern 207 was formed as shown in FIG. 2(b) by a zero-order exposure and development process using a three-layer resist composed of 20B. Next, as shown in FIG. 2(C), the intermediate layer and the organic polymer layer are sequentially processed using the resist pattern 207 as a mask to form a three-layer resist pattern 208.
was formed. Next, as shown in FIG. 2(d), the W film and the silicon oxide film are sequentially processed using the three-layer resist pattern as a mask. However, if the -W film is thin, it is also possible to process it successively using the same device when forming the three-year resist pattern. In this case, oxygen contains CF4 and CC.
It is more efficient to add gas such as 1a. Finally, the three-layer resist pattern 208 and the W pattern 208
was removed to obtain the structure shown in FIG. 2(e) in which a silicon oxide film pattern was formed on the substrate.

In the above process, A21370 resist is used as the organic polymer layer and the three-layer resist pattern is removed in oxygen plasma. 1012
It is known that mobile ions of about 0ffl-2 are observed. However, in this example, a three-layer resist is used for 0 or more in which no mobile ions were detected, but the same effect can be obtained with a two-layer resist. Further, even when the type of metal film, film thickness, and type of resist are changed, the same effect as in Example 1 can be expected.

[Embodiment 3] FIG. 3 is a diagram showing an embodiment in which the present invention is applied to a process of selectively implanting ions into a substrate using a resist as a mask. As shown in FIG. 3(a), a silicon oxide film 302 is formed on the surface of a silicon substrate 301 in the same manner as in Example 1, and further an MO pattern 303 and a resist pattern 3 are formed.
04 was formed. Next, perform ion implantation into the substrate with n+
Layer 305 was formed.

Thereafter, the resist pattern 304 was removed by ashing treatment, and then the No film was removed by a mixture of sulfuric acid and hydrogen peroxide, and no sodium contamination into the silicon oxide film was observed at all. Note that in the above steps, if the No film is made as thin as about 30λ, it is possible to leave the No film unprocessed and implant ions into the substrate through the No film. In this case, charge accumulation on the substrate surface during ion implantation can be prevented, and dielectric breakdown of the silicon oxide film can be prevented. The process of implanting ions using a resist mask is often used, for example, in the process of forming sources and drains when manufacturing CMOS devices.

In these processes, ions are implanted into the resist, which changes the quality of the resist itself and makes it impossible to remove it using a wet method using a resist stripping solution. There is no choice but to remove it. In the conventional method, contamination occurred during this iodization treatment step, which was a problem, but this problem could be solved by using the present invention.

[Example 41] FIG. 4 is an example in which a CMOS semiconductor device was manufactured by combining Examples 1, 2, and 3, and shows the main manufacturing steps. First, as shown in FIG. 4(a), a silicon substrate 401 having an inter-element isolation region 402 and a well region 403 formed using a known method is prepared, and a film thickness is further increased in the region to become an element. 200 people gate oxide film 4
After forming 04, as shown in FIG. 4(b), a polycrystalline silicon thin film 405 was formed, and a polycrystalline silicon oxide film 406 was formed using a thermal oxidation method. Next, using the method shown in Example 1, a polycrystalline silicon oxide film pattern 407 is formed.
and subsequently etching the polycrystalline silicon to form a polycrystalline silicon pattern 40B.
The structure shown in FIG. 4(C) was obtained. Specifically, in this case, N is deposited on the polycrystalline silicon oxide film to a thickness of 100 nm.

After depositing the film, a resist is applied, a resist pattern is formed by exposure Φ development processing, and this is used as a mask to form a No.
The film and polycrystalline silicon oxide film were etched. The resist pattern and No. pattern may be removed before or after polycrystalline silicon etching.
Next, as shown in FIG. 4(d), the side surfaces of the polycrystalline silicon pattern were thermally oxidized to create a structure in which the entire surface of the silicon substrate was covered with a silicon oxide film, and then as shown in FIG. 4(e). An MO film 409 with a thickness of 30 mm is deposited as shown in FIG.
As shown in FIG. 5F, after forming a first resist pattern 410, phosphorus ions were implanted to form n+ source/drain regions 411. In this case, since the No film is extremely thin, the implanted ions can sufficiently penetrate through the No film. The resist pattern, the polycrystalline silicon pattern, and the element isolation region are sufficiently thick so that ions cannot penetrate through them, so that ions can be selectively implanted into the substrate. Note that it is also possible to remove No. 410 from the portions other than under the resist pattern before ion implantation.Next, after removing the first resist pattern 410 by iodine treatment, As shown in g), the region into which phosphorous ions were implanted was covered with a second resist pattern 412, and poron ions were implanted to form p+ source/drain regions 413.

After ion implantation, ashing treatment of the second resist pattern,
In this example, where the No film was etched, (r),
Although the same No film was used in the step (g), it may be removed and newly deposited after each ion implantation. After both ion implantations, heat treatment is performed to activate the implanted ions, and then the fourth implantation is performed.
After depositing the interlayer insulating film 414 as shown in Figure (h),
As shown in Figure 4 (i), six holes are made in the interlayer insulating film.
In the step 0 or more in which the ll wiring 415 is formed, the step of forming a resist pattern on the insulating film is in the form of an element isolation region.

There are many problems such as forming a polycrystalline silicon oxide film, processing a polycrystalline silicon oxide film, and making holes in an interlayer insulating film, and the present invention can be applied to all of them.

In addition, there are many types of semiconductor devices other than 0MO8, such as NMOS, bipolar, and even gallium arsenide integrated circuits.
The present invention can be applied.

[Effects of the Invention] As explained above, by inserting a metal film between the resist and the substrate in the pattern forming process using the known photolithography technique, sodium intrusion into the substrate in the resist ashing process can be prevented. This makes it possible to construct a semiconductor device with stable characteristics.

[Brief explanation of the drawing]

Figure 1 shows an example in which the present invention is applied to processing a silicon oxide film formed on a silicon substrate. Figure 2 shows an example in which the present invention is applied to processing a silicon oxide film using a three-layer resist. A diagram showing an embodiment, FIG. 3 shows the present invention,
FIG. 4 is a diagram showing an embodiment in which the present invention is applied to a process of selectively implanting ions into a substrate as a resist mask. FIG. 4 is a diagram showing an embodiment in which the present invention is applied to manufacturing a CMOS semiconductor device. 101... Silicon substrate, 102... Silicon oxide film, 103... MO film, 104... Resist layer, 105... Resist pattern, 108... MO pattern, 107... Silicon oxide film Pattern, 201... Substrate, 202... Silicon oxide film, 203... W film, 204... Organic polymer layer, 205... Intermediate layer, 20B... Resist layer, 207... resist pattern. 208...Three-layer resist pattern, 209...W pattern. Patent applicant: Agent of Nippon Telegraph and Telephone Corporation
Patent Attorney Yoshi Tani - Fig. 1 4 Main entry Fig. 3\4ノ 1Nノ' Fig. 4 Fig. 4

Claims (1)

[Claims] a step of depositing a metal thin film on a substrate having an insulating thin film on at least a portion; a step of depositing an organic polymer layer on the substrate on which the metal thin film is deposited; and a step of depositing an arbitrary region of the organic polymer layer. removing to form an organic polymer layer pattern;
Manufacturing a semiconductor device comprising: removing the organic polymer layer pattern by ashing; and removing at least a portion of the metal thin film located under the organic polymer layer pattern. Method.