JPS61285521A - Computer device of low power consumption - Google Patents

Abstract

PURPOSE:To reduce the power consumption of peripheral circuits owing to the supply of clocks by keeping the clock signals turned off excepting an operating mode. CONSTITUTION:A clock signal control circuit 13 controls whether the clock signals 5 given from a signal generating circuit 2 are supplied to peripheral circuits 9-12 or not by turning on and off the AMD gates 17, 19, 21 and 23 respectively. A reset signal generating circuit 14 supplies the reset signals to the reset terminals of circuits 9-12 through the OR gates 18, 20, 22 and 24 by the program of a computer 1. When one of circuits 9-12 is selected, no actuation is needed with other non-selected circuits.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a low power consumption type computer device, and more particularly, to a low power consumption type computer device suitable for a portable computer that uses less battery power.

[Background of the invention]

In devices using semiconductor logic elements such as computers, in order to reduce power consumption, 0-M, which has lower power consumption,
Large scale integrated circuit devices made with O8 silicon gate technology are often used. This is because the C-MO8 element consumes very little power when there is no signal input/output to the element.

FIG. 5 is a block diagram showing an example of the configuration of a computer device using C-MO8 elements, in which a microcomputer I and various peripheral circuits 9 to 12 are connected by an address bus 7 and a data bus 8, and a signal From the generation circuit 2, clock signals 3 and C'°5 and a reset signal 6 are supplied to the microcomputer 1 and peripheral circuits 9-12. Note that a memory circuit and the like are also required, but they are omitted in the figure because they are not directly related to the present invention. In such a system, the reset signal 6 is supplied when the power is turned on or when the switch 4 is turned on manually. On the other hand, the clock signal 5 is constantly supplied to all peripheral circuits 9-12. For this reason, clocks are also supplied to peripheral circuits that are not selected for operation, and wasteful power consumption associated with clock input/output cannot be avoided. In addition, peripheral circuits that require a clock input to maintain the initial setting (reset signal input/output) will receive a clock supply while not actually operating, so power consumption for this will increase. I couldn't avoid it either.

[Purpose of the invention]

An object of the present invention is to provide a low power consumption computer device capable of solving the problems of the prior art and further reducing power consumption. In order to maintain the set initial state by providing a means to control to stop the clock supply to peripheral circuits that are not operating, and by providing a means to reset any peripheral circuit under software control when necessary. This is characterized by eliminating the need for a clock supply.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG. This embodiment adds a clock signal control circuit 13 and a reset signal generation circuit 14, which are the features of the present invention, to the conventional device shown in FIG. This is a configuration in which gates 17 to 24 are added. The clock signal control circuit 13 receives the clock signal 5 from the signal generation circuit 2.
This circuit controls whether or not the AND gates 17, 19, and 21.23 are turned on and off to the respective peripheral circuits 9.10 and 11.12. Can be turned off. The reset signal generation circuit 14 connects the reset terminals of the respective peripheral circuits 9, 10, 11.12 with OR gates 18. 20. A reset signal is supplied through 22 and 24, and which peripheral circuit is to be reset is determined by the program of the microcomputer 1.

Note that the memory circuitry is omitted in FIG. 1 as in the case of FIG. 5. Furthermore, when one of the peripheral circuits 9 to 12 is selected by the microcomputer 1, the other peripheral circuits do not need to operate.

The operation of the above embodiment will be explained next. FIG. 2 is an operation flowchart at the time of power-on start (reset start). First, in step 100, all AND gates 17
, 19.21.23 are turned on to apply the clock signal 5 to each peripheral circuit, and in step 101, all OR gates 18.
20. 22. Reset each peripheral circuit by applying a reset signal 6 via 24, then perform necessary initial settings for each peripheral circuit in step 102, and then perform step 1.
At step 03, all AND gates are turned off, clock supply is stopped, and the reset start is completed. Next, when one peripheral circuit is selected by the microcomputer 1, the third
As shown in the figure, first, in step 110, a clock signal 5 is input to the peripheral circuit, and in step 111, the operation of the peripheral circuit is stopped.When that is completed, the clock signal is turned off in step 112, and the process ends. Further, if the selected peripheral circuit is a circuit that cannot maintain the state initialized in steps 101 and 102 of FIG. 2 without a clock signal, as shown in FIG.
0 and step 111, the operation is performed according to the flowchart inserted in step 120'i. That is, the peripheral circuit selected in step 120 is reset and initialized again.

〔Effect of the invention〕

As described above, according to the present invention, since the clock signal of each peripheral circuit is turned off except when it actually operates, it is possible to reduce the power consumption associated with supplying the clock signal. You can get the same effect at any time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG.
FIG. 4 is a 74-chart showing the operation of clock supply control in the embodiment of FIG. 1, and FIG. 5 is a diagram showing an example of the configuration of a conventional computer device. l... Microcomputer, 2... Signal generation circuit, 9.10, 11.12... Peripheral circuit, 14... Reset signal generation circuit, 17, 19.21.23... AND gate, 18, 20, 22. 24... Or Gate Boru 4th Figure 4 $ 5 Figure

Claims (1)

[Claims] 1. A gate provided for each peripheral circuit that turns on and off the clock supply to each peripheral circuit connected to the microcomputer, and a gate provided for each peripheral circuit only when the corresponding peripheral circuit is used. 1. A low power consumption type computer device, characterized in that it is provided with clock signal control means for controlling the clock signal to be turned on. 2. The low power consumption computer device according to claim 1, wherein a reset signal is given to a specified peripheral circuit at a time point specified by a program controlling the microcomputer.