JPS6128167A - High speed data collecting device - Google Patents

Abstract

PURPOSE:To attain high-speed data collection without complicated constitution by amplifying various lots of signals multiplexed by a multiplexer with a lot of amplifiers with different gain and extracting a proper level multiplex signal at the multiplexer of post stage. CONSTITUTION:A signal from various signal detectors 111, 112... is subjected to time series multiplex by a multiplexer 21 controlled by a computer 24 and amplified by amplifiers 221, 222... with different proper gain installed by a number equal to the number of kinds of signals. A signal 4 of a proper level among the amplified multiplex signals is extracted by the multiplexer 23 of the post stage controlled by the computer 24 and collected via a sample-and-hold circuit 15 and an A/D converter 16. The data is collected at higher speed than that of amplification of various signals at corresponding amplifiers and multiplexed by a multiplexer without complicating the constitution.

Description

[Detailed description of the invention] [Graduation publication field] What is this invention? For example, in nuclear power and fire coverts, space equipment, various test equipment, etc., analog data signals from a large number of detection devices are collected and processed. It relates to high-speed data collection equipment used in

[Conventional technology]

A conventional high-speed data acquisition device for low-level analog signals is schematically shown in FIG. Various detectors 111゜112,...
, 11n (each system is shown as a channel Chi, Ch2..., Chn) is a respective channel Chi.

The signals are amplified to the same level through amplifiers 121, 122, . This MPX l 3 is a channel switching signal X from the data acquisition computer device 14.
All channels are switched from channel to channel (this is called scanning), chz, chz, ..., Chn to each amplifier 121, 122 . . . . Sequentially outputs analog signals supplied via r12nk. This MPX J
The analog signal output from 3 is converted by the sample/halt 9 circuit 5 in a short time Δt (the next-stage converter 16 converts the analog signal 'a14 for one channel), and the data acquisition computer 14 converts it into Converter 16
After being converted into a digital signal, it is supplied to the computer device 14 for data acquisition. In this way Ch
When scanning of all channels from 7 to Chni is completed, this process is repeated again to obtain data at the next time. After that, repeat this process to obtain all the data for the required time.

[Problem that the invention seeks to solve]

However, in such a data acquisition device, each channel is assigned one-to-one channels f121, 122 . −． Since this large number of amplifiers 121°122,...,1
The cost ratio of 2n to the entire system becomes large. Additionally, the system configuration is complicated, and adjustment and calibration work requires a lot of time.

On the other hand, as a method of improving the drawbacks of the data collection device as shown in FIG. 3, a system configuration as shown in FIG. 4 has been considered. This is for each detector 111, 112
．． ..., analog signal from lln, MPX 13
, and one amplifier J2 is placed at the subsequent stage, and its function is the same as the system shown in FIG. 3 above. However, in the system configuration shown in FIG. 4, since only one amplifier 12 is installed, all analog signals from each channel can only be handled at the same level, that is, only analog signals of the same type. It has the disadvantage of being limited in scope and lacking in versatility.

Therefore, the present invention has been made in view of the above-mentioned problems, and aims to provide a high-speed data collection device that does not limit versatility and has a cost advantage that allows the system configuration to be simplified. purpose.

[Means and operations for solving the problem] That is, the high-speed data acquisition device according to the present invention multiplexes all analog signals using a multiplexer (hereinafter abbreviated as MPX), and then multiplexes the number of signal levels (i.e. (Number of signal types) Amplifiers installed equal to K and number B are amplified, and then other MPXs installed in the subsequent stage extract only the appropriate analog signals from the analog signals amplified by the above amplifiers and output data. Data acquisition is performed, and the two MPXs are controlled by a computer device for data acquisition.

[included case example]

An embodiment of the present invention will be described below with reference to the drawings. Figure 1 shows the configuration of the high-speed data collection device.
, 112. ..., lln are detectors for various signals (hereinafter each signal will be referred to as ct+z, ch2...+Chn). These detectors 111, 112,...

A pre-stage multiplexer (hereinafter abbreviated as "pre-stage MPX") converts n analog signals from 11n into time-series multiplexed signals by switching each channel of two channels. Next, this pre-stage MPX 21 multiplexes the analog signal into appropriate dynes G7, G2,...+ for each signal level.
m amplifiers 221, 222 having Gm f (this m is equal to the number of signal levels, that is, the number of signal Inabata)
．． ..., at 22m, it is amplified and the second stage MPX
2.7.

This 'f & stage MPX23 has the above m amplifiers of 22.

m channels of signals from 222, ..., 22m are input sequentially and selected, and only channels with appropriate levels are selected and extracted.
The signal is transmitted to the sample and hold circuit 15. This sample and hold circuit 15 is connected to the above-mentioned latter stage MPX 23.
The analog signal transmitted from the sample/hold circuit 15 is held at Δ for a certain period of time.
J lower tv'.

j7/? -Abbreviated as Yu. ) 16 to convert it into a digital signal, and this digital signal is supplied to a data acquisition computer device 24 to collect various detection data.

In this case, the above-mentioned front stage MPX 21 L- and rear stage MPX
The switching operation of 23 is controlled by the software 24a of the communication device 24.

Next, FIG. 2 shows the operating signals (J) + (SMPXI L(SA
) , (SMPX2) * (SBH) , (5AD
)'fr:Note: The operation of this device will be explained below with reference to FIG.

In other words, the currently detected low level analog signal is Cb7.
．． Cb, 2. . . , Chn'j has n channels, and in order to amplify the signal at an appropriate level Lt for later gender conversion and computer input, each channel has a dyne G1 . G2. ..., Gm is required. Here, for example, assume that the appropriate gain corresponding to each channel is as shown in Table 1 below.

Table 1 That is, each lockout device 111, 112. ..., the detection signal (Sl) from 11n is sent to the previous stage MPX 21 Ch7
→Ch2→...→Chn, resulting in a time-series multiplexed signal (SMpx+'). this(
SMPXl) has a low level trench, and the level difference between each channel is up to the neck. This (SMpxi)
is 2 with amplifiers 221 and 02 having dyne G no.
22,-, Gm'ff: 22rnK are supplied simultaneously. Accordingly, each amplifier 221, 222°..., 22m amplifies (5upx+) supplied by each of the dynes G1 to Gm, and generates a signal (SA, 7).
, (sA-2).

... + (SA-m) is output. (Hereinafter, to simplify the explanation, it is assumed that the gain U G 7 < G m (G 2).) Here, when looking at the signal (SA-7), there is a C
All the signals at hi, Cb2°..., Chnt are included, but since the dyne of the amplifier 221 is G,
Only the signal of Chi whose proper gain is G shown in Table 1 above is at the proper level L, and the other channels, ? , Chn all have insufficient gain and are lower than the appropriate level L.

Similarly, in (SA-2), the gain of the amplifier 222 is 02, so only the signal of Cb2 with the appropriate dyne of G2 is at the appropriate level L, and the other chi.

All Chn signals have excessive gain. Furthermore, (SA-
m), the gain of Anne f22m is Gm, so
Only the Cbn signal with the appropriate dyne of Gm is at an appropriate level, and the other chl and ch2 signals all deviate from the appropriate level due to insufficient gain or too much dyne. Then, the rear stage MPX 23 uses these (sA-g, (sA-2)+.
・Switch the +(sA-m) signal system while keeping time alignment with the previous stage MPX 21 according to Table 1 above, and all c
h signal is converted to a time-series multiplexed signal (SMPX2) adjusted to an appropriate level L.

That is, during the time when the front stage MPX 21 is switched to Cb7 (between time T1 → T!), the rear stage MPX 23
(In accordance with Table 1 above, the system is switched to the amplifier 22 of the amplifier f (gain G in this case) corresponding to the proper input of that ChJ). At time, the system is similarly switched to the amplifier with the appropriate gain of Cb2 (amplifier 222 in this case), and then the system is switched to the system according to Table 1 above in the same way as 1 (1st).As a result, The output signal (SMPX2) of the subsequent stage MPX 2J is composed only of the output signal of the amplifier of the appropriate dynes corresponding to the channel being switched at a certain time in the previous stage MPX 21.
The signal is adjusted to an appropriate level L for that signal.

Thereafter, the signal (SMPX2) is held at Δ for a certain period of time (SH) by the sample and hold circuit 15, and the digital signal (SAD) is converted to the digital signal (SAD) by the ADD converter 16.
The data is converted and supplied to the computer device 24 for acquisition.

Here, the time alignment of the two MPXs 21 and 23 is achieved by controlling the switching σ'b of the front-stage MPX 21 and the rear-stage MPX 23 using switching signals c, z, and tc2 based on the software 24a of the computer device 24, respectively. is precisely controlled and computer device 24
Data check.

Post-processing such as scaling can be easily performed.

Therefore, according to the high-speed data acquisition device configured in this way, it is only necessary to install the number of amplifiers corresponding to the number of signal types m, regardless of the number n of detected signal channels. Even in the case where the number of types reaches 100, the number of types is several bulky types (e.g. thermocouples, thermistors, Z
(train gauges, etc.), the number of amplifiers that were previously required can be greatly reduced. Furthermore, since the signal type m is not limited, versatility is not reduced.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to simplify the system configuration without limiting the versatility, thereby shortening the adjustment, calibration work, etc. without impairing the data collection performance. It is possible to achieve significant cost reductions, cost performance (performance to price ratio) K,
An excellent high-speed data collection device can be provided.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a high-speed data collection device 6 according to an embodiment of the present invention, FIG. 2 is a diagram showing operating signals of each part of the high-speed data collection device in FIG. 1, and FIGS. Each figure shows a conventional data collection device. 111.112.・-, 1ln-signal detector, 21...
・Front stage multi-luxa, 221.222. .... 22n...Amplifier, 23...Late stage multiplexer.

Claims (1)

[Claims] a front-stage multiplexer that multiplexes a large number of various signals;
An amplifier that amplifies the multiplexed signal output from this multiplexer with an appropriate amplification gain corresponding to the type of signal mentioned above, and a post-stage multiplexer that extracts the multiplexed signal amplified by this amplifier only within the appropriate level range. - A high-speed data collection device characterized by being equipped with a plexer.