JPS61281606A - Double balanced modulator - Google Patents
Double balanced modulatorInfo
- Publication number
- JPS61281606A JPS61281606A JP13136586A JP13136586A JPS61281606A JP S61281606 A JPS61281606 A JP S61281606A JP 13136586 A JP13136586 A JP 13136586A JP 13136586 A JP13136586 A JP 13136586A JP S61281606 A JPS61281606 A JP S61281606A
- Authority
- JP
- Japan
- Prior art keywords
- inverting input
- input terminal
- operational amplifier
- output
- switching element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Amplitude Modulation (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は、二重平衡変調器に関するものである。[Detailed description of the invention] The present invention relates to a double balanced modulator.
従来の二重平衡変調器特にリング平衡変調器は、よ〈−
知られているごとく4個のスイッチング用ダイオードお
よび2個の入力、出力用トランスで構成されている。し
かしながらこの変調器はトランス等により著しく大獄と
なり、また、ダイオードもバラツキの少いものを使用せ
ねばならぬという欠点があった。Conventional double-balanced modulators, especially ring-balanced modulators, are
As is known, it consists of four switching diodes and two input and output transformers. However, this modulator has the drawback that it is extremely complicated due to the presence of transformers, etc., and also requires the use of diodes with little variation.
本発明の目的は前述の欠点を除去した二重平衡変調器を
提供するものである。The object of the invention is to provide a double-balanced modulator which eliminates the above-mentioned drawbacks.
本発明によれば、信号源と、搬送波発生器と、非反転入
力端子、反転入力端子および出力端子を有する演算増巾
器と、前記信号源と前記反転入力端子との間に接続され
た第1の抵抗器と、前記信号源と前記非反転入力端子と
の間に接続され前記搬送波発生器の出力で開閉されるス
イッチング手段と、前記出力端子と前記反転入力端子と
の間に接続された第2の抵抗器とを含み、前記第1およ
び第2の抵抗器の抵抗値を等しくしたことを特徴とする
二重平衡変調器が得られる。According to the present invention, a signal source, a carrier wave generator, an operational amplifier having a non-inverting input terminal, an inverting input terminal and an output terminal, and an operational amplifier connected between the signal source and the inverting input terminal 1 resistor, a switching means connected between the signal source and the non-inverting input terminal and opened and closed by the output of the carrier wave generator, and a switching means connected between the output terminal and the inverting input terminal. and a second resistor, and the first and second resistors have equal resistance values.
以下、図面を参照しながら本発明の詳細な説明する。Hereinafter, the present invention will be described in detail with reference to the drawings.
第1図は本発明の二重平衡変調器の一実施例である。FIG. 1 is an embodiment of the double-balanced modulator of the present invention.
第1図においてlは演算増巾器、2は演算増巾器lの非
反転入力端子に接続されたスイッチング素子、3は十分
低い内部インピーダンスRgをもつ信号波発振器、4は
演算増巾器lへ一端を接続された抵抗値R1を4つ入力
抵抗、5は演算増巾器lの反転入力端子と出力端子を結
び抵抗値R2をもつ帰還抵抗である。以下、この動作を
説明する。第1図のA点の信号波をep ” Epeo
ll Wptとすると、スイッチング素子2が遮断とな
っているとき演算増巾器lの出力eo OFFはeo
OFF ” ep (11
R,+ Rg
となる。In Fig. 1, l is an operational amplifier, 2 is a switching element connected to the non-inverting input terminal of the operational amplifier l, 3 is a signal wave oscillator with a sufficiently low internal impedance Rg, and 4 is an operational amplifier l. There are four input resistors having a resistance value R1 connected at one end to the input resistor, and a feedback resistor 5 having a resistance value R2 connecting the inverting input terminal and the output terminal of the operational amplifier l. This operation will be explained below. The signal wave at point A in Figure 1 is ep ”Epeo
ll Wpt, when the switching element 2 is cut off, the output eo OFF of the operational amplifier l is eo
OFF” ep (11
R, + Rg.
入力信号源インピーダンスRgは抵抗4に比し十分低い
ので
となる。This is because the input signal source impedance Rg is sufficiently lower than the resistor 4.
一方、スイッチング素子2が導通しているときは非反転
入力と反転入力の差が演算増巾器1の出力となるので
出力60 ONは
= ep = Ep cos vpt
(3)ここで抵抗4と5の抵抗値RtとR2の間に几
1=R2の第1条件をつけると
eo OFF == BPcos wpt = −eo
ON (41とな抄、スイッチング素子2が
導通のときと、遮断のときでは絶対値が等しく位相が1
80度異9九出力が得られる。On the other hand, when the switching element 2 is conductive, the difference between the non-inverting input and the inverting input becomes the output of the operational amplifier 1.
Output 60 ON = ep = Ep cos vpt
(3) Here, if we add the first condition of 几1=R2 between the resistance values Rt and R2 of resistors 4 and 5, eo OFF == BPcos wpt = -eo
ON (41) When the switching element 2 is conducting and when it is cut off, the absolute value is the same and the phase is 1.
You can get 99 outputs with 80 degrees difference.
そこで スイッチング素子2を角周波数ωCの搬送波Q
cの周期
にて導通・遮断を繰抄返すと第2図に示す様な出力波形
となり、スイッチング素子2の導通、遮断の境界にて位
相180度変化する。搬送波は、角周波数ωCなる矩形
波と考えられ、したがって
wct+・・・・・・ (6)
で示される。したがりて演算増巾器lの出力はHp c
os wpt (sinwct+ −5in3vrct
+ −) (7)となる。スペクトルのみにつ
いて注目するとl sin (WP+WC) t +
sin (vrp−wc) t l+ −1sin(w
p−3wc)t+sin (wp−3VC)t1+・・
・・・・ (8)と
なり、これは説明してきた回路が二重平衡変調器である
ことを示している。Therefore, switching element 2 is connected to carrier wave Q of angular frequency ωC.
When conduction and cutoff are repeated at a period of c, the output waveform becomes as shown in FIG. 2, and the phase changes by 180 degrees at the boundary between conduction and cutoff of the switching element 2. The carrier wave is considered to be a rectangular wave with an angular frequency ωC, so wct+... (6)
It is indicated by. Therefore, the output of the operational amplifier l is Hp c
os wpt (sinwct+ -5in3vrct
+ −) (7). Focusing only on the spectrum, l sin (WP+WC) t +
sin (vrp-wc) t l+ -1sin(w
p-3wc)t+sin (wp-3VC)t1+...
...(8), which shows that the circuit described is a double-balanced modulator.
以上、説明した様に未発11によると搬送波ecにより
スイッチング素子2を導通遮断し、信号波epを演算増
巾器lの非反転入力縮子へ入力することにより小型、安
定かつ安価な二重平衡変調器を構成しうる。As explained above, according to the non-emission 11, the switching element 2 is turned off by the carrier wave ec, and the signal wave ep is input to the non-inverting input condenser of the operational amplifier l. A balanced modulator may be constructed.
第3図は本発明に関連した二重平衡変調器である。FIG. 3 is a double balanced modulator associated with the present invention.
第3図において、6はスイッチング素子、7は抵抗器R
3,8はインバータであり、第2図と同じものは同一番
号で示しである。In FIG. 3, 6 is a switching element, 7 is a resistor R
3 and 8 are inverters, and the same parts as in FIG. 2 are indicated by the same numbers.
以下、動作を説明する。第3図のA点の信号波をep冨
Ep cos wp tとすると、イン、バーク8によ
りスイッチング素子6が導通しているときは、スイッチ
ング素子2が遮断となりでいるため演算増巾器1の出力
e02は
eo2 = ep
I
R・2
= −−Hp cos WP t
(91スイッチング素子2が導通しているときは
スイッチング素子6が遮断となっているため演算増巾器
1の出力603は
803=(1+ )ep
= (1+ −) Hp cos wp t
(10)そこで、第2の条件として抵抗4,5およ
び7の間にR1= R2< R3をみたすとき、
e!02 = Hp cos Wptec)3= H
p cos Wpt
また第3の条件として抵抗4.5および7の間にR,=
R3(R2をみたすとき
eoz ”−Bp CO8Wp t
とな抄、第2の条件または第3の条件をみたすことによ
り、スイッチング素子6が導通のときと、スイッチング
素子2が導通のときでは絶対値が等しく、位相が180
度異9た出力となる。The operation will be explained below. Assuming that the signal wave at point A in FIG. The output e02 is eo2 = ep I R・2 = --Hp cos WP t
(When 91 switching element 2 is conducting, switching element 6 is cut off, so the output 603 of operational amplifier 1 is 803 = (1+) ep = (1+ -) Hp cos wp t
(10) Therefore, when R1=R2<R3 is satisfied between resistors 4, 5, and 7 as the second condition, e! 02=Hp cos Wptec)3=H
p cos Wpt Also, as a third condition, R,= between resistances 4.5 and 7
R3 (when R2 is satisfied, eoz ”-Bp CO8Wp t) By satisfying the second condition or the third condition, the absolute value is equal and the phase is 180
The output will be 9 different degrees.
そこで、スイッチング素子2,6を、角周波数ωCの搬
送波ecの周期(5)式にて交互に開閉すると、第2図
に示す様な波形となり互いのスイッチの導通・遮断の境
界にて位相が180°変化する。Therefore, if the switching elements 2 and 6 are alternately opened and closed according to the period equation (5) of the carrier wave ec with the angular frequency ωC, the waveform shown in FIG. Changes by 180°.
演算増巾器1の出力は、前述の(8)式と同様になり、
これは二重平衡変調器であることを示している。The output of the operational amplifier 1 is similar to the above equation (8),
This indicates a double balanced modulator.
以上説明した様に本発明によると搬送波により交互に駆
動されたスイッチング素子を通して信号波を演算増巾器
の反転入力端子、非反転入力端子へ入力することにより
、小製、安定かつ安価な二重平衡変調器を構成しうる。As explained above, according to the present invention, by inputting a signal wave to an inverting input terminal and a non-inverting input terminal of an operational amplifier through switching elements driven alternately by a carrier wave, a small, stable and inexpensive duplex A balanced modulator may be constructed.
第1図は本発明による二重平衡変調器の一実施例を示す
回路図、第3図は本発明に関連した二重平衡変調器、第
2図は第1図および第3図の出力波形例である。
図にお込て、1 ・・・演算増巾器、2,6 ・・・
スイッチング素子、3 ・・・信号源、4,5.7 ・
・・ 抵抗、8 ・・・インバータである。FIG. 1 is a circuit diagram showing an embodiment of a double-balanced modulator according to the present invention, FIG. 3 is a double-balanced modulator related to the present invention, and FIG. 2 is the output waveform of FIGS. 1 and 3. This is an example. In the figure, 1... operational amplifier, 2,6...
Switching element, 3...Signal source, 4,5.7 ・
... Resistor, 8 ... Inverter.
Claims (1)
端子および出力端子を有する演算増巾器と、前記信号源
と前記反転入力端子との間に接続された第1の抵抗器と
、前記信号源と前記非反転入力端子との間に接続され前
記搬送波発生器の出力で開閉されるスイッチング手段と
、前記出力端子と前記反転入力端子との間に接続された
第2の抵抗器とを含み、前記第1および第2の抵抗器の
抵抗値が等しいことを特徴とする二重平衡変調器。a signal source, a carrier wave generator, an operational amplifier having a non-inverting input terminal, an inverting input terminal and an output terminal; a first resistor connected between the signal source and the inverting input terminal; a switching means connected between the signal source and the non-inverting input terminal and opened and closed by the output of the carrier wave generator; and a second resistor connected between the output terminal and the inverting input terminal. , wherein the first and second resistors have equal resistance values.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61131365A JPH061858B2 (en) | 1986-06-06 | 1986-06-06 | Double balanced modulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61131365A JPH061858B2 (en) | 1986-06-06 | 1986-06-06 | Double balanced modulator |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2731878A Division JPS54119868A (en) | 1978-03-09 | 1978-03-09 | Double balanced modulator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61281606A true JPS61281606A (en) | 1986-12-12 |
JPH061858B2 JPH061858B2 (en) | 1994-01-05 |
Family
ID=15056220
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61131365A Expired - Lifetime JPH061858B2 (en) | 1986-06-06 | 1986-06-06 | Double balanced modulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH061858B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02222309A (en) * | 1989-02-23 | 1990-09-05 | Matsushita Electric Ind Co Ltd | Balanced modulator |
WO2018168074A1 (en) * | 2017-03-14 | 2018-09-20 | オムロン株式会社 | High-frequency oscillation measuring system |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4839156A (en) * | 1971-09-22 | 1973-06-08 |
-
1986
- 1986-06-06 JP JP61131365A patent/JPH061858B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4839156A (en) * | 1971-09-22 | 1973-06-08 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02222309A (en) * | 1989-02-23 | 1990-09-05 | Matsushita Electric Ind Co Ltd | Balanced modulator |
WO2018168074A1 (en) * | 2017-03-14 | 2018-09-20 | オムロン株式会社 | High-frequency oscillation measuring system |
JP2018151270A (en) * | 2017-03-14 | 2018-09-27 | オムロン株式会社 | High-frequency vibration measuring system |
Also Published As
Publication number | Publication date |
---|---|
JPH061858B2 (en) | 1994-01-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH05505297A (en) | Apparatus and method for generating quadrature signals | |
US3027522A (en) | Double balanced transistor modulator | |
US3386041A (en) | Demodulator circuit for period modulated signals | |
JPS61281606A (en) | Double balanced modulator | |
JP2710507B2 (en) | Amplifier circuit | |
JP2930305B2 (en) | Phase shift type oscillation circuit | |
US3868596A (en) | Fsk oscillator | |
US3558925A (en) | Low ripple double demodulator subject to integration | |
SU1462461A1 (en) | Demodulator/modulator | |
US4591811A (en) | Generator for generating an amplitude modulated signal corresponding to a carrier signal modulated by an information signal | |
US3373381A (en) | Transmission line phase modulator | |
JP2520337B2 (en) | Quadrature modulator | |
JPS607209A (en) | Phase shift synergetic fm demodulator | |
JPS6271319A (en) | Voltage controlled oscillator | |
JPH06318960A (en) | Phase modulator | |
KR870006710A (en) | Three phase sine wave generator | |
JPS5884508A (en) | Double balanced mixer device | |
SU811489A1 (en) | Mixer | |
JPS6340927Y2 (en) | ||
JPS59151509A (en) | De-emphasis circuit | |
JPH0521443B2 (en) | ||
JPS6219085B2 (en) | ||
JPH07107130A (en) | Phase modulator | |
JPS63283213A (en) | Voltage controlled oscillator | |
JPS6349826B2 (en) |