BACKGROUND OF THE INVENTION
The present invention relates to an amplitude-modulated signal generator.
In the field of a radiocommunication, an amplitude-modulated signal generator is employed for the amplitude modulation of a carrier wave in accordance with a suitable information wave. A number of amplitude-modulated single generators have been proposed, and the ones which employ transistor are known as a base modulation type, an emitter modulation type and a collector modulation type, all of which need a transformer.
Since any one of these conventional amplitude-modulated signal generators requires the use of a transformer, the generator becomes bulky in size and it requires a high manufacturing cost. Particularly, when the conventional amplitude-modulated signal generator is used in an ultrasonic wave generator capable of generating an ultrasonic signal of relatively low frequency, for example, 30 to 500 KHz, the transformer must have a high inductance, resulting in a very large size generator. Furthermore, a precise adjustment is necessary.
On the other hand, an amplitude-modulated signal generator using no transformer is also well known. One amplitude-modulated generator of this type includes a circuit wherein an electric current generated from a constant current source defined by a differential amplifier is varied by a carrier wave to produce an amplitude modulated wave. Another known type is a product modulating circuit wherein an analog multiplier is utilized. However, these modulating circuits are complicated in circuit arrangement and, requires a high manufacturing cost, particularly when they are desired to be fabricated in a compact size.
SUMMARY OF THE INVENTION
The present invention has been developed with a view to substantially eliminating the above discussed disadvantages inherent in the prior art amplitude-modulated generator and has for its essential object to provide an improved amplitude-modulated signal generator which does not require the use of any transformer and which requires no circuit adjustment and which can be manufactured at a minimized cost with a minimized number of component parts.
To this end, the amplitude-modulated signal generator according to the present invention is featured in that a signal in phase with the modulating signal produced from an emitter of a transistor and a signal opposite in phase with respect to the same modulating signal produced from a collector of a transistor are alternately transmitted at the frequency of carrier wave by switching diodes. The switching diodes are driven alternately by the carrier wave. Accordingly a produced signal is very similar to the amplitude modulated signal in which the carrier wave is amplitude modulated by the modulating signal.
BRIEF DESCRIPTION OF THE DRAWINGS
These and other objects and features of the present invention will become readily understood from the following description taken in conjunction with a preferred embodiment with reference to the accompanying drawings, in which:
FIG. 1 is a circuit diagram showing an amplitude-modulated generator according to the present invention;
FIG. 2(a) is a diagram showing the waveform of a modulating signal;
FIG. 2(b) is a diagram showing the waveform of a carrier wave;
FIG. 2(c) is a diagram showing the waveform of an output from a phase divider circuit used in the amplitude-modulated generator of FIG. 1; and
FIG. 2(d) is a diagram showing the waveform of an amplitude modulated output generated from the amplitude-modulated generator of FIG. 1.
DETAILED DESCRIPTION OF THE EMBODIMENT
Referring first to FIG. 1, an amplitude-modulated signal generator shown therein comprises input terminal 1 to which a modulating signal is supplied, phase dividing circuit 2, and a pair of switching diodes 3 and 4 connected in parallel to each other in the opposite sense of polarity. It further comprises carrier wave amplifier 5, having input terminal 6 to which the carrier wave is supplied. Output terminal 7 is provided for producing an amplitude modulated signal.
Phase dividing circuit 2 comprises a coupling capacitor C1, series-connected bias resistors R1 and R2, n-p-n type transistor Q1 and series-connected load resistors R3 and R4. Bias resistor R1 is inserted between the base of transistor Q1 and power source line 8, and bias resistor R2 is inserted between the base of transistor Q1 and the ground. Load resistor R3 is inserted between the collector of transistor Q1 and power source line 8, and load resistor R4 is inserted between the emitter of transistor Q1 and the ground. A junction between bias resistors R1 and R2 which is connected to the base of transistor Q1 is connected to input terminal 1 through coupling capacitor C1.
Switching diode 3 has its anode and cathode connected respectively to the emitter of transistor Q1 and the anode of the switching diode 4 having its cathode connected to the collector of the transistor Q1. A junction between the cathode of switching diode 3 and the anode of switching diode 4 is in turn connected through coupling capacitor C2 to output terminal 7 and also through load resistor R7 to amplifier 5.
Amplifier 5 comprises n-p-n type transistor Q2 having its emitter connected to the ground and its base connected through coupling capacitor C3 to input terminal 6. Bias resistor R6 is connected between the base and the collector of transistor Q2, and load resistor R5 is connected between the collector of transistor Q2 and power source line 8. The collector of transistor Q2 is also connected to load resistor R7 which is in turn connected to the junction between the respective cathode and anode of switching diodes 3 and 4 as hereinbefore described.
It is to be noted that load resistors R3 and R4 have their respective resistances approximately equal to each other. It is also to be noted that the resistances of the respective bias resistors R1 and R2 are so selected that, for a given power source voltage +Vcc supplied to power source line 8, and assuming that no modulating signal is applied to input terminal 1, the D.C. potentials at the emitter and collector of transistor Q1 are Vcc/4 and 3Vcc/4, respectively.
While the amplitude-modulated generator is constructed as hereinbefore described, it operates in the following manner.
Assuming that the modulating signal has a waveform shown in FIG. 2(a) and is fed to input terminal 1 while the carrier wave having a frequency sufficiently higher than that of the modulating signal, such as shown in FIG. 2(b), is fed to input terminal 6, the potential at the emitter of transistor Q1 varies in accordance with the modulating signal applied to the base of transistor Q1, fluctuating above and below the D.C. potential of Vcc/4 in the same phase as the modulating signal, as shown by waveform We in FIG. 2(c). On the other hand, the potential at the collector of transistor Q1 fluctuates above and below the D.C. potential of 3Vcc/4 in the opposite phase to the modulating signal applied to the base of transistor Q1, as shown by waveform Wc in FIG. 2(c).
Accordingly, a phase-matched signal We, matched in phase with the modulating signal, and a phase-reversed signal Wc, in a phase opposite to that of the modulating signal, are generated respectively from the emitter and the collector of transistor Q1.
When the carrier wave, as shown in FIG. 2(b) is applied to input terminal 6, transistor Q2 turns on during the positive-going half-cycle of the carrier wave thereby producing a LOW signal at the collector of transistor Q2. Then, during the negative-going half-cycle of the same, transistor Q2 turns off, thereby producing a HIGH signal at the collector of transistor Q2.
When the collector of transistor Q2 produces LOW as the result of the switch on of transistor Q2 as hereinabove described, the cathode of switching diode 3 and the anode of switching diode 4 are connected to the ground through the resistor R7 and transistor Q2. In such a condition, switching diode 4 is turned off because the anode potential thereof is lower than the cathode potential thereof, and, at the same time, switching diode 3 is turned on because the cathode potential thereof is lower than the anode potential thereof.
When switching diodes 3 and 4 are, respectively, switched on and off during the positive-going half-cycle of the carrier wave, the phase-matched signal We from the emitter of transistor Q1 is transmitted to output terminal 7 through the coupling capacitor C2.
On the contrary, when the collector of transistor Q2 produces HIGH during the negative-going half-cycle of the carrier wave as the result of the switch off of transistor Q2, the cathode of switching diode 3 and the anode of switching diode 4 are connected to power source line 8 through load resistors R7 and R5. When so connected, switching diode 3 is turned off because the cathode potential thereof is higher than the anode potential thereof and, at the same time, switching diode 4 is turned on because the anode potential thereof is higher than the cathode potential thereof.
When switching diodes 3 and 4 are, respectively, switched off and on during the negative-going half-cycle of the carrier wave, the phase-reversed signal Wc from the collector of transistor Q1 is transmitted to output terminal 7 through coupling capacitor C2.
Therefore, from output terminal 7, the phase-matched and phase-reversed signals We and Wc are alternately generated during each complete cycle of the carrier wave and, accordingly, a signal very similar to the amplitude modulated signal wherein the carrier wave is amplitude modulated by the modulating signal as shown in FIG. 2(d) can be obtained.
It has now become clear that, in the construction of the amplitude-modulated signal generator according to the present invention, the phase dividing circuit 2 can be constructed with the minimized number of component parts, such as transistor Q1, bias resistors R1 and R2 and load resistors R3 and R4. Furthermore, no need to use any transformer.
According to the embodiment described above in connection to FIG. 1, when transistor Q2 is switched on, resistors R4 and R7 are parallelly connected between the emitter of transistor Q1 and the ground and, therefore, the load resistance of transistor Q1 at the emitter thereof can be given by R4 //R7. When transistor Q2 is switched off, resistor R3 and series resistors R7 and R5 are parallelly connected between the collector of transistor Q1 and the voltage source +Vcc. Therefore, the load resistance of transistor Q1 at the collector thereof can be given by R3 //(R5 +R7). Accordingly, when the loads on the emitter and collector sides of transistor Q1 are desired to be counterbalanced, resistors R3, R4, R7 and R5 should be so selected as to meet the following requirement:
R.sub.3 =R.sub.4, R.sub.4 <R.sub.7 and R.sub.7 >>R.sub.5.
It is desired to further counterbalance between the loads connected to emitter and collector of transistor Q1, load adjusting resistor R8 having a resistance equal to that of the load resistor R5 may be connected between the cathode of the switching diode 3 and the anode of the switching diode 4 as shown by a dotted line in FIG. 1.
Moreover, in place of carrier wave amplifier 5, a carrier wave oscillator may be used for driving the switching diodes 3 and 4 alternately.
In addition, although the transistors Q1 and Q2 have been described and shown as an n-p-n type, they may be a p-n-p type or a field-effect transistor.
Although the present invention has been fully described with reference to a preferred embodiment, many modifications and variations thereof will now be apparent to those skilled in the art, and the scope of the present invention is therefore to be limited not by the details of the preferred embodiment described above, but only by the terms of appended claims.