JPS61279165A - Manufacture of capacitor for hybrid integrated circuit - Google Patents

Manufacture of capacitor for hybrid integrated circuit

Info

Publication number
JPS61279165A
JPS61279165A JP60121011A JP12101185A JPS61279165A JP S61279165 A JPS61279165 A JP S61279165A JP 60121011 A JP60121011 A JP 60121011A JP 12101185 A JP12101185 A JP 12101185A JP S61279165 A JPS61279165 A JP S61279165A
Authority
JP
Japan
Prior art keywords
capacitor
layer
integrated circuit
capacitance value
tantalum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60121011A
Other languages
Japanese (ja)
Inventor
Kenichi Ono
大野 兼一
Noboru Kikuchihara
菊地原 昇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60121011A priority Critical patent/JPS61279165A/en
Publication of JPS61279165A publication Critical patent/JPS61279165A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/13Energy storage using capacitors

Abstract

PURPOSE:To obtain a capacitor, in which only a capacitance value is increased, by forming the capacitor on an insulating supporting plate, on which a glass layer having irregularities is formed, thereby increasing the effective area of the capacitor larger than the apparent area. CONSTITUTION:On an insulating supporting plate 1, a glass layer 2, which has a smooth irregularities 7 at a specified interval, is formed. On the glass layer 2, a capacitor, which comprises a tantalum layer 3, a lower electrode 5, which is taken out of the tantalum layer 3, a dielectric layer 4, which is formed by the anodic formation of the tantalum layer 3, and an upper electrode 6, which is provided on the dielectric layer 4, is formed. Then, the capacitor for an integrated circuit, which has the larger capacitance value than the capacitance value determined by the apparent area, is readily formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、集積回路チップなどの能動素子が搭載される
絶縁性支持板上に、前記能動素子の付随回路素子として
のコンデンサを膜技術によシ形成する、混成集積回路用
コンデンサの製造方法に関する。
[Detailed Description of the Invention] [Industrial Field of Application] The present invention provides a film technology to provide a capacitor as an auxiliary circuit element for an active element such as an integrated circuit chip on an insulating support plate on which an active element such as an integrated circuit chip is mounted. The present invention relates to a method of manufacturing a capacitor for a hybrid integrated circuit.

〔従来の技術〕[Conventional technology]

従来より、上記のよりな混成集積回路用コンテナの製造
方法としては、アルミナセラミック等の絶縁性支持板上
に、平滑性を得る目的でガラス層を形成した後、スパッ
タリング等で成膜した金属、例えばタンタル等を陽極化
成した絶縁物を誘電体として利用する方法が実施されて
いた。
Conventionally, as a manufacturing method for the above-mentioned container for a hybrid integrated circuit, a glass layer is formed on an insulating support plate such as alumina ceramic for the purpose of obtaining smoothness, and then a metal film is formed by sputtering or the like. For example, a method has been implemented in which an anodized insulator such as tantalum is used as a dielectric material.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述したコンデンサの製造方法では、大きな容量値を得
ようとするならば、誘電体膜厚を薄くするか、或いはコ
ンデンサの占める面積を大きくする等の方法が必要であ
った。
In the capacitor manufacturing method described above, in order to obtain a large capacitance value, it is necessary to reduce the thickness of the dielectric film or increase the area occupied by the capacitor.

第2図(a)〜(d)は従来方法での製造方法を示す断
面図である。まず、第2図(a)のように、アルミナセ
ラミック等の絶縁性支持板1の上に、平滑性を得るため
にガラス層12を被着し、つぎに同図(b)のように、
陽極化底等の方法で誘電体とすることが可能な金属、例
えばタンタルをスパッタリング等の方法で前記ガラスR
12及び支持板lの上に成膜した後、所定の形状に化学
的エツチング等の方法でパターン化したタンタル層3を
得る。つぎに同図(C)のよりに、タンタル層3の一部
を陽極化成等の方法で誘電体4とした後、第2図(d)
のように、タンタル3の露光した未化底部分と誘電体層
4の上にそれぞれ下部引出し電極5と上部電極6を形成
し、コンデンサを完成する。
FIGS. 2(a) to 2(d) are cross-sectional views showing a conventional manufacturing method. First, as shown in FIG. 2(a), a glass layer 12 is deposited on an insulating support plate 1 made of alumina ceramic or the like in order to obtain smoothness, and then, as shown in FIG. 2(b),
The glass R is formed by sputtering a metal, such as tantalum, which can be made into a dielectric material by anodizing or the like.
After forming a film on the tantalum layer 12 and the support plate l, the tantalum layer 3 is patterned into a predetermined shape by a method such as chemical etching. Next, as shown in FIG. 2(C), a part of the tantalum layer 3 is made into a dielectric material 4 by a method such as anodization, and then as shown in FIG. 2(d).
As shown in the figure, a lower lead electrode 5 and an upper electrode 6 are formed on the exposed uncured bottom portion of the tantalum 3 and the dielectric layer 4, respectively, to complete the capacitor.

上述の製造方法に於いて、容量値を決定するのはコンデ
ンサの平面的な面積と誘電体4の厚さであシ、よシ大き
な容量値を得ようとする場合、平面的な面ffを大きく
する、誘電体4を薄くする等の方法があるが9面積を大
きくすると、絶縁性支持板に占めるコンデンサの面積が
太きくなシ、基板が大形となる。また、誘電体膜厚を薄
くすると、耐圧低下で不良発生の原因になシ易い等の欠
点を有する。
In the above manufacturing method, the capacitance value is determined by the planar area of the capacitor and the thickness of the dielectric 4. If you want to obtain a larger capacitance value, the planar surface ff is determined. There are methods such as increasing the size of the capacitor and making the dielectric 4 thinner, but if the area is increased, the area occupied by the capacitor on the insulating support plate will not be large and the substrate will be large. Further, if the dielectric film thickness is made thinner, there is a drawback that the withstand voltage decreases, which is likely to cause defects.

〔問題点を解決するための手段〕[Means for solving problems]

本発明方法では、凹凸を有するガラス層を形成した絶縁
性支持板上にコンデンサを作ることによ)、実効的なコ
ンデンサの面積ヲ、見かけ上の平面的な面積よりも大き
くすることが可能となシ、従来方法で作ったコンデンサ
に比べて、コンデンサの占有面積を増やさずに、容量値
のみを増大したコンデンサを製造できる。
In the method of the present invention, by fabricating a capacitor on an insulating support plate on which a glass layer with unevenness is formed, the effective area of the capacitor can be made larger than its apparent planar area. However, compared to capacitors made using conventional methods, it is possible to manufacture capacitors with increased capacitance without increasing the area occupied by the capacitor.

〔実施例〕〔Example〕

つぎに本発明を実施例によシ、説明する。第1図(a)
〜(d)は本発明の一実施例方法を説明するための断面
図面である。第1図(a)は、アルミナセラミック等に
よる絶縁性支持板、1の上に一定の間隔で滑らかな凹凸
7を有するガラス層2を形成した状態を示しである。以
下第1図CI))〜(d)は、第2図(b)〜(d)に
それぞれ対応した状態を示しておシ、第2図で説明した
と同様の工程を経て、第1図(d)のように、支持板1
の上の表面が凹凸面となっているガラス層2の上に、タ
ンタル層3およびそれから引出した下部電極5と、タン
タル3の陽極化成によ多形成された誘電体層4と、誘電
体層4の上に設けた上部電極6とから々るコンデンサが
形成される。
Next, the present invention will be explained using examples. Figure 1(a)
-(d) are cross-sectional views for explaining a method according to an embodiment of the present invention. FIG. 1(a) shows a state in which a glass layer 2 having smooth irregularities 7 at regular intervals is formed on an insulating support plate 1 made of alumina ceramic or the like. Hereinafter, Fig. 1 CI)) to (d) show states corresponding to Fig. 2 (b) to (d), respectively. As shown in (d), support plate 1
A tantalum layer 3, a lower electrode 5 drawn out from the tantalum layer 3, a dielectric layer 4 formed by anodizing the tantalum 3, and a dielectric layer are placed on the glass layer 2, which has an uneven upper surface. An empty capacitor is formed with the upper electrode 6 provided on top of the capacitor 4.

〔発明の効果〕〔Effect of the invention〕

以上述べた如く、本発明を実施することによシ、見かけ
の面積で決定される容量値よりも大き力容量値をもつ集
積回路用コンデンサを容易に作ることができる。
As described above, by implementing the present invention, it is possible to easily produce a capacitor for an integrated circuit having a larger capacitance value than the capacitance value determined by the apparent area.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(d)は本発明の一実施例あ製造工程順
の断面図、第2図(a)〜(d)は従来方法の製造工程
順の断面図である。 1・・・絶縁性支持板、2,12・・・ガラス層、3・
・・メンタル層、4・・・誘電体層、5・・・下部引出
し電極、6・・・上部電極、7・・・凹凸。 某 l  図
FIGS. 1(a) to 1(d) are cross-sectional views of one embodiment of the present invention in the order of manufacturing steps, and FIGS. 2(a) to (d) are cross-sectional views of the conventional method in the order of manufacturing steps. DESCRIPTION OF SYMBOLS 1... Insulating support plate, 2, 12... Glass layer, 3.
...Mental layer, 4...Dielectric layer, 5...Lower extraction electrode, 6...Upper electrode, 7...Irregularities. A certain figure

Claims (1)

【特許請求の範囲】[Claims]  絶縁性支持板上のガラス層の表面に滑らかな凹凸を作
り、その上に、前記凹凸面に沿った誘電体層をもつ混成
集積回路用コンデンサを作ることを特徴とする混成集積
回路用コンデンサの製造方法。
A capacitor for a hybrid integrated circuit, characterized in that a smooth unevenness is formed on the surface of a glass layer on an insulating support plate, and a dielectric layer is formed on the surface of the glass layer along the uneven surface. Production method.
JP60121011A 1985-06-04 1985-06-04 Manufacture of capacitor for hybrid integrated circuit Pending JPS61279165A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60121011A JPS61279165A (en) 1985-06-04 1985-06-04 Manufacture of capacitor for hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60121011A JPS61279165A (en) 1985-06-04 1985-06-04 Manufacture of capacitor for hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS61279165A true JPS61279165A (en) 1986-12-09

Family

ID=14800587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60121011A Pending JPS61279165A (en) 1985-06-04 1985-06-04 Manufacture of capacitor for hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS61279165A (en)

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