JPS61279156A - Multiple chip module - Google Patents

Abstract

PURPOSE:To reduce heat resistance, by forming recess parts in a substrate, arranging integrated circuit chips in the recess parts, filling a part between the outer surface of a heat transfer body, which is mounted on each chip, and the side surface of each recess part with a sealing material, and reducing the heat transfer body between the chips. CONSTITUTION:Many recess parts 100 having a ring shape are provided on the side of a ceramic substrate 1 having wiring pins 12, on which chips 2 are mounted. The chip 2 is mounted on the bottom of each recess part 100 through a solder pad 14. Engineering change pad 21 for inspection or logical change is provided on a surface 110 of the substrate 1. In sealing the chip, a heat transfer body 3 is inserted in each recess part 100, and a part between a side wall 102 of each recess part 100 and the transfer body is filled with a sealing material 23 such as solder. Thus, the distance between the chip 2 and the heat transfer body 3 becomes small, and the heat resistance is reduced.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention is directed to a multi-chip device that uses a wiring board on which a plurality of integrated circuit chips are mounted as a unit module, and includes - modules or a plurality of modules. The present invention relates to modules, and particularly to multi-chip modules suitable for use in electronic computers.

[Background of the invention]

A known example of a chip sealing method in a multi-chip module is as described in Japanese Utility Model Publication No. 57-44700, in which a chip is mounted on the bottom of a recess provided in a ceramic substrate, and a heat sink having a convex portion is pressed onto the chip. There is a method in which the entire ceramic substrate is covered with an integral cap and the periphery of the substrate is sealed, as described in Japanese Patent Publication No. 57-48860.

The recesses in the former are intended to hold thermally conductive grease and are not intended to seal the chip, and the seal is intended to seal the entire module, similar to the latter.

When sealing the entire module, there are the following problems.

First, substrates made of ceramic or the like are warped due to the thermal history given during sintering. Because of this substrate warping, the distance between the integrated circuit chip 8 and the inner wall surface of the cap becomes non-uniform from chip to chip. For this reason, when thermally coupling the chip and the inner wall surface of the cap using thermally conductive grease or the like, some chips require a thick layer of thermally conductive grease. When the thermal conductive grease layer is thickened, the thermal conductance between the chip and the cap becomes very small.

For example, commercially available thermal conductive grease (7 x 10-
When 'W/K[1lII+) is used with a thickness of 1+nn+, the thermal conductance is 7 x 1. O-'W/K
Very small, mm2. Therefore, the outer surface of the cap can be forcedly liquid cooled (thermal conductivity ~2×1O-2W/KI1w1
12), boiling cooling (~I X 10-”W/Kmn”
Even with high-performance cooling methods such as ), a sufficient cooling effect cannot be obtained.

There is also a method of thermally connecting the chip and the cap using a heat conductive member such as a piston, but the thermal conductance is 0.
, 5 W/Kmn", which is low compared to the thermal conductivity of the cap itself.

Furthermore, in the conventional device, technical pads used for purposes such as test pads and logic change pads are provided on the ceramic substrate, and circuit inspection and logic change cannot be performed without removing the seal.

The above-mentioned Japanese Patent Publication No. 57-48860 shows an example in which solder pads and technologically modified pads are provided on a ceramic substrate, but it is difficult for the solder pads to be immersed in the cooling liquid.
The connection between the pad and the integrated circuit chip may be corroded.

[Purpose of the invention]

The present invention reduces the distance between each chip of an integrated circuit chip and the heat conductor mounted on the chip to reduce thermal resistance and allows the use of technology-modified pads without removing the chip encapsulation. It is to make it.

[Summary of the invention]

The feature of the present invention is that four parts are formed on the substrate, an integrated circuit chip is placed in the parts, and the technology change (transferring the rad to the surface of the substrate) connects the outer periphery of the heat dissipation body mounted on the chip with the side surface of the four parts. The reason is that a sealing material is filled in between.

Unlike solder pads, technology change pads are used only during the early stages of module assembly, so there are no problems with corrosion.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings. First, in FIG. 1, a large number of integrated circuit chips 2 and a heat transfer body 3 attached to the back surface thereof are mounted on a ceramic substrate core. The substrate 1 is assembled into a sealed container 5 while being attached to a backboard 4. A substrate 1 attached to a backboard 4 is immersed in a non-conductive liquid 10.

The heat generated by the integrated circuit chip 2 causes the nonconductive liquid 10 to boil and foam (9). The vapor of boiling non-conductive liquid]0 is
Condensation and liquefaction (11
)L, return to the liquid part at the bottom of the container again.

Cooling water is fed into the condenser 6 by a cooling unit 8 and a circulation pump 7 to cool the steam in the container 5.

FIGS. 2 and 3 show details of the main parts of the present invention.

A large number of annular recesses are provided on the side where the chip 2 is mounted on the ceramic substrate 1 having the wiring pins 12, and the chip 2 is mounted on the bottom of the recess 100 via the solder pad 14, and the chip 2 is mounted on the surface 11.0 of the substrate. A technology change pad 21 for inspection or logic change is provided, and electrical connection with the chip is achieved through wiring 20 inside the board. To seal the chip, the heat transfer body 3 is inserted into the four parts 100, and the space between it and the side wall 102 of the recess is sealed with a sealing material 23 such as solder. The gap 24 between the tip of the heat transfer body 3 and the chip 2 is filled with solder or thermally conductive grease to reduce thermal resistance as much as possible. These materials may be attached to the surface of the chip in advance, or holes 25 may be provided in the heat transfer body 3 and fillers 26 may be sealed therein. For example, the heat transfer body 3 can also serve as a fin for boiling cooling, and the heat transfer body 3 can also serve as a fin for boiling cooling,
The chip is immersed in water to generate air bubbles 9 and efficiently remove heat generated from the chip.

Compared to the cooling method using forced convection of air, boiling cooling is 1
This results in a heat transfer coefficient that is more than 0 times higher.

In this embodiment, since the heat transfer body 3 also functions as an enlarged heat transfer surface, an even larger effective heat transfer coefficient can be obtained. When using such a high-performance cooling method, if there is a part exhibiting large thermal resistance between the chip and the coolant, the effect of the high-performance cooling method will be canceled out. In the structure, the surface of the chip and the surface of the heat transfer body 3 facing the chip can be brought as close as possible, so if a suitable filler such as solder is placed in the gap 24, the contact thermal resistance can be made extremely small. According to this structure, the stress applied to the sealing joint surface is much smaller than the stress applied to a conventional sealing joint surface of this type, and it can have high reliability against thermal history. In addition, in boiling cooling, if the refrigerant contacts the circuit surface of the chip, there is an increased risk of corroding the circuit elements or causing circuit malfunction.In this structure, if the recess where the chip is located is filled with inert gas 18, Since the chips do not come into direct contact with each other, the above risks are eliminated. In addition, in the structure in which the material 26 for gap fabric is injected, if the injected material is solder and solidifies after injection, the gas pressure in the four parts 100 can be made slightly higher than the external pressure, so even if the rack is minute, the rack will be sealed and the joint will be sealed. 23, the possibility of the refrigerant entering the recess 100 can be reduced.

On the other hand, according to the present invention, the technology change pad 21 is provided on the substrate surface 1.
10 and located outside the seal 23. Therefore, the function of the circuit can be tested in the normal operating state in which the cooling structure is operated without removing the seal.

This is because the theoretical operation delay time changes when the chip junction temperature changes, which may cause malfunction.
This is an important function for accurate functional testing of SI.

The same applies to logic changes.

FIG. 4 shows several chips 2 encapsulated as a group, with technology change pads 21 provided on the surface 110 of the substrate. The heat sink 3 also serves as a fin, and a flow of air or liquid 30 is passed through it to remove heat generated from the chip.

In the above embodiment, the substrate convex portion 1 on which the pad is provided
10 can be manufactured using the same method as conventionally used for manufacturing ceramic laminate substrates.

That is, as shown in FIG.
Ceramic sheets 32 having through-holes and metal patterns, which are to be used as through conductors or wiring for electrically connecting the pads and the substrate, are stacked and sintered.

Instead of the ceramic sheet, other organic thin films such as polyimide resin may be laminated and bonded.

In order to electrically connect the technology change pad on the surface of the substrate and the wiring within the substrate, a through conductor or a conductor wiring pattern is built into the laminated sheet 1.

As the heat dissipation body, a porous structure such as a sintered body or a stack of plates having a large number of fine grooves may be used.

〔Effect of the invention〕

The present invention seals the integrated circuit chips individually or in groups of a small number of chips, and seals the outer circumferential cooling fluid bubble to isolate the atmosphere, and provides a technology change pad on the outside of the seal, so that each chip Since the distance between the heat transfer bodies can be made extremely small, the effects of high-performance cooling methods such as boiling coolant cooling can be fully utilized.

Furthermore, because the technology change pad is exposed outside the enclosure, the functionality of the integrated circuit can be tested and the logic changed while the enclosure structure remains in place. Unlike solder pads, this technology-changed Parade is used only in the early stages, so there is no problem even if it comes into contact with cooling fluid.

[Brief explanation of drawings]

FIG. 1 is a partial cross-sectional perspective view of an embodiment of the present invention, FIG. 2 is an enlarged plan view of the main part of the present invention, and FIG. 3 is a longitudinal cross-sectional view of the main part showing the sealing part of the present invention. FIG. 4 is a perspective view of another embodiment of the present invention, and FIG. 5 is a diagram showing an example of the manufacturing method of the present invention. ■...Ceramic substrate, 2...Integrated circuit chip,
Y1 Figure 3 Figure G γ 4 Figure Z 5 Figure

Claims (1)

[Claims] 1. An insulating substrate, a plurality of integrated circuit chips mounted on the substrate, and a solder pad and technology provided near each integrated circuit chip on the substrate and connected to each chip. In a multi-chip module comprising a change pad, a heat dissipation body provided for each of one to a plurality of integrated circuit chips, and a chamber provided around the heat dissipation body and containing a cooling fluid, each of the substrates has one to a plurality of integrated circuit chips. A plurality of annular recesses are provided for accommodating a plurality of integrated circuit chips, and the solder pads are provided at the bottoms of the recesses, and a sealing material is filled in the gap between the side surfaces of the recesses and the outer periphery of the heat sink. A multi-chip module characterized in that the technology change pad is provided on an outer substrate surface. 2. In the multi-chip module according to claim 1, the substrate is made of a ceramic sheet or an organic thin film made of polyimide resin, which is hollowed out in the portion corresponding to the chip, and is exposed except for the through-hole portion. The substrate is formed by laminating and bonding ceramic sheets or organic thin films such as polyimide resin, and in order to electrically connect the technology change pad and the wiring within the substrate,
A multi-chip module characterized in that the laminated sheet is a substrate having a built-in conductor wiring pattern. 3. The multi-chip module according to claim 1, wherein the chip-sealing structural material is provided with a porous structure for promoting boiling heat transfer.