JPS6126750B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a matrix display device, and more particularly to a matrix display device for displaying images using a period NH that is an even multiple of one horizontal scanning period H of an original television video signal as one horizontal display period. Encoded signals for one horizontal scanning period obtained by sampling the corresponding original image every N/MH (where M is a positive integer less than N) are simultaneously applied to each light emitting element forming each picture element of one horizontal line. The main purpose of this device is to improve the resolution in a matrix display device configured to display images by applying a voltage.

When displaying video signals using a matrix panel consisting of unit light-emitting pixels formed by LEDs, liquid crystals, discharge cells, or a combination of discharge cells and phosphors, the brightness of each pixel is displayed. A method is used in which a pulse width modulation (hereinafter referred to as PWM) signal whose pulse width is proportional to the gradation of the picture element is applied to the light emitting element. In order to ensure sufficient brightness, the matrix panel scanning method simultaneously applies PWM signals to each light emitting element that forms one line (one horizontal scanning line), one line at a time. A method of sequentially scanning in the vertical direction is adopted. Let me explain this point a little bit.
For example, in a TV video signal, the number of gradations from the black level to the highest brightness (white level) is set to 16, the video signal is AD converted in units of 4 bits, and the digital output (4 bits) is used as the modulation input. In addition to the PWM circuit, a configuration for obtaining a PWM signal having a pulse width approximately proportional to the gradation of the original signal is provided as one unit, and the number corresponding to the number of light emitting elements in one line is provided to form the line information. Corresponds to the gradation of the picture element corresponding to each light emitting element of the original signal
A PWM signal is simultaneously applied to the corresponding light emitting elements of one line to cause them to sequentially emit light in the vertical direction.

Next, an example of the PWM modulation circuit used in the device of the present invention will be explained with reference to the circuit diagram of FIG.
This circuit is roughly divided into down counter DC and RS
The PWM output from the flip-flop F is set by setting the flip-flop F with a preset pulse P at the leading edge of the vertical scanning pulse and resetting it with the BORROW output of the down counter Dc. It is configured to be taken out. said down counter
Dc has a configuration in which the 4-bit AD conversion output of the video signal to be displayed on the matrix panel is used as a preset input, the preset pulse P is used as a reset or start signal, and the clock pulse CP is counted down.

By the way, as mentioned above, the light emitting elements corresponding to each picture element constituting the matrix panel have linear input-to-light output characteristics, and therefore, like TV video signals, the light emitting elements are corrected in advance on the image transmission side. The signal that is
If the PWM signal is converted into a PWM signal and applied to each light emitting element as described above to perform matrix display, the linearity of the reproduced (displayed) image will be extremely poor.

In view of this, the present invention does not make the periods of the clock pulses input to the PWM modulation circuit as described above equal intervals, but approximates a curve that corrects the nonlinearity as described above according to the gradation of the original signal. change according to the slope of each straight line forming the broken line, and as a result,
It is designed to reproduce images with good linearity by approximating the electrical input versus optical output characteristics of a matrix panel composed of LEDs and the like to that of a CRT (cathode ray tube).

The details of the present invention will be explained below with further reference to FIGS. 2 to 5.

The clock pulse CP that is now input to the PWM circuit
Assume that the relationship between optical input and optical output when displaying a TV video signal in a matrix is normalized as shown in Figure 2, with the signal voltage to be corrected (the original value to be displayed by each light emitting element) relative value of the signal)
The relative value curve of PWM pulse width (luminance) is the third
Assume that it is as shown by the dashed line in the figure.

For convenience of the following explanation, it is assumed that the correction curve L is approximated by a broken line formed by two straight lines L ₁ and L ₂ . Considering that the photoelectric characteristics of light emitting elements such as LEDs constituting the matrix panel are approximately linear, in Fig. 3, at signal level 7,
In order to make the PWM pulse width equivalent to 3, first divide the pulse width 3 (relative value) into 7 equal parts. Next, for the eight sections from signal level (relative value) 7 to 15, the corresponding pulse width (15-3)=12 is divided into eight equal parts. Therefore, as a substitute for the clock pulse CP, CP', after inputting the preset pulse P,
For the section determined by the ratio of 3/15, it is sufficient to use a variable period clock pulse in which seven short-cycle pulses continue, and then for the 12/15 section, eight long-cycle pulses continue.

For example, one line section (period) is H=63.5μ
sec, the first 7 equally divided pulse train of the above clock pulse is 3/15 x 1/7 x H = 1.81
The period of μsec, that is, ₁ = 551KHz pulse, and the subsequent pulse train divided into 8 equal parts is 12/15×1/8×
It may be formed such that H = 6.35 μsec, that is, ₂ = 157 KHz.

Next, FIG. 4, which shows an example of an implementation circuit for generating such a clock pulse train, and FIG. 5, which shows operating waveforms of the main parts, will be described.

In the implementation circuit of FIG. 4, the figure number is triggered by the inverted output of the preset pulse _P1 ,
₁ indicates a first gated oscillation circuit that oscillates at 551 KHz, which is triggered by the output of a NAND circuit N ₁ to be described later, ₂ indicates a gated oscillation circuit that oscillates at 157 KHz, and CT ₂ indicates the output of the first gated oscillation circuit. A binary counter that counts , N ₁ is a NAND whose input is the count 3 output
The circuit _F2 is a flip-flop circuit constituted by a pair of NAND circuits _N2 and _N3 so as to be set by the preset pulse ₁ and reset by the output of the NAND circuit _N1 , and the circuit _A2 is Output ₂ of the second gated oscillator circuit and the second gated oscillator circuit
A second AND circuit, _A1 , which receives the output of the 2NAND circuit _N2 as its input, has output ₁ of the first gated oscillation circuit and the other output of the flip-flop circuit _F2 , that is, the output of the third NAND circuit _N3 , as its two inputs. The first AND circuit O represents the OR circuit that outputs the first and second AND circuits A ₁ and A ₂ , respectively.

In such a configuration, preset pulse ₁ at the leading edge of the vertical scanning pulse in the video signal to be displayed now
When the first gated oscillation circuit is turned on, the binary counter _CT2 starts counting its oscillation output, and when the number of ₁ pulses reaches 7, it outputs "1" to each of the corresponding outputs. arise. At the same time, the 3-input first NAND circuit _N1 output ₂ is generated and resets the flip-flop circuit _F2 , which has already been set by the preset pulse ₁ . The output ₂ of the first NAND circuit _N1 simultaneously turns on the second gated oscillation circuit.
Up to the first seven pulses, the first AND circuit _A1 is
In the following eight pulse train sections, the second AND circuit _A2 produces outputs, and _{the 1st} and _2nd outputs are respectively added to the OR circuit, and together, the above-mentioned correction curve of the broken line as shown in Fig. 5 CP' should be realized. , (see Figure 3) produces a clock pulse. Therefore, if such a clock pulse is used as a clock pulse for a PWM modulation circuit as shown in FIG. 1, and a matrix light emitting element is driven by the P'WM output, its optical input versus output characteristic can be made approximately linear. It can be corrected.

In the above example, the correction curve is divided into two straight lines L ₁ and
Although the approximation was made using L ₂ , it is also possible to approximate with a broken line formed by three or more straight lines, and it is clear that by forming a larger number of straight lines, the broken line can be approximated by a correction curve. Will. Incidentally, to explain the case where three straight lines are used, if the normalized correction curve shown according to FIG. 2 is shown as L ₂ in FIG. 6, then the signal voltage (relative value) sections T ₁ , T ₂ The pulse width (brightness, relative value) of the _PWM signal corresponding to
58~16/58 and 16/58~1, the corresponding frequencies of the clock pulse are T ₁ = 228KHz and T ₂ = 1/3, respectively.
T ₁ , T ₃ = 1/6T ₂ . Next, a method for improving the apparent resolution will be explained. Matrix panels of this type often do not have enough picture elements due to technical or cost reasons, and therefore the resolution may be insufficient depending on the information content.
This point will be explained with reference to the operational waveform diagram in FIG. This figure shows the time chart of the PWM circuit shown in Fig. 1 when one line is equivalent to 4H of video signal, and the scanning pulse Sc ₁ corresponding to 4H is
At the leading edge of , the previous 1H original video signal is sampled using the sampling pulse SP, and then AD converted and input to the AD signal input (preset input) terminal of the PWM circuit as shown in Figure 1 above. The clock pulse CP for PWM modulation is selected so that there are pulses for the number of gradations necessary for AD conversion (e.g. 4 bits, 15 gradations, 5 bits 31 gradations), and the preset pulse (load pulse ) By introducing P ₁
I am getting PWM output. As is obvious from the same time chart, in such a method, the video (analog) signal
It is sampled only once every 4H, so the resolution (in the vertical direction) is reduced to 1/4.

In order to improve this drawback, even if the display, that is, the light emitting element arrangement is 4H, sampling of the video signal is performed every 2H. That is, as is clear from the time chart of FIG. 8, which is shown in contrast to FIG. 7, the sampling pulse SP is generated every 2H, and the period of the (load pulse) preset pulse _P1 is set to 2H. At the same time, the period of the clock pulse is selected so that there are pulses for the number of gradations necessary for AD in a 2H scanning period, and as a result, the light emitting elements corresponding to each picture element constituting one line of the matrix panel are Configure it to drive twice with the corresponding PWM output. Such a configuration improves the apparent resolution, particularly of information containing diagonal lines.

In the above explanation, when one horizontal display period is 4H, a sampling pulse is generated every 2H, the original video signal is sampled every 2H, and the PWM
An example of encoding and driving one horizontal line of a matrix panel to emit light has been described, but in general, when driving a matrix panel whose one horizontal display period is NH, a sampling pulse is generated every N/MH, The original video signal is sampled every N/MH, and the signal corresponding to each picture element to be displayed is individually
PWM code is applied to each corresponding light emitting element that constitutes one horizontal line of the matrix panel,
Needless to say, it is possible to drive M times during a period to display light emission. According to the present invention, when displaying an original television video signal on a matrix panel, one horizontal line of light emitting elements is encoded by sampling the original video signal at a rate of 1H for each display section. It is not an output, but a PWM output of each corresponding pixel information signal encoded during each horizontal scanning period sampled M times in one display section.
Since it is configured to be driven M times in a display section, display can be performed without loss of resolution. Furthermore,
By changing the clock pulse of the PWM modulator as appropriate,
The drive (signal) voltage vs. brightness (PWM pulse width) characteristics of a matrix panel composed of light-emitting elements such as LEDs can be approximated by a polygonal line to the photoelectric characteristics of a CRT, improving the linearity of images displayed on the matrix panel. , it is possible to obtain playback video with close to natural brightness level. Further, in the configuration of the present invention, only one series of clock pulse generation circuits with different time ratios is required, and furthermore, since the second gated oscillation circuit constituting this clock pulse generation circuit is configured to operate only at a predetermined luminance signal level or higher, Particularly when planning for ultra-miniaturization, it is possible to save parts and power consumption.

[Brief explanation of the drawing]

Fig. 1 shows an example of a PWM modulation circuit, Fig. 2 shows an optical input vs. optical output characteristic diagram when a normal matrix panel is driven by a PWM signal to display a video signal (information), and Fig. 3 shows an optical input versus optical output characteristic diagram. 4 is an embodiment of the clock pulse generation circuit, FIG. 5 is an operating waveform diagram of the clock pulse generation circuit, and FIG. 6 is a correction curve diagram in another embodiment. FIG. 7 and FIG. 8 each represent an operation waveform diagram of the PWM circuit. ...first gated oscillation circuit, ...second gated oscillation circuit, CT ₂ ...binary counter, F ₂ ...flip-flop circuit, A ₁ ...second
1AND circuit, A ₂ ...2nd AND circuit.

Claims (1)

[Claims] 1 A counter configured to preset the count value with the A-D conversion output of the luminance signal to be displayed on the display, and a preset counter that is set with the signal P instructing the start of display of each line and counts the clock pulse CP. A flip-flop circuit F that is set by either the DC output signal or the signal instructing the display start of each line and reset by the other signal creates a PWM signal corresponding to the brightness level of each pixel. In a matrix display device of a type in which the PWM signal is applied to the corresponding pixel display means, first and second gated oscillation circuits having at least different oscillation frequencies are used as means for generating the clock pulse CP; A circuit that triggers the first oscillation circuit having a high oscillation frequency with the instruction signal, and a binary counter that counts the output of the first oscillation circuit up to a predetermined value.
CT ₂ and a circuit that triggers the second oscillation circuit by the output of this counter, and the output of the first oscillation circuit until the counter CT ₂ counts up to the predetermined value, and the counter CT ₂ counts up to the predetermined value. After that, the device is equipped with means for extracting the output of the second oscillation circuit and generating the clock pulse CP', and converts the gamma-corrected luminance input signal into a PWM signal suitable for a matrix display having a linear signal input to light output characteristic. A matrix display device configured to convert into signals.