JPS54137232A - Matrix display unit - Google Patents

Matrix display unit

Info

Publication number
JPS54137232A
JPS54137232A JP7356878A JP7356878A JPS54137232A JP S54137232 A JPS54137232 A JP S54137232A JP 7356878 A JP7356878 A JP 7356878A JP 7356878 A JP7356878 A JP 7356878A JP S54137232 A JPS54137232 A JP S54137232A
Authority
JP
Japan
Prior art keywords
circuit
period
frequency
output
horizontal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7356878A
Other languages
Japanese (ja)
Other versions
JPS6126750B2 (en
Inventor
Hiroshi Yonei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP7356878A priority Critical patent/JPS54137232A/en
Publication of JPS54137232A publication Critical patent/JPS54137232A/en
Publication of JPS6126750B2 publication Critical patent/JPS6126750B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Transforming Electric Information Into Light Information (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

PURPOSE: To increase the resolution of the TV video signals by defining the NH of even-number times as much as the H period of the original TV video signal as one horizontal display period and then applying the coding signals of one horizontal period obtained through sampling every NH/M to each picture element.
CONSTITUTION: Gated oscillator circuit f1 is triggered by the inverse output of preset pulse P1 to have oscillation with frequency f1. While gated oscillator circuit f2 is triggered by the output of NAND circuit N1 to have oscillation with frequency f2. And binary counter CT2 delivers the output to circuit N1 after counting the pulse of frequency f1 by the fixed times. Thus, the output corresponding to frequency f1 and f2 applied to AND circuit A1 and A2 via FF2 is obtained through the OR circuit. Here, the NH of even-number times as much as the H period of the original TV video signal is defined a one horizontal display period, and the coding signals of one horizontal period obtained through sampling every HN/M are applied to each picture element signl for display. Thus, the resolution of the TV video signals can be increased.
COPYRIGHT: (C)1979,JPO&Japio
JP7356878A 1978-06-14 1978-06-14 Matrix display unit Granted JPS54137232A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7356878A JPS54137232A (en) 1978-06-14 1978-06-14 Matrix display unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7356878A JPS54137232A (en) 1978-06-14 1978-06-14 Matrix display unit

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP4551878A Division JPS54136226A (en) 1978-04-14 1978-04-14 Matrix display unit

Publications (2)

Publication Number Publication Date
JPS54137232A true JPS54137232A (en) 1979-10-24
JPS6126750B2 JPS6126750B2 (en) 1986-06-21

Family

ID=13521996

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7356878A Granted JPS54137232A (en) 1978-06-14 1978-06-14 Matrix display unit

Country Status (1)

Country Link
JP (1) JPS54137232A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6947060B2 (en) 1998-02-16 2005-09-20 Canon Kabushiki Kaisha Image forming apparatus, electron beam apparatus, modulation circuit, and image-forming apparatus driving method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6947060B2 (en) 1998-02-16 2005-09-20 Canon Kabushiki Kaisha Image forming apparatus, electron beam apparatus, modulation circuit, and image-forming apparatus driving method

Also Published As

Publication number Publication date
JPS6126750B2 (en) 1986-06-21

Similar Documents

Publication Publication Date Title
JPS53144621A (en) Video signal processing system
JPS5773578A (en) Television receiver
JPS54137232A (en) Matrix display unit
JPS5419325A (en) Vertical synchronous unit
JPS5382218A (en) Television signal coding unit
JPS558161A (en) Clock generation circuit
JPS53136423A (en) Network point processing system for picture signal
JPS54124633A (en) Display circuit of television receiver
JPS5238816A (en) Time axis variation compensating system
JPS53142120A (en) Special effect signal generator
JPS52149426A (en) Picture enlargement unit
JPS5398719A (en) Letter and picture communication unit
JPS51123185A (en) Parent-child clock
JPS54108524A (en) Color synchronizer of beam index type picture receiver
JPS54122033A (en) Television screen display unit
JPS53126822A (en) Liquid crystal matrix display unit
JPS55620A (en) Sweep gate circuit
JPS5337334A (en) Display unit
JPS5423427A (en) Beam index television picture receiver
JPS551703A (en) Programmable pulse generator
JPS533116A (en) Formation circuit of oblique line pattern signal
JPS5437527A (en) Receiver for still picture
JPS52141128A (en) Wide display unit
JPS53128210A (en) Display unit for receiving frequency
JPS57162520A (en) A/d converting system