JPS6126732B2 - - Google Patents

Info

Publication number
JPS6126732B2
JPS6126732B2 JP7387378A JP7387378A JPS6126732B2 JP S6126732 B2 JPS6126732 B2 JP S6126732B2 JP 7387378 A JP7387378 A JP 7387378A JP 7387378 A JP7387378 A JP 7387378A JP S6126732 B2 JPS6126732 B2 JP S6126732B2
Authority
JP
Japan
Prior art keywords
output
frequency
variable frequency
frequency divider
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7387378A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55662A (en
Inventor
Kenichi Torii
Takeshi Shima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP7387378A priority Critical patent/JPS55662A/ja
Publication of JPS55662A publication Critical patent/JPS55662A/ja
Publication of JPS6126732B2 publication Critical patent/JPS6126732B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/193Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Superheterodyne Receivers (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
JP7387378A 1978-06-19 1978-06-19 Channel selection device Granted JPS55662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7387378A JPS55662A (en) 1978-06-19 1978-06-19 Channel selection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7387378A JPS55662A (en) 1978-06-19 1978-06-19 Channel selection device

Publications (2)

Publication Number Publication Date
JPS55662A JPS55662A (en) 1980-01-07
JPS6126732B2 true JPS6126732B2 (enrdf_load_stackoverflow) 1986-06-21

Family

ID=13530740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7387378A Granted JPS55662A (en) 1978-06-19 1978-06-19 Channel selection device

Country Status (1)

Country Link
JP (1) JPS55662A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0197790A (ja) * 1987-10-08 1989-04-17 Takawaki Kiso Koji:Kk 堀孔機における排土飛散防止装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0197790A (ja) * 1987-10-08 1989-04-17 Takawaki Kiso Koji:Kk 堀孔機における排土飛散防止装置

Also Published As

Publication number Publication date
JPS55662A (en) 1980-01-07

Similar Documents

Publication Publication Date Title
US4271531A (en) Frequency synthesizer
US5008629A (en) Frequency synthesizer
JP2901120B2 (ja) 半整数による分割器およびアナログ利得補償を使用した低雑音周波数シンセサイザ
JPS60134633A (ja) 複変換同調器用制御装置
RU2668737C1 (ru) Делитель частоты, схема автоматической фазовой подстройки частоты, приёмопередатчик, радиостанция и способ частотного разделения
US4061980A (en) Radio receiver with plural converters and frequency control
JPH0251288B2 (enrdf_load_stackoverflow)
US7298790B2 (en) Low frequency self-calibration of a PLL with multiphase clocks
US6035182A (en) Single counter dual modulus frequency division apparatus
KR960036338A (ko) 가변 분주비를 설정하는 장치 및 방법과 이를 활용한 장치
EP0766404A2 (en) Clock generator utilizing phase locked loop circuit
KR0149126B1 (ko) 혼합형 주파수 합성기
JPS6126732B2 (enrdf_load_stackoverflow)
JPH11150421A (ja) 周波数シンセサイザ
US4095190A (en) Tuning system
EP1689083B1 (en) Am/fm radio receiver and local oscillator circuit used therein
US6002926A (en) Double superheterodyne type receiving circuit
US6628153B2 (en) PLL circuit and frequency division method reducing spurious noise
JP2816038B2 (ja) Pll周波数シンセサイザ回路
JPH09186587A (ja) Pll回路
JP3102149B2 (ja) クロック同期装置
JPH10327067A (ja) 分周器
US4943981A (en) Dividing mechanisms for frequency synthesizers
JPH05227052A (ja) シンセサイザ受信機
JPH0541664A (ja) 周波数シンセサイザ