JPS61265996A - Video tape recorder - Google Patents

Abstract

PURPOSE:To attain the correction of a skew and discontinuous sequence by providing a PAL system VTR with one synchronous signal extracting means and one PLL loop means. CONSTITUTION:A horizontal synchronous signal included in a reproduced luminance signal is outputted from a generating circuit 11, and inputted to a phase comparator 12. When the skew is detected, a switch 40 is switched to a contact (c), and the phase comparator 12 phase-compares the horizontal synchronous signal of the generating circuit 11 and the output signal of an FF 36. Then an FF 39 compares the phase of the output signal of an FF 38 with that of an error signal outputted from an amplifier 31, that is, the phase of the burst of a reproduced chrominance signal. Since the output signal of the FF 39 comes to H only when the discontinuity of the burst sequence is detected, the burst sequence can be corrected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a PAL video cheap reader in which skew and burst sequence discontinuity occur during special playback.

[Conventional technology]

Traditionally, helical scan type video tape recorders are
If synchronous alignment (H alignment) is not performed during recording, skew will occur during special playback such as still playback.
When recording in the so-called standard mode, it is set to perform H arrangement.

However, when recording in a mode different from the standard mode, that is, when recording in a long-time mode that records twice as long as the standard mode, for example,
138] As described in Japanese Patent No. 80, H alignment is no longer performed, and skew occurs during special playback.

Note that even when H alignment is not performed as described above, in order to simplify the configuration of the skew correction circuit, the skew is set to 0.5H during playback, as described in Japanese Patent Publication No. 58-16390, for example. is set to be.

In addition, in PAL video tape recorders, it is necessary to arrange colors in addition to H arrangement, and if color arrangement is not performed, a burst sequence will be generated during special playback, as described in Japanese Patent Publication No. 57-50117. It becomes discontinuous.

When the burst sequence becomes discontinuous, the color display on the playback screen of a television receiver or the like that displays the playback signal from the video tape recorder becomes unstable.

Therefore, PAL video tape recorders are set to perform H sorting and color sorting during standard mode recording.

However, when a VT (S PAL) video tape recorder records in long-time recording mode, it becomes impossible to perform H sorting and color sorting during special playback9, and in this case, 0.5H
skew and discontinuity of the burst sequence occur.

On the other hand, a skew correction circuit that corrects a skew of 0.5H and a burst sequence correction circuit that corrects discontinuity in a burst sequence are, for example, model number BA7022 of the VTR IC series manufactured by ROHM Co., Ltd.

It is formed using a BA7082L integrated circuit.

Therefore, it is possible to provide the above-mentioned VH8P'AL system video tape recorder with a skew and burst sequence correction circuit using the above-mentioned BA7022 and BA7032L integrated circuits to correct the 0.5H skew and burst sequence discontinuity. In this case, the skew and burst sequence correction circuit is configured as shown in FIG.

To explain the skew correction shown in FIG. 3, the tape playback signal is sent to the color signal processing circuit (2) via the input terminal [1],
The signal is input to a luminance signal processing circuit (3), a reproduced color signal is output from the processing circuit (2), and a reproduced luminance signal is output from the processing circuit (3).

Furthermore, the reproduced luminance signal of the processing circuit (3) is input to the sync separation circuit (4) and the mixing circuit (5),
) extracts the vertical and horizontal synchronization signals from the reproduced luminance signal.

The mixing circuit (5) mixes the output signal of the burst sequence corrector (to be described later) formed by an integrated circuit with model number BA70:112L, that is, the corrected reproduced color signal and the reproduced luminance signal of the processing circuit (5). A mixed signal of the corrected reproduced color signal and reproduced luminance signal is output from the mixing circuit (5) to the AM modulation circuit (7) of the skew correction section (6) formed by an integrated circuit with model number BA7022. .

Further, an oscillation signal for modulation from an oscillator (8) is also input to the modulation circuit (7). Note that the frequency of the oscillation signal is set to approximately three times that of the color subcarrier.

The output signal of the mixing circuit (5) is modulated by the modulation circuit (7), and the output signal of the modulation circuit (7).

That is, the modulation signal is connected to the 0.5H delay line (9) and the switch α.
It is output to the contact (α) of O.

Further, the modulated signal delayed by 0.5 H by the delay line (9) is output to the contact (5) of the switch αQ.

On the other hand, the vertical and horizontal synchronizing signals of the separation circuit (4) are input to the horizontal synchronization signal generation circuit αυ, and only the horizontal synchronization signal of the separation circuit (4) is output from the generation circuit αυ.

The horizontal synchronizing signal of the generating circuit αυ is input to the phase comparator @ and the clock terminal (ck) on the D-type flip-flop side.

Furthermore, after the output signal of the phase comparator (2) is integrated by the loop filter α→, it is input to the voltage controlled oscillator (to) with an oscillation frequency twice the frequency fh of the horizontal synchronizing signal, and the oscillator (to) output signal, feedback signal is 1/2
It is output to the two-phase comparator 4 of the frequency divider Q.

That is, the loop filter α of the phase comparator σ.

A PLL loop circuit with a frequency of 2fh is formed by the oscillator α, and the PLL loop controls the phase of the output signal of the oscillator α to the phase of the reproduced horizontal synchronization signal, and at this time, the frequency of the output signal of the oscillator αQ is 2fh, so even if a skew of 0.5 H occurs, the oscillator α
The phase of the Q output signal is not shifted.

And the frequency divider (lLQ divides the output signal of the seagull into 1/2 to the oscillator.
The frequency is divided and a signal of frequency fh, that is, a PLL-controlled frequency-divided signal of frequency fh is output to the data terminal (d) of the flip-flop α1.

Therefore, as shown in FIG. 4(a), if the horizontal synchronization signal in the reproduced luminance signal deviates by 0.5H midway, the output signal of the generating circuit Uυ is synchronized with the horizontal synchronization signal in the reproduced luminance signal, and However, the horizontal synchronizing signal output from the frequency divider uQ does not deviate due to PLL control, as shown in FIG.

And the flip-flop date is the clock terminal (ck) K
At the timing of the input horizontal synchronizing signal of the generation circuit αυ, the divided signal of the data terminal (d) shown in FIG. 4(C) is taken in, and the level of the output terminal 0) is held at the inverted level of the taken signal. .

Therefore, when there is no shift in the horizontal synchronization signal in the reproduced luminance signal, the signals are input to the clock terminal (ck) and the data terminal (d) at the same timing, so the output terminal (q
) is held at a low level (hereinafter referred to as "L") as shown in FIG. ck) and the data terminal (d), the level of the output terminal (1) is kept at a high level (hereinafter referred to as 1H") as shown in (d) of the same figure. be done.

Then, the switch αO is switched by the output signal of the output terminal ω of the flip-flop α4, and when the output signal of the output terminal ω is 'L'', it is switched to the contact (α), and the output terminal ω
When the output signal of is ``H'', the contact is switched to φ).

Therefore, 0.5H is added to the horizontal synchronization signal in the reproduced luminance signal.
When no skew occurs, the modulation signal of the AM demodulation circuit α example and the modulation circuit (7), that is, the modulation signal having the horizontal synchronization signal in the reproduced luminance signal is output from the switch aO.

On the other hand, when a 0.5H skew occurs in the horizontal synchronization signal in the reproduced luminance signal, the modulation signal, that is, the horizontal synchronization signal in the reproduced luminance signal, is sent from the switch α0 to the demodulation circuit αη via the delay line (9). A modulated signal having a horizontal synchronization signal delayed by 0.5H is output, and at this time, the 0.5H skew is corrected by the 0.5H delay.

The demodulation circuit αη demodulates the input signal and sends the demodulated signal, that is, the skew and burst sequence corrected reproduction, to the contact (a) of the switch (1) via a low-pass filter (to) and Q buffer circuits. Output a signal.

Note that due to the skew correction of 0.5H mentioned above, the contact point (a
) The horizontal synchronizing signal included in the reproduced signal is corrected for a deviation of 0.5 H as shown in FIG. 4(e).

Next, to explain the burst sequence correction, the reproduction signal output from the buffer circuit 09, that is, the skew-corrected reproduction signal, is input to the synchronization separation circuit of the burst sequence correction unit ■υ formed by an integrated circuit with model number BA70B2L. The phase comparator @
Then, the skew-corrected horizontal synchronizing signal, that is, the horizontal synchronizing signal shown in FIG. 4 (8) is output.

And the output signal of the phase comparator @ is loop filtered (c)
After being integrated by , it is input to a voltage controlled oscillator (to) of frequency fh, and the output signal of the oscillator is output to a 172 frequency divider (e) and a phase comparator @.

Therefore, phase comparator @, filter (to) 1 oscillator -
A PLL loop circuit with frequency fh is formed, and a PLL-controlled output signal with frequency fh is output from the oscillator (to) to the frequency divider (e), and the exclusive OR is output from the frequency divider (e). P to one input terminal of gate @, (c)
A frequency-divided signal of frequency fh/2 for burst sequence detection reference, which is controlled by LL, is output.

On the other hand, the processing circuit 42) outputs the reproduced color signal to the 1H delay line and the contact point (α1) of the switch member, and also controls the automatic reproduction phase that changes from positive to negative based on the phase of the burst included in the reproduced color signal. The error signal for the amplifier (31)
Output to. In addition, the output signal of the delay line
) is output to contact φ).

The amplifier (31) amplifies the error signal and converts it into a comparator.

(33), and at this time, the comparator compares the reference level and the error signal, extracts only the positive component of the error signal, and
'' is output to the other input terminal of the gate (5), comparator G3) compares the reference level and the error signal, extracts only the negative component of the error signal, and outputs the negative detection pulse Y'. is outputted to the other input terminal of the gate (c).In the figure, Ra and Rb indicate resistances for setting the reference level.

In addition, the output signals of gate @ and Kan are connected to flip-flops (
The output signal from the output terminal (q) of the flip-flop diagram causes the switch (1) to close the contact point (α).
Can be switched to 1 or sub.

By the way, when there is no discontinuity in the burst sequence, the positive and negative changes in the error signal match the level changes in the frequency division signal of the frequency divider circuit (1), and at this time the output signal of the gate is always low. The output signal of the gate (c) becomes 'H' when the error signal is negative.

Therefore, when there is no discontinuity in the burst sequence, the flip-flop (34) is held reset, and the output signal at the output terminal (q) of the flip-flop diagram becomes "L".
is held at the contact point (α), and the reproduced color signal outputted from the processing circuit (2) is outputted to the mixing circuit (5) via the switch (2).

Next, when the burst sequence becomes discontinuous, the positive and negative changes in the error signal do not match the level changes in the divided signal of the frequency dividing circuit (4), and at this time, the switch (1)
is switched to contact -, and the reproduced color signal delayed by lH is input to the mixing circuit (5), thereby correcting the burst sequence.

By the way, there are the following four combinations of skew and burst sequence discontinuity.

In other words, there are four cases: skew and burst sequence discontinuity occur in the middle, skew only in the middle, skew only in the beginning, and skew and burst sequence discontinuity in the beginning. It will be a case.

If skew or discontinuity of the burst sequence occurs midway through, the burst sequence will change as shown in Figure 5 (
As shown in a), there is a discontinuity in the middle.

In addition, unmarked 1H in the figure indicates when the error signal is positive,
]H, 0,5H of the water mark indicates when the error signal is negative,
It is discontinuous at part e.

Therefore, the error signal changes as shown in FIG. 5(b), and at this time, the frequency division signal of the frequency dividing circuit (1) changes as shown in FIG. When p changes to positive, flip-flop (34) is set and switch (1) changes to contact -, and switch (1)
The reproduced color signal delayed by 1H is output to the mixing circuit (5), thereby correcting the burst sequence of the reproduced color signal input to the mixing circuit (5).
i'l: As shown in the same figure (d), the input reproduced color signal is discontinuous only at 0 and 5H due to skew, and due to the correction by the skew correction section (6), the contact (a) of the switch ■ has a skew. and a corrected playback signal of the burst sequence is output.

Next, if only skew occurs from the middle, the burst sequence becomes as shown in Fig. 6(a), and in this case, the divided signal of the error signal 7 frequency divider circuit (1), the frequency divided signal of the mixing circuit (5) The reproduced color signal inputted to the is shown in FIG. 2(b).

(C) and (d), in this case, switch (1) is held at contact (4), and due to skew correction, contact (a) of switch (1) is changed as in the case of Fig. 5. A playback signal with skew and burst sequence corrected is output.

Furthermore, if only skew occurs at the beginning, the burst sequence becomes υ as shown in FIG.
The reproduced color signal input to 5) is shown in the same figure (b), CC"
).

As shown in (d), in this case also the switch (7)
is held at the contact (α), and a reproduced signal whose skew and burst sequence have been corrected is outputted to the contact (a) of the switch (1) by skew correction.

In addition, if skew and discontinuity of the burst sequence occur at the beginning, the burst sequence will change as shown in Figure 8 (a).
), and in this case, the error signal 9 frequency divider circuit (
The frequency-divided signal of 1) and the reproduced color signal input to the mixing circuit (5) become as shown in (b), (C), and (d) of the same figure, and the burst sequence becomes discontinuous at part e'. Therefore, the flip-flop example is set and the switch (1
) is switched to contact <13'>, the burst sequence is corrected, and a reproduced signal with corrected skew and burst sequence is output to contact (a) of the switch handle.

Therefore, by applying the skew and burst sequence correction circuit shown in Figure 3 to a VH8PAL video tape recorder, the skew and burst sequence discontinuity can be corrected at the output terminal (to) connected to the switch (a). A reproduction signal can be obtained, and good reproduction can be performed even during special reproduction of long-time mode recording.

Note that switch (1) in Figure 3 is switched to contact (b) during playback where skew and burst sequence discontinuity do not occur, such as during playback of standard mode recording, and at this time the mixing circuit (5) is switched to contact (b). The reproduced signal is output to the output terminal (3 terminals) via the switch (1).

[Problem that the invention seeks to solve]

By the way, in the case of Figure 3, there are two synchronous separation circuits (4)
, @ are required, as well as a phase comparator (2), a PLL loop means of a filter α and a nine oscillator (to), a phase comparator (c), and a filter (
(c) PLL loop means with one oscillator (c) is required, and there are problems in that the configuration is complicated and analog processing is increased, resulting in an increase in size.

[Failure to solve the problem]

The present invention provides a PAL video tape recorder in which 0.5H skew and burst sequence discontinuity occur during special playback, including a synchronization signal extracting means for extracting a horizontal synchronization signal of a playback signal, and a synchronization signal extraction means for extracting a horizontal synchronization signal of a playback signal; PLL loop means for outputting a PLL-controlled signal at a frequency approximately twice that of the horizontal synchronizing signal from the input voltage controlled oscillator; first frequency dividing means for dividing the output signal of the oscillator by 172; skew detection means for detecting the 0.5EI skew based on a phase shift between the horizontal synchronization signal and the output signal of the first frequency division means; and a skew detection means for dividing the output signal of the first frequency division means by 172. a burst sequence detection means for detecting discontinuity in the burst sequence due to a difference between the burst phase of the reproduced signal and the phase of the output signal of the second frequency divider; a delay circuit for burst sequence correction that delays the reproduced color signal by 1H; the reproduced color signal inputted by the output signal of the burst sequence detection means and the output signal of the delay circuit for burst sequence correction are connected to each other by 1H; burst sequence correction means for selectively outputting; mixing means for mixing the output signal of the correction means with the reproduced luminance signal included in the reproduction signal;
．． Skew correction means having a delay circuit for skew correction that delays by 5H, and selectively outputs the output signal of the mixing means and the output signal of the delay circuit for skew correction based on the output signal of the skew detection means. A video tape recorder characterized by comprising:

[Effect]

Therefore, by providing one synchronization signal extraction means and one PLL loop means, skew and discontinuity of burst sequences can be corrected, and the structure is simplified and miniaturized.

〔Example〕

Next, the present invention will be explained in detail with reference to FIGS. 1 and 2 showing one embodiment thereof.

In FIG. 1, the same symbols as in FIG. 3 indicate the same things, and the difference is that the frequency divider αQ and flip-flop α1 in FIG. 3 are replaced by a T-type flip-flop forming the first frequency dividing means. On the other hand, a D-type flip-flop with reset η forming the skew detection means is provided, and the synchronous separation circuit (A) 9 phase comparator @, filter (
c) 9 oscillator (c) In place of the 9 frequency divider (1), a T-type flip-flop (38) forming a second frequency dividing means is provided at υ, and in place of the flip-flop 134) in FIG. 9
An E, -8 type flip-flop (39) with a reset function is provided to form a burst sequence detection means, and a switch 0) is provided to output a signal to the phase comparator (6).

The trigger terminal (mo) of the flip-flop (Fuchi) is connected to the oscillator αG, and one output terminal (q) is connected to the contact (C) of the switch and the flip-flop (3'
rI.

(3) are connected to the data terminal (d) and trigger terminal (1), respectively, and the other output terminal (2) is connected to the contact (d) of the switch arm.

In addition, the output terminal (q) of the flip-flop (g) is connected to one input terminal of the gate (-), and the reset terminal (r) of the flip-flop (071, kg) is connected to the input terminal (40) of the reproduction mode signal. It is connected to the.

Furthermore, the flip-flop Q7) has one output terminal (
The output signal of the terminal q) switches the switch 00, and the output signal of the other output terminal G) switches the switch 00.

Note that the playback mode signal of the input terminal (41) is ゞゞL''υ only during special playback, flip-flop η, (
39) Cancel the reset.

In addition, a synchronization signal extraction means is formed by the synchronization separation circuit (412 generation circuit αυ), a PLL loop means is formed by the phase comparator α function and the filter α9 oscillator (1υ), and a PLL loop means is formed by the mixing circuit (5). A mixing means is formed.

Further, the delay line and the switch (1) form a strong burst sequence correction means, and the modulation circuit (7)
The oscillator (8), the delay line (9), the switch αO2 demodulation circuit αη, and the filter (G) form the skew correction means, and the delay line (9) and fi form the skew correction means.
A delay circuit for burst sequence correction is formed respectively.

The generating circuit αυ outputs the horizontal synchronizing signal included in the reproduced luminance signal as shown in FIG. 2 (1k), and the output signal is input to the phase comparator (2).

By the way, only when a skew occurs during special reproduction, the output signal at the output terminal (2) of the flip-flop (2) becomes ``L'', and the switch is switched to the contact point (d).

Therefore, when no skew occurs during special playback, the output signal of the output terminal σ) of the flip-flop country is input to the phase comparator -, and the horizontal synchronization signal of the generation circuit αD and the output signal of the flip-flop country (σ) are inputted to the phase comparator 36) output terminal (1
) is compared in phase with the output signal of

Then, the output signal of the phase comparator (6) is inputted to the oscillator αQ via the filter α→, and from the oscillator αG, the signal is output from the oscillator αG as shown in FIG.
As shown in b), a signal approximately twice the frequency fh of the horizontal synchronizing signal is output.

Furthermore, the output signal of the oscillator αG is frequency-divided by 172 of the flip-flop (column f), and from the output terminal (q) of the flip-flop (g), the third
Instead of the output signals of the frequency divider H and oscillator (c) shown in the figure, a signal having a frequency fh of υ is output.

Then, the output signal of the output terminal (q) of the flip-flop (36) is input to the flip-flop (37), and only when skew occurs, the output signal of the flip-flop (triple Q output terminal ((1) becomes H'' Therefore, skew correction is performed in the same manner as in the case of FIG.

Note that when a skew is detected, the switch will close its contact point (C
), and as a result, the output signal of the output terminal 0) of the flip-flop (G) is input to the phase comparator (6), and the output signal of the output terminal 0) of the flip-flop (G) is input to the phase comparator (6). The phase is compared with the output signal of the output terminal ■ of the flip-flop □□□, and the output terminal ((
The phase of the IJ output signal is maintained at the phase shown in FIG. 8(C).

In addition, the output signal of the output terminal (q) of the flip-flop (g) is divided by 172 by the flip-flop (c),
From the flip-flop gift, as shown in Figure 2 (d),
Alternative frequency fh of the output signal of the frequency divider (1) in Fig. 3
/2 signal is output.

and the phase of the output signal of the flip-flop.

The phase of the error signal output from the amplifier 011, that is, the phase of the burst of the reproduced color signal, is compared by the flip-flop (39), and only when a discontinuity in the burst sequence is detected, the output signal of the flip-flop (39) is Since this becomes ゝゝ■'', the burst sequence is corrected in the same manner as in the case of FIG.

Note that during normal playback where skew and burst sequence discontinuity do not occur, the flip-flop is 3η.

(39) is held reset, and switches α0 and 00 are contacts (α).

(α).

Therefore, in the case of FIG. 1, one synchronization signal extraction means and one PLL loop means are provided to correct skew and burst sequence discontinuity during special playback, simplify the configuration, and provide synchronization separation. The number of analog circuits such as circuits is reduced compared to FIG. 3, making it possible to miniaturize and form integrated circuits.

The above embodiment is applied to a VH8PAL video tape recorder, especially when skew and burst sequence discontinuity occur.

That is, although the case where special playback is performed on a tape recorded in a long-time mode has been described, it is also possible to apply the present invention to a SECAM type video tape recorder, etc., in which skew and burst sequence discontinuity occur during special playback.

〔Effect of the invention〕

As described above, the video tape recorder of the present invention includes one synchronizing signal detection means and one PLL loop means, and uses the output signal of the voltage controlled oscillator αυ of the PLL loop means to detect skew and burst. It is possible to correct discontinuities in sequences, simplify the configuration, reduce the size, and simultaneously correct skew and discontinuities in burst sequences.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the video tape recorder of the present invention, FIGS. 2(a) to 2(d) are timing charts for explaining the operation of FIG. 1, and FIG. 3 is a diagram of a conventional video tape recorder. The block diagram, FIGS. 4(a) to (e) are timing charts for explaining the operation of skew correction in FIG. 3, FIGS. 5(a) to (d), FIGS. 6(a) to (d),
FIGS. 7(a) to (d) and FIGS. 8(a) to (d) are timing charts for explaining burst sequence correction, respectively. (2)...Color signal processing circuit, (3)...Luminance signal processing circuit, (4)...Sync separation circuit, (5)...Mixing circuit, α sword...Horizontal synchronization signal generation Circuit, (9)...
0.5H delay line, C1O, (7)...switch, ■
...Phase comparator, αυ...Loop filter, αυ...
・Voltage controlled oscillator, Kan...1H slow line, (36),
(3″I1. (381° @ off...Flip-flop.

Claims (1)

[Claims] (1) In a PAL video tape recorder in which 0.5H skew and burst sequence discontinuity occur during special playback, a synchronization signal extraction means for extracting a horizontal synchronization signal of a playback signal, and the horizontal synchronization signal is input, PLL loop means for outputting a PLL-controlled signal at a frequency approximately twice that of the horizontal synchronizing signal from a voltage controlled oscillator; first frequency dividing means for dividing the output signal of the oscillator by 1/2; skew detection means for detecting the 0.5H skew based on a phase shift between the synchronization signal and the output signal of the first frequency division means; and a skew detection means for dividing the output signal of the first frequency division means by 1/2. a burst sequence detection means for detecting discontinuity in the burst sequence due to a difference between the burst phase of the reproduced signal and the phase of the output signal of the second frequency divider; a delay circuit for burst sequence correction that delays the reproduced color signal by 1H; the reproduced color signal inputted by the output signal of the burst sequence detection means and the output signal of the delay circuit for burst sequence correction are connected to each other by 1H; burst sequence correction means for alternatively outputting; mixing means for mixing the output signal of the correction means with the reproduced luminance signal included in the reproduction signal; and a skew for delaying the output signal of the mixing means by 0.5H. skew correction means having a correction delay circuit and selectively outputting the output signal of the mixing means and the output signal of the skew correction delay circuit based on the output signal of the skew detection means; A PAL video tape recorder characterized by: