JPS61264913A - Analog switch circuit for single power supply - Google Patents
Analog switch circuit for single power supplyInfo
- Publication number
- JPS61264913A JPS61264913A JP10763485A JP10763485A JPS61264913A JP S61264913 A JPS61264913 A JP S61264913A JP 10763485 A JP10763485 A JP 10763485A JP 10763485 A JP10763485 A JP 10763485A JP S61264913 A JPS61264913 A JP S61264913A
- Authority
- JP
- Japan
- Prior art keywords
- output
- resistor
- circuit
- differential amplifier
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
Landscapes
- Electronic Switches (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
ディジタル信号により、連続したバイポーラ信号をスイ
ッチングする単一電源用アナログスイッチ回路において
、出力がオフの時、其の出力がバイポーラ信号の振幅の
中心値にクランプされる必要がある場合、差動アンプと
、該差動アンプの駆動電流をディジタル信号で制御する
差動対とを組合わせ、該差動アンプの出力がオフとなっ
た時該差動アンプの負荷抵抗に流れる電流を出力がオン
の時の1/2になるように構成することで、IC化が容
易で且つ出力端子数が少なくてすむようにしたものであ
る。[Detailed Description of the Invention] [Summary] In a single power supply analog switch circuit that switches continuous bipolar signals using a digital signal, when the output is off, the output is clamped to the center value of the amplitude of the bipolar signal. If the output of the differential amplifier is turned off, the load of the differential amplifier is By configuring the current flowing through the resistor to be half of that when the output is on, it is easy to integrate it into an IC and the number of output terminals can be reduced.
本発明は、有線通信方式の中継器の監視制御信号を分割
する場合の如く、次段が差動アンプで構成され、出力が
オフの時、出力がオフの時のバイポーラ信号の振幅の中
心値でないと、出力が一方に偏り歪が増加するような差
動アンプ回路に接続される場合の、ディジタル信号によ
り、連続したバイポーラ信号をスイッチングする単一電
源用アナログスイッチ回路の改良に関する。In the present invention, as in the case of dividing the supervisory control signal of a repeater in a wired communication system, the next stage is composed of a differential amplifier, and when the output is off, the center value of the amplitude of the bipolar signal when the output is off is This invention relates to an improvement in a single power supply analog switch circuit for switching continuous bipolar signals using digital signals when the output is connected to a differential amplifier circuit whose output would otherwise be biased to one side and increase distortion.
上記の如く、次段が差動アンプ回路の如き場合に使用す
る単一電源用アナログスイソチ回路は、IC化が容易で
且つ出力端子数が少なく、同−ICチップ内で各々の回
路を直結出来ることが望ましい。As mentioned above, the single power supply analog switch circuit used when the next stage is a differential amplifier circuit is easy to integrate into an IC, has a small number of output terminals, and allows each circuit to be directly connected within the same IC chip. It is desirable to be able to do so.
第3図は従来例の単一電源用アナログスイッチ回路の回
路図、第4図は第3図の場合の各部の波形のタイムチャ
ートで(A)〜(D)は第3図のa −d点に対応して
いる。Figure 3 is a circuit diagram of a conventional single power supply analog switch circuit, Figure 4 is a time chart of waveforms at various parts in the case of Figure 3, and (A) to (D) are a-d in Figure 3. corresponds to the point.
図中1は定電流源、Tri〜Tr4はトランジスタ、R
1−R7は抵抗でR1とR2の値は等しく又R3とR4
の値は等しい、C1はコンデンサ、■は電源電圧、Vr
efl、Vref2は参照電圧を示す。In the figure, 1 is a constant current source, Tri to Tr4 are transistors, R
1-R7 is a resistor, and the values of R1 and R2 are equal, and R3 and R4
The values of are equal, C1 is the capacitor, ■ is the power supply voltage, Vr
efl and Vref2 indicate reference voltages.
動作を説明すると、第4図(A)に示す連続したバイポ
ーラ信号は、トランジスタTrl、’l’r2と抵抗R
1〜R4からなる差動アンプに入力する。To explain the operation, the continuous bipolar signal shown in FIG.
1 to R4.
一方第4図(B)に示すディジタル信号はトランジスタ
Tr 3.Tr 4と抵抗R7よりなる差動対に入力す
る。On the other hand, the digital signal shown in FIG. 4(B) is transmitted through the transistor Tr3. It is input to a differential pair consisting of Tr 4 and resistor R7.
ディジタル信号がHレベルの時はトランジスタTr3は
オンとなり、前記差動アンプに実線矢印で示した電流■
が流れ、バイポーラ入力信号に対応した第4図(C)に
示す振幅I°・R2の交流信号がC点で得られる。(1
’ は抵抗R2に流れる電流)
ディジタル信号がLレベルの時は、トランジスタTr3
がオフとなり、第4図(C)のイに示す如く、C点の電
位はアース電位となり出力はアース電位にクランプされ
る。When the digital signal is at H level, the transistor Tr3 is turned on, and the current flows through the differential amplifier as indicated by the solid arrow.
flows, and an AC signal of amplitude I°·R2 shown in FIG. 4(C) corresponding to the bipolar input signal is obtained at point C. (1
' is the current flowing through the resistor R2) When the digital signal is at L level, the transistor Tr3
is turned off, and as shown in FIG. 4(C), the potential at point C becomes the ground potential, and the output is clamped to the ground potential.
従って、バイポーラ信号の出力がオフの時の電圧Vof
fは大容量のコンデンサCIにて直流成分をカントし、
抵抗R5,R6の値を下式の如く選択することにより得
られる。Therefore, the voltage Vof when the bipolar signal output is off
f cants the DC component with a large capacity capacitor CI,
This can be obtained by selecting the values of the resistors R5 and R6 as shown in the following formula.
V o f f = V−R5/(R5+R6)このよ
うにしであるので、出力d点の波形は第4図(D)に示
す如く、出力がオフの時、その出力は、バイポーラ信号
信号の振幅の中心値となるようにクランプされる。V o f f = V - R5 / (R5 + R6) Therefore, the waveform at the output point d is as shown in Figure 4 (D). When the output is off, the output has the amplitude of the bipolar signal. is clamped to the center value.
しかしながら、回路をIC化する場合、この大容量のコ
ンデンサC1はIC化が困難で、ICの外部に設けるこ
とになる為、大形になる問題点と、このコンデンサの為
に端子が2個必要になり、同−ICチップ内の次段の回
路と直結出来なくなる問題点がある。However, when converting the circuit into an IC, it is difficult to convert this large capacity capacitor C1 into an IC, and since it has to be installed outside the IC, there are problems with the large size and the need for two terminals for this capacitor. Therefore, there is a problem that it becomes impossible to connect directly to the next stage circuit within the same IC chip.
上記問題点は、バイポーラ信号が人力する差動アンプと
、該バイポーラ信号をオンオフする為に、該差動アンプ
の駆動電流をディジタル信号で制御する差動対とを組合
わせ、該差動アンプの出力がオフとなった時該差動アン
プの負荷抵抗に流れる電流を出力がオンの時の1/2に
なるように構成した本発明の単一電源用アナログスイッ
チ回路により解決される。The above problem is solved by combining a differential amplifier that manually handles bipolar signals with a differential pair that controls the drive current of the differential amplifier with a digital signal to turn on and off the bipolar signal. This problem is solved by the single power supply analog switch circuit of the present invention, which is configured so that when the output is off, the current flowing through the load resistor of the differential amplifier is 1/2 that when the output is on.
本発明によれば、バイポーラ信号が入力する差動アンプ
と、該差動アンプの駆動電流をディジタル信号で制御す
る差動対とを組合わせ、差動アンプの出力がオフとなっ
た時該差動アンプの負荷抵抗に流れる電流を、出力がオ
ンの時の1/2になるように構成して、出力がオフの時
バイポーラ信号の振幅の中心値にクランプするようにし
ているので、コンデンサを必要とせず、小形になり、又
IC化する場合出力端子が不要となり、同−rcチフプ
内の次段の回路に直結出来るようになる。According to the present invention, a differential amplifier to which a bipolar signal is input and a differential pair that controls the drive current of the differential amplifier by a digital signal are combined, and the difference is calculated when the output of the differential amplifier is turned off. The current flowing through the load resistance of the dynamic amplifier is configured so that it is half of that when the output is on, and the current flowing through the load resistance of the dynamic amplifier is clamped to the center value of the bipolar signal amplitude when the output is off. It is not necessary, the size is small, and if it is integrated into an IC, an output terminal is not necessary, and it can be directly connected to the next stage circuit in the same RC chip.
第1図は本発明の実施例の単一電源用アナログスイッチ
回路の回路図、第2図は第1図の場合の各部の波形のタ
イムチャートで(A)〜(C)は第1図のa ”−c点
に対応している。FIG. 1 is a circuit diagram of a single power supply analog switch circuit according to an embodiment of the present invention, and FIG. 2 is a time chart of waveforms at various parts in the case of FIG. It corresponds to point a''-c.
図中2は定電流源、Tr5.Tr6はトランジスタ、R
8は抵抗を示し、尚全図を通じ同一符号は同一機能のも
のを示す。2 in the figure is a constant current source, Tr5. Tr6 is a transistor, R
Reference numeral 8 indicates a resistor, and the same reference numerals indicate the same functions throughout the drawings.
第1図で第3図の場合と異なる点は、差動対の一方のト
ランジスタを第1図に示す如く2個並列(Tr5.Tr
6)にし、一方のトランジスタTr5のコレクタ側を、
抵抗R2とトランジスタTr2のコレクタとの接続点に
接続し、この点を出力とし、抵抗R8の値を、トランジ
スタTr3がオフの時、トランジスタTr5.Tr6に
同じ値の電流が流れるように抵抗R1の値と等しくした
点である。The difference between FIG. 1 and FIG. 3 is that one transistor of the differential pair is connected to two parallel transistors (Tr5.
6), and the collector side of one transistor Tr5 is
It is connected to the connection point between the resistor R2 and the collector of the transistor Tr2, this point is used as an output, and the value of the resistor R8 is changed to the value of the transistor Tr5 when the transistor Tr3 is off. This point is made equal to the value of the resistor R1 so that the same value of current flows through the Tr6.
このようにすれば、差動アンプのトランジスタTriに
入力する第2図(A)に示す連続したバイポーラ信号を
、差動対のトランジスタTr3に入力する第2図(B)
に示すディジタル信号でオンオフする場合、ディジタル
信号がLレベルとなり、トランジスタTr3がオフとな
ると、抵抗R2に流れる電流I/2は、トランジスタT
r3がオンの時に抵抗R2に流れる電流I′の1/2と
なり、出力電圧は、第2図(C)に示す如く、バイポー
ラ信号の振幅の中心値にクランプされる。In this way, the continuous bipolar signal shown in FIG. 2(A) inputted to the transistor Tri of the differential amplifier is inputted to the transistor Tr3 of the differential pair as shown in FIG. 2(B).
When turning on and off with the digital signal shown in , when the digital signal becomes L level and transistor Tr3 turns off, current I/2 flowing through resistor R2 is
When r3 is on, the current I' flowing through resistor R2 becomes 1/2, and the output voltage is clamped to the center value of the amplitude of the bipolar signal, as shown in FIG. 2(C).
従って、コンデンサは必要がなく、IC化が容易で、且
つ出力端子が不要となり、IC化する場合間−rcチッ
プ内の次段の回路に直結出来るようになる。Therefore, there is no need for a capacitor, it is easy to integrate into an IC, and there is no need for an output terminal, and when integrated into an IC, it can be directly connected to the next stage circuit in the rc chip.
以上詳細に説明せる如く本発明によれば、次段が差動ア
ンプ回路の如き場合に使用する単一電源用アナログスイ
ッチ回路を構成する場合、コンデンサは必要がなく、I
C化が容易で、且つ出力端子が不要となり、同−ICチ
ップ内の次段の回路に直結出来る効果がある。As explained in detail above, according to the present invention, when configuring a single power supply analog switch circuit used when the next stage is a differential amplifier circuit, a capacitor is not necessary, and an I
This has the advantage of being easy to convert into a C, eliminating the need for an output terminal, and allowing direct connection to the next stage circuit within the same IC chip.
第1図は本発明の実施例の単一電源用アナログスイッチ
回路の回路図、
第2図は第1図の場合の各部の波形のタイムチャート、
第3図は従来例の単一電源用アナログスイッチ回路の回
路図、
第4図は第3図の場合の各部の波形のタイムチャートで
ある。
図において、
1.2は定電流源、
Tri〜Tr6はトランジスタ、
R1−R8は抵抗、
CIはコンデンサ、
■は電源電圧、
Vrefl、Vref2は参照電圧を示す。
$1gFig. 1 is a circuit diagram of a single power supply analog switch circuit according to an embodiment of the present invention, Fig. 2 is a time chart of waveforms of various parts in the case of Fig. 1, and Fig. 3 is a conventional example of a single power supply analog switch circuit. A circuit diagram of the switch circuit. FIG. 4 is a time chart of waveforms of various parts in the case of FIG. 3. In the figure, 1.2 is a constant current source, Tri to Tr6 are transistors, R1 to R8 are resistors, CI is a capacitor, (2) is a power supply voltage, and Vrefl and Vref2 are reference voltages. $1g
Claims (1)
動対とを組合わせ、 該差動アンプの出力がオフとなった時該差動アンプの負
荷抵抗に流れる電流を出力がオンの時の1/2になるよ
うに構成したことを特徴とする単一電源用アナログスイ
ッチ回路。[Claims] The differential amplifier comprises a differential amplifier into which a bipolar signal is input, and a differential pair that controls the drive current of the differential amplifier with a digital signal in order to turn on and off the bipolar signal. 1. An analog switch circuit for a single power supply, characterized in that when the output of the differential amplifier is turned off, the current flowing through the load resistor of the differential amplifier is 1/2 that when the output is on.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10763485A JPS61264913A (en) | 1985-05-20 | 1985-05-20 | Analog switch circuit for single power supply |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10763485A JPS61264913A (en) | 1985-05-20 | 1985-05-20 | Analog switch circuit for single power supply |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61264913A true JPS61264913A (en) | 1986-11-22 |
JPH0453325B2 JPH0453325B2 (en) | 1992-08-26 |
Family
ID=14464161
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10763485A Granted JPS61264913A (en) | 1985-05-20 | 1985-05-20 | Analog switch circuit for single power supply |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61264913A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4940466A (en) * | 1972-08-21 | 1974-04-16 | ||
JPS503756A (en) * | 1973-04-13 | 1975-01-16 |
-
1985
- 1985-05-20 JP JP10763485A patent/JPS61264913A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4940466A (en) * | 1972-08-21 | 1974-04-16 | ||
JPS503756A (en) * | 1973-04-13 | 1975-01-16 |
Also Published As
Publication number | Publication date |
---|---|
JPH0453325B2 (en) | 1992-08-26 |
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