JPS61264385A - Display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a display device for displaying figures and characters on a CRT screen.

[Conventional technology]

FIG. 3 is a functional block diagram showing a conventional display device.
In the figure, l is a central processing unit (hereinafter referred to as CPU), 2
is a memory that stores program contents (hereinafter referred to as ROM).
3 is a work memory required to execute the program (hereinafter referred to as ``key''), 4 is a memory for storing image data to be displayed (hereinafter referred to as ``interval''), 5 is a scroll display. 6 is an addition device (hereinafter referred to as ADD) that adds an offset address to the display address in case of a display, and 6 is a CRT controller (hereinafter referred to as
100 is an address bus, and 200 is a data bus.

FIG. 4 shows an example of the configuration of the above ADD 5, where lO is a selector,
11 is an adder, 101 is a display address generated by the CRTC 6, 202 is a scroll instruction signal, 203 is an offset address for scrolling on the data bus, 204
is the refresh address of Seki 4.

Next, the operation will be explained. First, transfer the image data to the CRT
If you want to display it fixedly on the top, write the image data to FyM4 with CPU 1, and write the image data to CRTC6 with ADD 5.
An offset address 203 is added to the display address 101 that has been generated. At this time, since the scroll instruction signal 202 in FIG. 101
is output as it is as the FyM4 refresh address 204 and displayed on the CRT.On the other hand, when scrolling the display, since the scroll instruction signal 202 in FIG. 4 is turned on, -(!L'ri/10i1: The scroll offset address 203 on the data path 200 is selected and output.Therefore, the adder 11 selects the scroll offset address 203 on the data path 200 and outputs it.
1 and the scroll offset address 203 are added, and the result is output as the FyM4 refresh address 204 and displayed on the CRT.

The display method in this case will be explained using Figure 5.〇Chapter 5
The figure shows the memory contents of FMVI4. Here FMM4
All contents shall be displayed on the CRT.

Initially, the CPU 1 writes data into the FMM 4 from the first line to the nth line. During this time, the offset address 203 is 0. Therefore, the image data of the FMM4 is displayed on the CRT in order from the first line to the nth line.

When writing data next time, erase the previous data and write it to the first line. And at this time offset address 20
3 to 1". Then, the second to nth lines, and the first line to the last line are displayed on the CRT.Similarly, the second line, third line, etc., are displayed on the CRT. Every time the previous data is erased and written to the (m-1)th line, the offset address 203 is set to 2,
3. ..., (m-1), the C rainbow has the 3rd row to the nth row, then the 1st row, the 2nd row, then the 4th row to the nth row, then the 1st and 2nd rows. eye.

3rd line, then m-th to n-th lines, 1st line = (m-i)
The display formula will match the row and will be scrolled.

[Problem that the invention seeks to solve]

Conventional display devices are configured as described above, so when scrolling the display, the entire screen is scrolled.If you want to divide the screen to display multiple screens at the same time and scroll only a part of them, you have to , there is a problem in that complex software processing such as rewriting the entire AND contents of that part is required.

This invention was made to solve the above-mentioned problems, and provides a display device that can scroll and display only an arbitrary screen when the screen is divided and multiple screens are displayed at the same time. The purpose is to

[Means for solving problems]

In the display device according to the present invention, the address decoder of the addition device that adds the display address and the offset address determines the quadrant of the screen to be displayed based on the display address, and the output signal of the address decoder and the scroll display This circuit performs an AND operation with the signal instructing the power quadrant, and the output of this operation and the scroll instruction signal are ANDed by another M circuit. The configuration is such that the offset address is added to the address.

[For production]

The address decoder in the present invention determines the quadrant of the screen that is currently being displayed, sets the output corresponding to this quadrant as ``1'', and performs a logical product of this and a signal indicating the quadrant to be displayed by scrolling. Only when this scroll display address is issued, the output of the 0 circuit is “
1'', and only when the scroll instruction signal is output, the offset address is added to the above display address, this is output as the image memory refresh address, and the image in the specified quadrant is displayed. It acts like scrolling.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows an example of the configuration of ADD 5 in a display device, and here a case will be described in which four screens are displayed simultaneously. 1st
In the figure, 10 is a selector similar to the above, 11 is an adder, 12 is an address decoder, and 13.14 is N0.
101 is a display address generated by the CRTC 6, 201 is a signal specifying the quadrant to be scrolled, 202 is a scroll instruction signal, 203 is an offset address for scrolling on the data node, 204 is FMM
This is the refresh address of 4.

Next, we will explain the operation.If you want to display a fixed value of 0, please use CP.
Write the image data to F]VM4 using u1 and write it to CR
ADD 5 to display address 101 generated by TC6
The offset address 203 is added. At this time, the first
Since the scroll instruction signal 202 in the figure is OFF, the selectors 10 all select the ``0'' input side and output. Therefore, the adder 11 outputs the display address 101 outputted from the CRTC 6 as it is as the refresh address 204 of the function 4, and displays it on the CRT.

Next, when scrolling is to be displayed, the display address 101 output from the CRTC 6 is input to the address decoder 12, the quadrant of the screen to be displayed is determined, and the output corresponding to that quadrant is set to '1'. By taking the R between this output and the signal 201 instructing the quadrant to be scrolled, the output of the 1 static circuit 13 is set to 1 only when the display address 101 for scrolling is output.
” stands. At this time, the scroll instruction signal 20
2 is ON, selector lO only when display address 202 for scrolling display is output.
Select the scroll offset 203 side, and add the display address 101 and scroll offset 20 in the adder 11.
3 and refresh address 204 of FMM4.
Output as . On the other hand, when a display address without scroll display is output, the display address is output as is as the refresh address 204 of the FIVM 4. The display method in this case will be explained using FIG. 2. FIG. 2 shows the contents of FMM4. Since this is a case of 4-screen display, the contents of FyM4 are divided into 4 parts, each with 1st and 4th screen display. 2nd゜3rd. Let us consider a case where the first quadrant, called the fourth quadrant and shaded with diagonal lines, is specified for scroll display. first C
Pu 1 writes data from the first row to the ninth row of the first quadrant. During this time, the offset address 203 is 0. Therefore, the lines are displayed in order from the first line to the nth line on the CRT. Next, when writing data, the data in the 01st row of the first quadrant is erased and written as 0, and at this time, the offset address 203 is set to 1.

Then, the first quadrant is displayed on the CRT from the second line to the pth line, and the first line is displayed as the last line. At this time, the second. Third
．． The fourth quadrant is displayed in order from the 1st line to the nth line. Similarly, at the (m-1)th time, the previous data is erased and written to the (m-1) line of the first quadrant. offset address 2
When 03 is (m-1), the first quadrant is sequentially displayed on the CRT from the m-th line to the p-th line, the first line, . . . (m-1) line. In other words, the second, third... In the fourth quadrant, the first to nth lines are displayed in order, and only the first quadrant is scrolled.

Although the above embodiment shows the case where the screen is displayed on four screens, it may be displayed on n screens (n=2 t3 m...) at the same time.0 [Effects of the Invention] As described above, according to the present invention, scrolling By adding a function to the offset adding device to determine whether the screen that is currently being displayed is a screen that should be scrolled, it is possible to scroll only part of the screen without putting a burden on the software. There are effects that can be displayed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an addition device in the display device of the present invention, FIG. 2 is an explanatory diagram showing the contents of the image data memory, FIG. 3 is a functional block diagram of a conventional display device, and FIG. Similarly, FIG. 5 is a block diagram of the adding device and an explanatory diagram showing the contents of the image data memory. 1 is the central processing unit, 4 is the memo IJ, 5111 is the addition device,
6 is a CRT controller, 12 is an address decoder, 1
3.14 is core 0 circuit 0. In the figure, the same reference numerals indicate the same or equivalent parts. Figure 2 Figure 3 Figure 4 1.2.3.4.5. ...Enthusiasm.l. Procedural amendment (voluntary)

Claims (1)

[Claims] When image data is stored in a memory by a central processing unit and this image data is scroll-displayed on a CRT, an adder adds an offset address to a display address and inputs the addition result to the CRT. In the display device, the addition device performs a logical product of an address decoder that determines the quadrant of the screen to be displayed based on the display address, and an output signal of this address decoder and a signal indicating the quadrant to be displayed by scrolling. and another AND circuit that takes the logical product of the output signal of this AND circuit and the scroll instruction signal, and adds the offset address to the display address according to the output of this AND circuit. A display device characterized by: