JPS6126096B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an interrupt check system for an electronic computer in which the number of interruptions to the computer is displayed for each interrupt level as well as the time between the interruptions.

Traditionally, when checking interrupt signals on a computer, a measuring instrument such as a synchroscope was used.
Checks were performed by connecting a probe to the interrupt signal input line. By the way, in electronic computers, interrupts are always processed with priority, so if interrupts occur frequently, it will affect normal processing, so it is necessary to understand and adjust the number and interval of interrupts. Is required.

However, in this conventional method, the interrupt signal is displayed on the measuring instrument only at the moment it is received, so it is difficult to check and may be overlooked, and it is troublesome to constantly monitor the measuring instrument.

The present invention has been made to solve these problems, and an object of the present invention is to provide an interrupt check method for a computer that can easily and reliably check the input of an interrupt signal to a computer, and that does not require the trouble of constant monitoring. With the goal.

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram for explaining one embodiment of the present invention. Reference numeral 11 indicates an electronic computer, and interrupts having various levels are applied to the electronic computer 11. As shown in FIG. Here, these interrupt levels are expressed as interrupt 0, interrupt 1, interrupt 2, . . . interrupt n. Also 12
₀ , 12 ₁ , . . . 12 _o are display devices that respectively display the count for each level of the interrupt and the time of the interrupt interval. Each of these display devices 12 ₀ ~
_12o displays the number of interrupts for each interrupt level in the upper part of the figure, and displays the interrupt interval time in the lower part.

In such a configuration, the electronic computer 11 is
As shown in the figure, when an interrupt occurs during normal processing, a display device corresponding to the interrupt level is selected to display a count and to start counting time. The interrupt program at this time is executed as shown in FIG. First, it is checked whether it is the first interrupt or not. If it is the first interrupt, the display is reset, and if it is not the first interrupt, the time is displayed. Subsequently, the time count of the corresponding interrupt counted by the internal counter is cleared and the time count is restarted. Subsequently, the corresponding interrupt counter provided internally is incremented by 1 to display the number of times, and the original interrupt processing is performed to complete the processing.
Therefore, for example, when the next interrupt of the same level occurs, the electronic computer 11 increments the internal number counter by 1 and causes the corresponding interrupt display device to display the counted number and also display the contents of the time count. Therefore, the time displayed on the display device at this time is the interrupt interval from the previous interrupt of the same level. For example, now, at point A in Figure 2, computer 1
1 is interrupted by interrupt 1, the electronic computer 11
selects the display device ₁₂₁ and displays the count number "1" and starts counting the time. At this time, the display on the display device ₁₂₁ becomes as shown in FIG. 4a. Next, when an interrupt of the same level (interrupt 1) comes in at point 2 in FIG.
Display the counted time (e.g. 8msec). Therefore, at this time, a display as shown in FIG. 4B is displayed on the display device ₁₂₁ , and the time 8 ms indicates the time interval since the previous interrupt 1. At this time, the time count inside the computer 11 is cleared, and the display on the display device ₁₂₁ is fixed until the next interrupt 1 occurs.

Next, when interrupt 4 occurs, computer 1
1 selects the display device ₁₂₄ , increments the number counter corresponding to interrupt 4 by 1 and displays its contents, and also clears the time count corresponding to interrupt 4 and displays its contents. At this time, the time count corresponding to interrupt 1 is not cleared. Thereafter, when interrupt 1 is generated again at point _C in _FIG . The result is as shown in c in Figure 4. Therefore, from this display, it can be seen that the number of inputs of interrupt 1 is three times, and the time interval from the previous interrupt 1 is 20 ms. This display does not change until the next interrupt 1 occurs. In this way, a display device is selected according to the level of interrupts entering the computer 11, and the number of interrupts at the same level and the time of the interrupt interval are displayed on that display device. In FIG. 2, the part surrounded by a broken line shows the interrupt processing program for interrupt 1, and the part surrounded by a dashed dotted line shows the interrupt processing program for interrupt 4.

Note that the above time display can be controlled by software, and it is possible to display not only the interrupt interval but also the interrupt processing time.

As explained above, according to the present invention, the number of various interrupts that enter a computer at each interrupt level is displayed, and the interrupt interval time is also displayed. Since it is fixed until this point, the interrupt check can be performed easily and reliably, and the check operation can be performed quickly.

[Brief explanation of the drawing]

FIG. 1 is a block diagram for explaining an embodiment of the present invention, FIG. 2 is a flowchart for explaining the operation of the embodiment, and FIG. 3 is a flowchart for explaining an interrupt program in the embodiment. FIG. 4 is a diagram showing display changes of the display device in the same embodiment. 11...Electronic computer, 12 ₀ , 12 ₁ ,...12
_o ...display device.

Claims (1)

[Claims] 1. A computer interrupt check method characterized by displaying the number of interrupts for each interrupt of the same level and displaying the interrupt interval time of the same level for various interrupts of different levels entering the computer. .