JPS61258479A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain uniform source and drain regions, by etching the side faces of a polysilicon film with the use of an insulation film as a mask, and ions of an impurity having the opposite type of conductivity to that of the substrate are implanted so as to form regions of said opposite type of conductivity on the semiconductor substrate except the region patterned with the polysilicon film. CONSTITUTION:A field oxide film 2 and a gate oxide film 3 are formed on a P-type silicon substrate 1. A polysilicon film 10 is then deposited thereon, and further an SiO2 film 11 is formed thereon. The portions of the SiO2 film 11 and the polysilicon film 10 not included in predetermined patterns are removed. The side faces of the polysilicon film 10 are etched away. Arsenic ions are implanted so as to provide N<+> type source and drain regions 12 and 13 on the silicon substrate 1. The source drain regions 12 and 13 are activated, and the side faces of the polysilicon film 10 are oxidized by thermal oxidation. In this manner, the source and drain regions can be formed with good reproducibility.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method of manufacturing an MO8 type semiconductor device.

[Conventional technology]

In recent years MO8! The integration and density of semiconductor half-conductor devices (also referred to as transistors) have been promoted, and as the size of the device has become smaller, the gate length has become shorter. As a result, the source and drain regions become close to each other, resulting in a short circuit (punch-through phenomenon) through the depletion layer between the source and drain regions, and an increase in threshold voltage (vth) due to the photocarrier effect, which impairs the transistor function. A problem arose.

Lightly Do
MO8 transistors of the ped Drajn) structure have been proposed and implemented.

Figure 2 (a) to (d) are LDD structure MOS), F:
FIG. 2 is a step cross-sectional view illustrating an example of a method for manufacturing a MOS transistor.

First, as shown in FIG. 2(a)K, field oxidation [2], a gate oxide film 3, and a polysilicon film doped with N-type impurities are formed on a P-type silicon substrate 1, and then A gate electrode 4 made of a polysilicon film is then formed.

Next, as shown in FIG. 2(b), the entire surface is covered by the CVD method.
Deposit S 10g film 5.

Next, as shown in FIG. 2(C), 5 reactive ions were added.

The 9SiO film 5 is etched and etched by the etching (RIE) method, leaving an 8i0tjl (side wall) 5a only on the side surface of the gate electrode 4.

Next, as shown in FIG. 2(d), arsenic (A$) is ion-implanted into the entire surface to form source and drain regions 6.7 made of N0. At this time, since the sidewall 5a acts as a mask at the lower part of the sidewall 5a, the injected A
Since the number of 3 ions is small, the depth of the junction is shallower in the source/drain regions 6 and 7 than elsewhere.

Source and drain regions 6 and 7 formed in this way
The shape does not change significantly even after heat treatment for activation. Furthermore, by forming the source/drain regions in a stepwise manner, the shape of the depletion layer also changes, making it possible to prevent electric field concentration on the substrate surface, and as a result, the punch-through breakdown voltage is improved. Furthermore, the electric field concentration on the drain side is also alleviated, so that v due to the photocarrier effect
The increase in tb is also suppressed.

[Problem that the invention seeks to solve]

In the conventional manufacturing method, the sidewall 5a is formed by RIE method.
However, in the RIE method, the uniformity of the etching rate within the wafer is poor, and it is extremely difficult to form the sidewall 5a uniformly and with good reproducibility. the result,
The shapes of the N+ type source and drain regions 6 and 7 of the LDD structure formed by the ion implantation method are non-uniform. For this reason, the characteristics of the MOS transistor were unstable and the manufacturing yield was poor.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and provide a method for manufacturing an MO8 type semiconductor device having an LDD structure and having uniform source and drain regions.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes: - Steps of sequentially forming a gate oxide film, a polysilicon film, and an insulating film on a conductive semiconductor substrate; and removing the insulating film and the polysilicon film other than a predetermined pattern portion. a step of etching the side surface of the polysilicon film using this insulating film as a mask; and a step of ion-implanting impurities of the opposite conductivity type to the entire surface to form regions of the opposite conductivity type on the semiconductor substrate other than the patterned portion of the polysilicon film. It consists of the process of

According to the present invention, ion implantation of impurities to form source/drain regions is performed through an insulating film formed in a shape having a canopy on a polysilicon film serving as a gate electrode. This canopy-shaped insulating film can be formed with high accuracy and reproducibility using photolithography technology, so L
A MOS transistor having a source/drain region with a DD structure becomes a transistor with uniform characteristics.

〔Example〕

Next, embodiments of the present invention will be described using the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views for explaining one embodiment of the present invention.

First, as shown in FIG. 1(a), a field oxide film 2 and a gate oxide film 3 with a thickness of about 500 Å were formed on a P-type silicon substrate 1, and then H-type impurities were doped using the CVD method. A polysilicon film 10 with a thickness of about 0.3 μm is deposited, and a polysilicon film 10 with a thickness of 0.1 to 0.0 μm is deposited on top of it by CVD.
A film 11 is formed on Si with a thickness of 2 μm. Subsequently, using photolithography technology, the SiO
and polysilicon film 10 are removed.

Next, as shown in FIG. 1(b), 8i0. A dryer using the film 11 as a mask and using a CCt-based reactive gas.

The side surface of the polysilicon film 10 is coated with a thickness of approximately 0.3 μm using the etch method.
Etch about m.

Next, as shown in Fig. 1(C), 150 to 200 ke
A3 ions are implanted at a concentration of about 1.times.1.6 ions/d under the condition of V to form r-type source and drain regions 12.13 on the silicon substrate 1.

Subsequently, the source and drain regions 12 and 13 are activated by heating to about 1000° C. in an inert gas atmosphere.

The depth of the source and drain regions 12.13 of the LDD structure thus formed is 0.3 to 0.4 in the deep part.
The depth is 0.1 to 0.2 μm in the shallow portion.

The cross-sectional shape of the source and drain regions 12 and 13 depends on the shape and thickness of the patterned polysilicon film 10, the shape and thickness of the 8i02 film 11 formed in the shape of having an eave thereon, and the ion implantation conditions for N-type impurities. It can be well controlled and formed with good reproducibility.

Next, as shown in FIG. 1(d), the side surfaces of the polysilicon [10] are oxidized by thermal oxidation. Due to this oxidation, the width of the wrinkled silicon film IO is reduced by about 0.2 μm.

Therefore, the patterning shown in FIG. 1<a> must be performed with consideration given to the reduction in the film width of the grains, etc.

Since 8i0.11 is formed on the surface of the polysilicon film 10, the film thickness is not reduced by this thermal oxidation. Therefore, unlike conventional manufacturing methods, it is not necessary to form a thick polysilicon film in consideration of the reduction in film thickness due to mono-oxidation.

Therefore, the patterning of the polysilicon film in FIG. 1(a) can be performed with high precision.

Next, phosphorus silicate glass (PS
G) After depositing the film 14 and performing a flattening process using heat flow, the openings, Ω wiring, etc. are sequentially formed to form the MOB plate 2.
Complete the injista.

As described above, according to the manufacturing method of the present invention, the insulating film used to form the source/drain regions of the LDD structure can be formed with high precision on the polysilicon film that will become the gate electrode. Therefore, the source and drain regions of the MOS transistor can also be formed with high accuracy and reproducibility.

Note that in the above embodiment, N is formed on the pg silicon substrate.
Although the case of forming + type source/drain regions has been described, it is also possible to form P+ type source/drain regions using an N type silicon substrate, and other modifications may be made without departing from the gist of the invention. It is possible to use it.

〔Effect of the invention〕

As explained in detail above, according to the present invention, the insulating film for forming the shallow source/drain regions of the LDD structure can be formed on the gate electrode with a high degree of Kff.
The drain region is formed with good reproducibility. Therefore, it is possible to obtain a method for manufacturing an MO8 type semiconductor device with no variation in characteristics and improved yield, which is highly effective.

[Brief explanation of drawings]

FIGS. 1(a) to (d) are process cross-sectional views for explaining one embodiment of the present invention, and FIGS. 2(a) to (d) are for explaining an example of a conventional method for manufacturing a semiconductor device. FIG. 1...Silicon substrate, 2...Field oxide film, 3...Gate oxide film, 4...
・Gate electrode, 5...8i01 film, 6...
... Source region, 7... Drain region, lO.
...Polysilicon film, 11...-8 inch, film, 12...Source region, 13...Drain region, 14...PSG film. Figure 1

Claims (1)

[Claims] a step of sequentially forming a gate oxide film, a polysilicon film, and an insulating film on a semiconductor substrate of one conductivity type; a step of removing the insulating film and the polysilicon film other than a predetermined pattern portion;
A step of etching the side surface of the polysilicon film using the insulating film as a mask, and a step of ion-implanting an impurity of the opposite conductivity type to the entire surface to form an opposite conductivity type region on the semiconductor substrate other than the patterned portion of the polysilicon film. A method for manufacturing a semiconductor device, comprising: