JPS61251244A - Circuit for transmitting auxiliary signal - Google Patents

Abstract

PURPOSE:To make it possible to transfer an output with inserting an auxiliary signal to a succeeding section without being influenced by the fault of a preceding section by making a constitution so that, when the fault occurs at the preceding section, the output of an auxiliary signal generating circuit is outputted through a switching circuit. CONSTITUTION:When an input signal 1 is not inputted any more or any fault occurs at the preceding section and a frame step out is detected at a frame synchronizing circuit 101, an auxiliary signal generating circuit 104 is controlled by a frame synchronizing state signal 6 from the frame synchronizing circuit 101. A frame synchronizing signal and a random signal both of which are generated at the auxiliary signal generating circuit 104 are multiplexed to a digital service channel (DSC) signal input 4 at the circuit. In other words, when the input signal 1 is inputted or when any fault is not occurred at the preceding section, the output signal 5 of an auxiliary signal inserting circuit 103 is selected by the switching circuit 105 and also, when the input signal 1 is not inputted any more or when some fault is occurred at the previous section, the output signal 7 of the auxiliary signal generating circuit 104 is selected.

Description

[Detailed description of the invention] [Industrial application field].

The present invention relates to auxiliary signal transmission means for digital multiplexed signal transmission.

In particular, it relates to an auxiliary signal extraction/insertion circuit.

〔overview〕

The present invention provides an auxiliary signal transmission circuit that is used in an intermediate relay station of a digital multiplex wireless transmission system and has a means for inserting an auxiliary signal into an input signal and transmitting it to a subsequent section. By transmitting random signals including auxiliary signals generated within the own circuit and frame synchronization signals to the subsequent section when there is no input, the auxiliary signal can be transmitted regardless of the presence or absence of a fault in the previous section. This is what I did.

[Conventional technology]

The configuration of a conventional circuit is shown in FIG. In this conventional circuit, the input signal (2) is input to each of the frame synchronization circuit 1011, the auxiliary signal extraction circuit 102, and the auxiliary signal insertion circuit 103. The frame synchronization circuit 101 is a circuit that establishes frame synchronization based on the input signal (2) and detects the auxiliary signal position. The auxiliary signal extraction circuit 102 and the auxiliary signal insertion circuit 103 input the auxiliary signal extraction/insertion control signal ■ having information on the auxiliary signal position generated in the frame synchronization circuit 101, and output the DSC (Digital 5erv
This is a circuit that extracts and inserts an auxiliary signal such as an ice channel (ice channel) signal into the input signal (2).

[Problem that the invention seeks to solve]

However, in such conventional circuits, the frame synchronization used to detect the auxiliary signal position is established based on the input signal ■, so if the input signal ■ is disconnected or there is a failure in the previous section, frame synchronization cannot be established. As a result, it becomes impossible to detect the position of the auxiliary signal, and therefore the extraction and insertion of the auxiliary signal cannot be performed, resulting in the disadvantage that the auxiliary signal cannot be transmitted to the subsequent section.

The present invention aims to improve this drawback, and aims to provide an auxiliary signal transmission circuit capable of transmitting an auxiliary signal to a subsequent section regardless of a fault in the previous section.

[Means for solving problems]

The present invention includes a synchronization detection means that is included in an intermediate relay station of a digital multiplex wireless transmission system and detects the frame synchronization state of a digital signal passing through the intermediate relay station, and detects the position of a time slot to which an auxiliary signal is allocated. This auxiliary signal transmission circuit is equipped with an auxiliary signal position detecting means for detecting the position of the auxiliary signal, and an auxiliary signal insertion circuit for inserting the auxiliary signal into the time slot position identified by the auxiliary signal position detecting means. The means includes an auxiliary signal generation means for generating a random signal and a frame synchronization signal including an auxiliary signal, and one of the output signal of the auxiliary signal generation means and the output signal of the auxiliary signal insertion circuit is selected as the output signal. The present invention is characterized by comprising a switching means and a circuit means for switching the switching circuit to the auxiliary signal generating means when synchronization is not detected by the synchronization detecting means.

[Effect]

When there is an input signal to this auxiliary signal transmission circuit or in a normal state where no fault has occurred in the previous section, the output signal of the auxiliary signal insertion circuit is transmitted to the subsequent section via the switching circuit. However, when there is no input signal or in an abnormal state where a failure occurs in the previous section, the output signal of the auxiliary signal generation circuit is selected by the switching circuit and transmitted to the subsequent section. That is, the insertion of the auxiliary signal is performed regardless of the presence or absence of a fault in the previous section, and transmission to the subsequent section is realized.

〔Example〕

Hereinafter, a circuit according to an embodiment of the present invention will be explained based on the drawings.

FIG. 1 is a block configuration diagram showing the configuration of a circuit according to an embodiment of the present invention.

First, the configuration of this embodiment circuit will be explained based on FIG.

The input signal terminal 10 is connected to an input of a frame synchronization circuit 101, a first input of an auxiliary signal extraction circuit 102, and a first input of an auxiliary signal insertion circuit 103. A first output of the frame synchronization circuit 101 is connected to a second input of the auxiliary signal extraction circuit 102 and a second input of the auxiliary signal insertion circuit 103. The output of the auxiliary signal insertion circuit 103 is the switching circuit 1
05, and the output of the switching circuit 105 is connected to the output signal terminal 15. Frame synchronization circuit 10
1 is connected to the input of the auxiliary signal generation circuit 104 and the second input of the switching circuit 105. The DSC signal input signal terminal 12 is connected to the auxiliary signal insertion circuit 103. and a first input of the auxiliary signal generating circuit 104. The output of the auxiliary signal generation circuit 104 is connected to the switching circuit 10.
5's third input. Further, the output of the auxiliary signal extraction circuit 102 is connected to the DSC signal output terminal 11.

The feature of this embodiment circuit is that the auxiliary signal generation circuit 104 serves as a means for transmitting the auxiliary signal when it becomes impossible to transmit the auxiliary signal to the subsequent section due to a failure in the previous section.
and a switching circuit 105 is provided.

Next, the operation of this embodiment circuit will be explained based on FIG.

When the frame synchronization circuit 101 detects frame synchronization loss when the input signal ■ is no longer input or when a failure occurs in the previous section, the frame synchronization circuit 101
The auxiliary signal generation circuit 104 is controlled by the frame synchronization state signal (2) from the frame synchronization state signal (2). The frame synchronization signal and random signal generated by the auxiliary signal generation circuit 104 are multiplexed into a DSC signal by this circuit. That is, the output signal (2) of the auxiliary signal generation circuit 104 becomes a random sequence signal including the frame synchronization signal and the DSC signal, and this output signal (2) is output to the switching circuit 105. Here, when the DSC input signal ■ is inserted into the random signal and frame synchronization signal generated in the auxiliary signal generation circuit 104,
By using a random signal, smoothing of the power spectrum in a high frequency band and clock extraction at a later stage are facilitated. This switching circuit 105 is controlled by a frame synchronization state signal (2) output from the frame synchronization circuit 101. In other words, when there is a normal input signal ■ or when no fault has occurred in the previous section, this switching circuit 105
The output signal (2) of the auxiliary signal insertion circuit 103 is selected, and when the input signal (2) disappears or a failure occurs in the previous section, the output signal (2) of the auxiliary signal generation circuit 104 is selected.

〔Effect of the invention〕

As explained above, when there is a fault in the previous section, the output of the auxiliary signal generation circuit is outputted via the switching circuit, so that the auxiliary signal is inserted and the subsequent section is unaffected by the fault in the previous section. There is an effect that can be transmitted to.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram showing the configuration of a circuit according to an embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of a conventional circuit. 10... Input signal terminal, 11... DSC signal output terminal, 12... DSC signal input terminal, 15... Output signal terminal, 101... Frame synchronization circuit, 102...
Auxiliary signal extraction circuit, 103... Auxiliary signal insertion circuit, 1
04... Auxiliary signal generation circuit, 105... Switching circuit,
■...Human input signal, ■...Auxiliary signal extraction/insertion control signal, ■...DSC output signal, ■...DSC human input signal, ■...Auxiliary signal insertion circuit output signal, ■... Frame synchronization status signal, ■... Auxiliary signal generation circuit output signal,
■...Switching circuit output signal.

Claims (1)

[Claims] (1) A synchronization detection means included in an intermediate relay station of a digital multiplex wireless transmission system, which detects the frame synchronization state of a digital signal passing through this intermediate relay station, and detects the position of a time slot to which an auxiliary signal is allocated. In an auxiliary signal transmission circuit comprising an auxiliary signal position detection means and an auxiliary signal insertion circuit that inserts an auxiliary signal into a time slot position identified by the auxiliary signal position detection means, a random signal including an auxiliary signal and a frame synchronization signal an auxiliary signal generating means for generating the auxiliary signal generating means; a switching circuit for selecting one of the output signal of the auxiliary signal generating means and the output signal of the auxiliary signal insertion circuit as the output signal; and synchronization is not detected by the synchronization detecting means. An auxiliary signal transmission circuit comprising: circuit means for switching the switching circuit to the auxiliary signal generation means side.