JPH0469460B2 - - Google Patents
Info
- Publication number
- JPH0469460B2 JPH0469460B2 JP9059685A JP9059685A JPH0469460B2 JP H0469460 B2 JPH0469460 B2 JP H0469460B2 JP 9059685 A JP9059685 A JP 9059685A JP 9059685 A JP9059685 A JP 9059685A JP H0469460 B2 JPH0469460 B2 JP H0469460B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- auxiliary signal
- auxiliary
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000037431 insertion Effects 0.000 claims description 20
- 238000003780 insertion Methods 0.000 claims description 20
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 16
- 230000008054 signal transmission Effects 0.000 claims description 8
- 238000001514 detection method Methods 0.000 claims description 7
- 230000005540 biological transmission Effects 0.000 claims description 4
- 238000000605 extraction Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/08—Intermediate station arrangements, e.g. for branching, for tapping-off
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/14—Monitoring arrangements
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はデイジタル多重化信号伝送の補助信号
伝送手段に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to auxiliary signal transmission means for digital multiplexed signal transmission.
特に、補助信号の抽出・挿入回路に関する。 In particular, it relates to an auxiliary signal extraction/insertion circuit.
本発明は、デイジタル多重化無線伝送方式の中
間中継局に用いられ、入力信号に補助信号を挿入
して後続区間に伝送する手段を有する補助信号伝
送回路において、
前区間の障害時または入力信号の入力がないと
きに、自回路内で生成した補助信号を含むランダ
ム信号およびフレーム同期信号を後続区間に伝送
することにより、
前区間の障害の有無に左右されずに補助信号の
伝送が実行できるようにしたものである。
The present invention relates to an auxiliary signal transmission circuit that is used in an intermediate relay station of a digital multiplex wireless transmission system and has a means for inserting an auxiliary signal into an input signal and transmitting it to a subsequent section. By transmitting random signals including auxiliary signals generated within the own circuit and frame synchronization signals to the subsequent section when there is no input, the auxiliary signal can be transmitted regardless of the presence or absence of a fault in the previous section. This is what I did.
従来例回路の構成を第２図に示す。この従来例
回路では、入力信号はフレーム同期回路１０
１、補助信号抽出回路１０２および補助信号挿入
回路１０３のそれぞれに入力される。フレーム同
期回路１０１は、入力信号に基づいてフレーム
同期を確立して補助信号位置を検出する回路であ
る。補助信号抽出回路１０２および補助信号挿入
回路１０３は、フレーム同期回路１０１で発生す
る補助信号位置の情報を持つた補助信号抽出・挿
入制御信号２を入力し、DSC（Digital Service
Channel）信号などの補助信号を前記入力信号１
に対して抽出・挿入する回路である。
FIG. 2 shows the configuration of a conventional circuit. In this conventional circuit, the input signal is the frame synchronization circuit 10.
1, is input to each of the auxiliary signal extraction circuit 102 and the auxiliary signal insertion circuit 103. The frame synchronization circuit 101 is a circuit that establishes frame synchronization based on an input signal and detects the auxiliary signal position. The auxiliary signal extraction circuit 102 and the auxiliary signal insertion circuit 103 input the auxiliary signal extraction/insertion control signal 2 having information on the auxiliary signal position generated in the frame synchronization circuit 101,
Channel) signal and other auxiliary signals to the input signal 1.
This is a circuit that extracts and inserts into.
しかし、このような従来例回路では、入力信号
に基づいて補助信号位置の検出に用いるフレー
ム同期を確立しているので、入力信号の断ある
いは前区間に障害があるとフレーム同期の確立が
不可能になり、これに伴つて補助信号位置の検出
が不可能になり、したがつて補助信号の抽出およ
び挿入が実行できず、後続区間への補助信号の伝
送が行えない欠点がある。
However, in such conventional circuits, frame synchronization used to detect the auxiliary signal position is established based on the input signal, so if the input signal is disconnected or there is a failure in the previous section, it is impossible to establish frame synchronization. As a result, it becomes impossible to detect the position of the auxiliary signal, and therefore the extraction and insertion of the auxiliary signal cannot be performed, resulting in the disadvantage that the auxiliary signal cannot be transmitted to the subsequent section.
本発明は、この欠点を改良するもので、前区間
の障害に関係なく、後続区間に補助信号の伝送が
実行できる補助信号伝送回路を提供することを目
的とする。 The present invention aims to improve this drawback, and aims to provide an auxiliary signal transmission circuit capable of transmitting an auxiliary signal to a subsequent section regardless of a fault in the previous section.
本発明は、デイジタル多重化無線伝送方式の中
間中継局に含まれ、この中間中継局を経由するデ
イジタル信号のフレーム同期状態を検出する同期
検出手段と、補助信号が割付けられるタイムスロ
ツトの位置を検出する補助信号位置検出手段と、
この補助信号位置検出手段により同定されたタイ
ムスロツト位置に補助信号を挿入する補助信号挿
入回路とを備えた補助信号伝送回路で、前述の問
題点を解決するための手段として、補助信号を含
むランダム信号およびフレーム同期信号を生成す
る補助信号発生手段と、この補助信号発生手段の
出力信号および上記補助信号挿入回路の出力信号
のいずれか一方をその出力信号に選択する切換手
段と、上記同期検出手段に同期が検出されたにと
きに上記切換回路を補助信号発生手段の側に切換
える回路手段とを備えたことを特徴とする。
The present invention includes a synchronization detection means that is included in an intermediate relay station of a digital multiplex wireless transmission system and detects the frame synchronization state of a digital signal passing through the intermediate relay station, and a synchronization detection means that detects the position of a time slot to which an auxiliary signal is allocated. auxiliary signal position detection means for
This auxiliary signal transmission circuit includes an auxiliary signal insertion circuit that inserts an auxiliary signal into the time slot position identified by the auxiliary signal position detection means. an auxiliary signal generating means for generating a signal and a frame synchronization signal; a switching means for selecting one of the output signal of the auxiliary signal generating means and the output signal of the auxiliary signal insertion circuit as the output signal; and the synchronization detecting means. and circuit means for switching the switching circuit to the auxiliary signal generating means side when synchronization is detected.
この補助信号伝送回路に入力信号がある場合ま
たは前区間で障害が発生していない通常状態で
は、補助信号挿入回路の出力信号が切換回路を経
て後続区間に伝送される。ところが、入力信号の
入力がないときまたは前区間で障害が発生した異
常状態では、補助信号発生回路の出力信号が切換
回路で選択されて後続区間に伝送される。すなわ
ち、前区間の障害の有無に左右されずに補助信号
の挿入が実行されて後続区間への伝送が実現す
る。
When there is an input signal to this auxiliary signal transmission circuit or in a normal state where no fault has occurred in the previous section, the output signal of the auxiliary signal insertion circuit is transmitted to the subsequent section via the switching circuit. However, when there is no input signal or in an abnormal state where a failure occurs in the previous section, the output signal of the auxiliary signal generation circuit is selected by the switching circuit and transmitted to the subsequent section. That is, the insertion of the auxiliary signal is performed regardless of the presence or absence of a fault in the previous section, and transmission to the subsequent section is realized.
以下、本発明実施例回路を図面に基づいて説明
する。
Hereinafter, a circuit according to an embodiment of the present invention will be explained based on the drawings.
第１図は本発明実施例の構成を示すブロツク構
成図である。 FIG. 1 is a block configuration diagram showing the configuration of an embodiment of the present invention.
まず、この実施例回路の構成を第１図に基づい
て説明する。 First, the configuration of this embodiment circuit will be explained based on FIG.
入力信号端子１０はフレーム同期回路１０１の
入力、補助信号抽出回路１０２の第一の入力およ
び補助信号挿入回路１０３の第一の入力に接続さ
れる。フレーム同期回路１０１の第一の出力は補
助信号抽出回路１０２の第二の入力および補助信
号挿入回路１０３の第二の入力に接続される。補
助信号挿入回路１０３の出力は切換回路１０５の
第一の入力に接続され、切換回路１０５の出力は
出力信号端子１５に接続される。フレーム同期回
路１０１の第二の出力は補助信号発生回路１０４
の入力および切換回路１０５の第二の入力に接続
される。DSC信号入力信号端子１２は補助信号
挿入回路１０３の第三の入力および補助信号発生
回路１０４の第一の入力に接続される。補助信号
発生回路１０４の出力は切換回路１０５の第三の
入力に接続される。また、補助信号抽出回路１０
２の出力はDSC信号出力端子１１に接続される。 The input signal terminal 10 is connected to an input of a frame synchronization circuit 101, a first input of an auxiliary signal extraction circuit 102, and a first input of an auxiliary signal insertion circuit 103. A first output of the frame synchronization circuit 101 is connected to a second input of the auxiliary signal extraction circuit 102 and a second input of the auxiliary signal insertion circuit 103. The output of the auxiliary signal insertion circuit 103 is connected to a first input of the switching circuit 105, and the output of the switching circuit 105 is connected to the output signal terminal 15. The second output of the frame synchronization circuit 101 is the auxiliary signal generation circuit 104.
and a second input of the switching circuit 105. DSC signal input signal terminal 12 is connected to a third input of auxiliary signal insertion circuit 103 and a first input of auxiliary signal generation circuit 104. The output of the auxiliary signal generation circuit 104 is connected to the third input of the switching circuit 105. In addition, the auxiliary signal extraction circuit 10
The output of 2 is connected to the DSC signal output terminal 11.
この実施例回路の特徴とするところは、前区間
の障害により後続区間への補助信号の伝送が不可
能となつた場合の補助信号の伝送手段として、補
助信号発生回路１０４および切換回路１０５を設
けたことにある。 The feature of this embodiment circuit is that it is provided with an auxiliary signal generation circuit 104 and a switching circuit 105 as a means for transmitting an auxiliary signal when it becomes impossible to transmit the auxiliary signal to the subsequent section due to a failure in the previous section. That's true.
次に、この実施例回路の動作を第１図に基づい
て説明する。 Next, the operation of this embodiment circuit will be explained based on FIG.
入力信号が入力されなくなつた場合あるいは
前区間の障害が発生した場合に、フレーム同期回
路１０１でフレーム同期外れが検出されると、フ
レーム同期回路１０１からフレーム同期状態信号
により補助信号発生回路１０４が制御される。
補助信号発生回路１０４で生成したフレーム同期
信号およびランダム信号は、この回路でDSC信
号入力に多重化される。すなわち、補助信号発
生回路１０４の出力信号はフレーム同期信号お
よびDSC信号を含んだランダム系列信号になり、
この出力信号が切換回路１０５出力される。こ
こで、補助信号発生回路１０４内で発生されるラ
ンダム信号およびフレーム同期信号にDSC入力
信号が挿入されると、ランダム信号を用いるこ
とにより高周波帯パワースペクトラムの平滑化お
よび後段でのクロツク抽出が容易になる。この切
換回路１０５はフレーム同期回路１０１から出力
されるフレーム同期状態信号６により制御され
る。すなわち、通常入力信号がある場合あるい
は前区間で障害が発生していない場合には、この
切換回路１０５により補助信号挿入回路１０３の
出力信号が選択され、また、入力信号がなく
なつた場合あるいは前区間の障害が発生した場合
には、補助信号発生回路１０４の出力信号が選
択される。 When the frame synchronization circuit 101 detects frame synchronization loss when the input signal is no longer input or when a failure occurs in the previous section, the auxiliary signal generation circuit 104 is activated by the frame synchronization state signal from the frame synchronization circuit 101. controlled.
The frame synchronization signal and random signal generated by the auxiliary signal generation circuit 104 are multiplexed into the DSC signal input by this circuit. That is, the output signal of the auxiliary signal generation circuit 104 becomes a random sequence signal containing a frame synchronization signal and a DSC signal,
This output signal is output from the switching circuit 105. Here, when the DSC input signal is inserted into the random signal and frame synchronization signal generated in the auxiliary signal generation circuit 104, smoothing of the high frequency band power spectrum and clock extraction in the subsequent stage are facilitated by using the random signal. become. This switching circuit 105 is controlled by a frame synchronization state signal 6 output from the frame synchronization circuit 101. That is, when there is a normal input signal or when no fault has occurred in the previous section, the output signal of the auxiliary signal insertion circuit 103 is selected by the switching circuit 105, and when there is no input signal or when no fault has occurred in the previous section, the output signal of the auxiliary signal insertion circuit 103 is selected. If a fault occurs in the section, the output signal of the auxiliary signal generation circuit 104 is selected.
本発明は、以上説明したように、前区間が障害
のときに、補助信号発生回路の出力が切換回路を
経て出力されるので、前区間の障害に左右されず
補助信号を挿入して後続区間へ伝送することがで
きる効果がある。
As explained above, when there is a fault in the previous section, the output of the auxiliary signal generation circuit is outputted via the switching circuit, so that the auxiliary signal is inserted and the subsequent section is unaffected by the fault in the previous section. There is an effect that can be transmitted to.
第１図は本発明実施例回路の構成を示すブロツ
ク構成図。第２図は従来例回路の構成を示すブロ
ツク構成図。
１０……入力信号端子、１１……DSC信号出
力端子、１２……DSC信号入力端子、１５……
出力信号端子、１０１……フレーム同期回路、１
０２……補助信号抽出回路、１０３……補助信号
挿入回路、１０４……補助信号発生回路、１０５
……切換回路、……入力信号、……補助信号
抽出・挿入制御信号、……DSC出力信号、
……DSC入力信号、……補助信号挿入回路出
力信号、……フレーム同期状態信号、……補
助信号発生回路出力信号、……切換回路出力信
号。
FIG. 1 is a block configuration diagram showing the configuration of a circuit according to an embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of a conventional circuit. 10...Input signal terminal, 11...DSC signal output terminal, 12...DSC signal input terminal, 15...
Output signal terminal, 101...Frame synchronization circuit, 1
02...Auxiliary signal extraction circuit, 103...Auxiliary signal insertion circuit, 104...Auxiliary signal generation circuit, 105
...switching circuit, ...input signal, ...auxiliary signal extraction/insertion control signal, ...DSC output signal,
...DSC input signal, ...auxiliary signal insertion circuit output signal, ...frame synchronization state signal, ...auxiliary signal generation circuit output signal, ...switching circuit output signal.
Claims (1)
に含まれ、 この中間中継局を経由するデイジタル信号のフ
レーム同期状態を検出する同期検出手段と、 補助信号が割付けられるタイムスロツトの位置
を検出する補助信号位置検出手段と、 この補助信号位置検出手段により同定されたタ
イムスロツト位置に補助信号を挿入する補助信号
挿入回路と を備えた補助信号伝送回路において、 補助信号を含むランダム信号およびフレーム同
期信号を生成する補助信号発生手段と、 この補助信号発生手段の出力信号および上記補
助信号挿入回路の出力信号のいずれか一方をその
出力信号に選択する切換回路と、 上記同期検出手段に同期が検出されないときに
上記切換回路を補助信号発生手段の側に切換える
回路手段と を備えたことを特徴とする補助信号伝送回路。[Claims] 1. Synchronization detection means included in an intermediate relay station of a digital multiplex wireless transmission system and configured to detect the frame synchronization state of a digital signal passing through the intermediate relay station, and a time slot to which an auxiliary signal is allocated. In an auxiliary signal transmission circuit comprising an auxiliary signal position detection means for detecting a position and an auxiliary signal insertion circuit for inserting an auxiliary signal into a time slot position identified by the auxiliary signal position detection means, a random signal including an auxiliary signal is generated. and an auxiliary signal generation means for generating a frame synchronization signal; a switching circuit for selecting either the output signal of the auxiliary signal generation means or the output signal of the auxiliary signal insertion circuit as the output signal; An auxiliary signal transmission circuit comprising circuit means for switching the switching circuit to the auxiliary signal generation means side when synchronization is not detected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9059685A JPS61251244A (en) | 1985-04-26 | 1985-04-26 | Circuit for transmitting auxiliary signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9059685A JPS61251244A (en) | 1985-04-26 | 1985-04-26 | Circuit for transmitting auxiliary signal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61251244A JPS61251244A (en) | 1986-11-08 |
| JPH0469460B2 true JPH0469460B2 (en) | 1992-11-06 |
Family
ID=14002847
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9059685A Granted JPS61251244A (en) | 1985-04-26 | 1985-04-26 | Circuit for transmitting auxiliary signal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61251244A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6231229A (en) * | 1985-08-01 | 1987-02-10 | Nec Corp | Repeater |
-
1985
- 1985-04-26 JP JP9059685A patent/JPS61251244A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61251244A (en) | 1986-11-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |