JPS61251020A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To intensity the built-in electric field located between the first impurity-doped layer and an intrinsic layer as well as to reduce the effect of the recombination center by a method wherein the film-forming temperature of the semiconductor layer, to be deposited as a part of an intrinsic layer, from the part contacting to the first doped layer to the specific thickness is brought down. CONSTITUTION:When the first impurity-doped layer, an intrinsic layer, and the second impurity layer of the conductive type reverse to that of the first doped layer are going to be deposited in the above-mentioned order as amorphous semiconductors on a transparent conductive film, if the highest film-forming temperature when the semiconductor layer, to be deposited as a part of the intrinsic layer is deposited on the region ranging from the part contacting to the first doped layer to the part of 80Angstrom in thickness, is reduced by 20-250 deg.C from the highest film forming temperature of the intrinsic layer which will be formed subsequently, the transparent conductive film is hardly reduced even when it comes in contact with the reducing plasma containing hydrogen atoms. As the diffusion of dopant in the metal, generated by reducing when the first doped layer is deposited, and in the first doped layer can also be prevented, the generation of recrystallization center formed by the contamination of a semiconductor layer by metal and the lowering of doping efficiency and the like can be remarkably improved.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Prior Art] A-3t:H and a-3IC:H are used as materials for semiconductor devices such as solar cells containing an amorphous semiconductor layer.

a-SiGe:Hla-SiN:H, a-Si:F:H
la-Ge:11, and these microcrystalline semiconductors are used.

These films are usually formed using an RF or DC plasma CVD apparatus.

In the conventional method, all amorphous semiconductor devices are deposited using this type of apparatus at a temperature of about 220° C. or higher.

[Problems to be solved by the invention] When a semiconductor layer is formed on a transparent conductive film by this method, electrons in plasma and ions and radicals that are decomposition products of semiconductor forming gas are exposed to the substrate surface. Due to direct collision, ITO, In103, ITO/5nOe, Cdz
SnOy (X=0.5-2, Y=2-4),
A transparent conductive film formed from Irz 01-z (Z-0,33 to 0.5) or the like is partially or entirely reduced and metallized. This phenomenon also occurs in the deposition process of the intrinsic layer after the deposition of the first impurity doped layer, when the deposition temperature is
When the temperature is around 20°C or higher, electrons, ions, radicals, etc. This occurs due to collision of the surface of the substrate with the surface of the substrate.

The metal produced in this way diffuses not only into the deposited first impurity doped layer but also into the intrinsic layer, acting as a kind of dopant, or by canceling the electrons and holes generated in the intrinsic layer. Since it becomes a bonding center, the semiconductor/transparent conductive film interface and the first impurity doped layer/intrinsic layer interface are significantly deteriorated.

This diffusion proceeds not only during the deposition of the first impurity-doped layer but also during the deposition of the intrinsic layer, and the diffusion of the dopant atoms of the first impurity-doped layer also proceeds during the deposition of the intrinsic layer.

Further, when the metallization occurs, the conductivity and transparency of the transparent conductive N film itself are reduced, and the characteristics of the semiconductor device, particularly the photoelectric conversion characteristics, are significantly reduced.

The present invention is transparent as described above! This method aims to reduce problems caused by deterioration of the transparent conductive film that occurs when depositing an amorphous semiconductor on the substrate, and further strengthens the built-in electric field between the first impurity doped layer and the intrinsic layer. This aims to reduce the influence of recombination centers.

[Means for Solving the Problems] The present invention provides a first impurity doped layer (hereinafter referred to as the first doped layer), an intrinsic layer, and an amorphous semiconductor layer opposite to the first doped layer on a transparent conductive N film. When a conductive type second impurity doped layer (hereinafter referred to as the second doped layer) is deposited in order, the part in contact with the first doped layer to the 80mm thick part is deposited as part of the intrinsic layer. The present invention relates to a method for manufacturing a semiconductor device, characterized in that the maximum formation temperature during deposition of a semiconductor layer is 20 to 250° C. lower than the maximum formation temperature of an intrinsic layer formed thereafter.

[Example] The transparent conductive film used in the present invention refers to a transparent conductive film with a thickness of about 0.01 to 1.0 mm that is generally used in the manufacture of semiconductor devices. There are no particular limitations as long as there are.

Specific examples of the transparent conductive film include ITO1ITO/5n
Oe, Ingot, 5nOt, Cdx Sn
Gy (X-0,5~2, Y-2~4), Irz
Examples include, but are not limited to, O,-2(z-0,33-0.5), CdO, and the like.

All of these *m-disciplines are easily reduced by reducing plasma containing hydrogen atoms, and when the temperature is particularly high, the reduction occurs markedly, as in general chemical reactions.

In the present invention, the first layer deposited on the transparent conductor 1flIII
The doped layer is, for example, a-Si:H.

a-SiC:H, a-Ge:H, a-Si:F:If,
P-type or n-type materials such as μC-5i:H are generally used, but the problem is not limited thereto.

The intrinsic layer and the second doped layer formed after the first doped layer are deposited are particularly limited if the second doped layer is of the opposite conductivity type as the normally used intrinsic layer and the first doped layer. It's not a thing.

A specific example of such an intrinsic layer is a-Si:)l
, a-3i:F, a-3i:F:Hla-SiGe:
Specific examples of the second doped layer include undoped layers such as Hla-3iSn:Hla-SiN:H, or those doped with a small amount of B or P, etc., if the first doped layer is p-type. is n-type μc-8t:H,a-3i
C:H.

The first doped layer is n, such as a-Si:H, a-SiN:H, etc.
In the case of p-type a-3i:H, μc-Si:Hl
Examples include a-SiC:H.

In the present invention, the highest film forming temperature during semiconductor-like deposition, which is deposited as a part of the intrinsic layer from the part in contact with the first doped layer to the part with a thickness of 80 nm, is the intrinsic layer to be deposited afterwards. The film is formed at a temperature 20 to 250°C lower than the maximum film forming temperature.

In this specification, the maximum deposition temperature refers to the portion of the semiconductor layer that is deposited as part of the intrinsic layer, from the portion in contact with the first doped layer to the portion with a thickness of 80 nm. It refers to the temperature of the surface on which the highest semiconductor layer is deposited during the deposition of the semiconductor layer, and for the part of the intrinsic layer that is subsequently deposited, the temperature on the surface where the highest semiconductor layer is deposited during the deposition of that part. Refers to temperature.

Normally, reduction of the transparent conductive film occurs significantly when forming the first doped layer, especially when the film formation temperature is about 220°C or higher, but the thickness of the first doped layer Generally, it is as thin as 80 to 300 mm, and in some cases the layer is formed in the form of islands, creating gaps between the islands. Therefore, when forming the intrinsic layer under the above conditions, the first dope It is reduced by a reducing plasma containing hydrogen atoms through the layer. In true MHIWA, there is also a first
Diffusion of dopant atoms in the doped layer also progresses.

However, from the part in contact with the first doped layer to the part 80 nm thick, or even 80 to 2000 people thick, the highest growth rate during the deposition of the semiconductor layer deposited as part of the intrinsic layer. When the film is formed at a temperature that is 20 to 250°C lower than the maximum formation temperature of the intrinsic layer that is subsequently formed, preferably a maximum film formation temperature of 10 to 210°C, the formation Il
The low temperature makes it difficult for the transparent conductive film to be reduced even if it comes into contact with reducing plasma containing hydrogen atoms, and
It is also possible to prevent diffusion of metal generated by reduction during deposition of the first doped layer and dopants in the first doped layer.

Therefore, the amount of metal produced is reduced and diffusion is also reduced, and deterioration in semiconductor properties such as generation of recombination centers and deterioration of doping efficiency resulting from contamination of the semiconductor layer by the metal is significantly improved.

Further, the maximum film formation temperature of the first doped layer is 10 to 210 degrees Celsius, and the semiconductor layer is formed from the part in contact with the first doped layer to the thickness of 80 people, or if necessary, to the thickness of 80 to 2000 people. By setting the temperature to be the same as or lower than the maximum film forming temperature during deposition, the effect that the transparent conductor III is less likely to be reduced can be more prominently obtained. In addition, when a film is formed by such a method, the thickness of the first doped layer from the part in contact with the first doped layer to the part with a thickness of 80 mm, if necessary, is 80 to 20 mm thick.
The semiconductor layer up to a thickness of 0.00 mm and the subsequent intrinsic layer can be formed by increasing the film formation temperature stepwise from a low AAI degree to a high AM degree. The p layer with small internal stress and the intrinsic layer with large internal stress are smoothly connected, and the oxide transparent conductive layer 1/first doped layer/first
Mechanical stress at each interface between the semiconductor layer and the subsequently deposited intrinsic layer from the part in contact with the doped layer to the part with a thickness of 80°, if necessary, up to a part with a thickness of 80 to 2000°. It is possible to reduce the occurrence of defects such as dangling bonds caused by. Furthermore, the semiconductor layer from the part in contact with the first doped H/first doped layer to a part with a thickness of 80 GOA, if necessary, a part with a thickness of 80 to 20 GOA/semiconductor layer to be formed thereafter. Because the forbidden width of each layer changes smoothly from wide to narrow,
The internal electric field at the interface can be uniformly increased compared to the conventional m1 doped layer/intrinsic layer interface. Moreover, by using a material with a wide forbidden band width, such as a-SiC:H, for the first doped layer, the internal electric field can be further increased. Furthermore, when the first doped layer is a .mu.c-3i:8 layer, it is possible to obtain a smooth interface between .mu.c-Si:H and the intrinsic layer.

Semiconductor II (intrinsic layer formed at a low maximum film formation temperature) is formed from the part in contact with the first dope to a part with a thickness of 80 G, if necessary, a part with a thickness of 80 to 200 G. The plasma conditions for forming a film are, for example, a pressure of 0.2
It is preferable to set the pressure at or near the maximum pressure that can maintain glow discharge in the range of ~2.5 Torr, and set the RF power within the range that can maintain glow discharge (5~201N/2.5 Torr).
It is preferable to minimize the photoconductivity σph by d), and by doing so, the photoconductivity σph can be maintained at 10°C even at a maximum film formation temperature that is 20 to 250°C lower than the maximum film formation temperature of the intrinsic layer that will be formed afterwards. −5 (ΩC1)−1 or more, and the optical forbidden band width E can be reduced to about 1.8 eV. Furthermore, the influence of plasma on the transparent conductive film can also be reduced.

However, the electrical properties of the intrinsic layer formed at this low maximum deposition temperature may be inferior to those of the intrinsic layer formed at a high maximum deposition temperature, so the entire intrinsic layer may be formed at a low maximum deposition temperature. It is not preferable to fabricate at film temperature, but in practice it is possible to reduce the influence of plasma when forming a normal intrinsic layer.
The intrinsic layer may be deposited at a low i-high deposition temperature to a thickness that can prevent deterioration of the transparent conductive film and diffusion of the dopant in the first doped layer.

In other words, depending on the intrinsic layer deposition condition of a low maximum deposition temperature, the intrinsic layer can be formed from the part in contact with the first doped layer to a part with a thickness of 80 nm, or if necessary, up to a part with a thickness of 80 to 2000 nm. The effects of the present invention can be obtained by depositing a portion of the .

Of course, the thickness of the intrinsic layer deposited at a low maximum deposition temperature is
For example, when the number of people grows to 500, 1000, or even 2000, Transparent Guide 1! Although the effect of preventing reduction of the film or diffusion of metal becomes greater, a value that is too large is not preferable for the reasons mentioned above. The preferred thickness of the intrinsic layer deposited at a low maximum deposition fA degree is 150 to 400, with the most preferred thickness being 200 to 300.

The film-forming temperature of the intrinsic layer formed at a low maximum film-forming temperature does not need to be constant, and may be gradually changed. The point is to form a film from the part that contacts the first dope layer to the part with a thickness of 80mm, or if necessary, to the part with a thickness of 80 to 2000mm below the highest film-forming temperature of the semiconductor layer to be deposited afterwards. It is sufficient if the maximum film forming temperature is 20 to 250°C, preferably 50 to 200°C lower.

Furthermore, in order to avoid the influence of plasma on the transparent II'11 film during deposition of the intrinsic layer formed at a low maximum film formation temperature, it is preferable to deposit at a maximum film formation temperature of 10 to 210°C, and More preferably, it is deposited at °C.

Equipment for carrying out the method of the present invention includes a conventional capacitively coupled RF parallel plate CVD device, an inductively coupled RF
Examples include, but are not limited to, a CVD device, a DC parallel plate type CvD device, and the like. Particularly remarkable effects are seen in parallel plate type CvO devices.

Next, the method of the present invention will be explained based on examples.

Example 1 and Comparative Example 1 On a glass plate, a 4,000-thick layer of sno
, an electrode was formed and this was used as a substrate.

A substrate temperature of 30°C and a CVD pressure of 1.5 Torr were placed on the substrate.
r, 5i) t*/CH4 flow rate ratio is 2/3.5iH
RF power density 10 mW/a with the net flow rate of BzHs being 1% of the total flow rate of a + CH4
After 100 deposits of p-type a-SiC:HWJ at i, the deposition temperature was 100°C (constant) and the CvD pressure was I Torr.
Uses Te5iHa gas & NTRF power density 10! lW/
200 deposits of type i a-3i:HM (intrinsic layer deposited at low maximum deposition temperature) were made with Cd. Then Sei 111
ffi degree 190'C (constant), CV [1 pressure 1.0To
rr using SiH, gas, 10+14/cd i type a
-3i: H layer was deposited by 6000 people. Furthermore, the SiH4
PH3 was introduced so that the flow rate was 1% and the H layer was introduced so that the flow rate was 30 times higher than that of the RF power density of 701 W/d.
A solar cell having an area of 1 cd was fabricated by depositing 300 Si:H layers and 1000 M layers as electrodes by vacuum evaporation.

When the characteristics of the obtained solar cell were measured using an AM-1, 100 mW/d solar simulator, J, c1
5.21^, Voco, 9V, FF 61.0%, η
It was 864%. Figure 1 shows the results of measuring the current-voltage characteristics of the obtained solar cell.

In addition, as a comparative sample, a solar cell was prepared in the same manner as in Example 1 except that no I-type a-Si:Hll was deposited at a constant film-forming temperature of 100°C, and the characteristics of the solar cell were measured. ,J. 15. OIA, VocO, 78V
, FF 59.5%, η 6496%.

The results of measuring the current-voltage characteristics of the obtained thick battery are shown in FIG.

The film-forming temperature was measured by attaching an ultra-fine CoO Mel 70 Mel thermocouple, which was confirmed not to be affected by plasma electrolysis, to the surface of the substrate on which the semiconductor layer was deposited.

[Effect of the invention] When a semiconductor device is manufactured by the method of the invention, voC,
A semiconductor device with significantly improved FF and η can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a graph showing current-voltage characteristics of semiconductor devices It (solar cells) manufactured by the method of the present invention and the conventional method. 21 Figure Voltage (■n

Claims (1)

[Claims] 1. When depositing an amorphous semiconductor on a transparent conductive film in the order of a first impurity doped layer, an intrinsic layer, and a second impurity doped layer of a conductivity type opposite to the first impurity doped layer, 1 The maximum deposition temperature during the deposition of the semiconductor layer deposited as part of the intrinsic layer from the part in contact with the impurity doped layer to the 80 Å thick part is the maximum deposition temperature of the intrinsic layer deposited afterwards. A method for manufacturing a semiconductor device, characterized in that the temperature is 20 to 250°C lower. 2. The manufacturing method according to claim 1, wherein the maximum deposition temperature of the semiconductor layer from the portion in contact with the first impurity doped layer to a thickness of 80 Å is 10 to 210°C. 3 The maximum film formation temperature of the first impurity doped layer is 10 to 210℃
℃, 80 Å from the part in contact with the first impurity doped layer
2. The manufacturing method according to claim 1, wherein the temperature is equal to or lower than the maximum deposition temperature of a semiconductor layer up to a thickness of . 4 The first impurity doped layer is a-SiC:H layer or μc
-Si:H layer, the manufacturing method according to claim 2.