JPS61247270A - Control circuit for gate turn-off thyristor - Google Patents

Abstract

PURPOSE:To control bounce voltage, by providing a gate circuits of GTO thyristors connected in series, with respective positive gate current adjusting means. CONSTITUTION:Two GTO thyristors (hereinafter, GTO) 4, 5 are connected in series, and respectively to them, snubber circuits 4S, 5S are connected in parallel with each other. To the gate of the GTO 4, an ON-gate driving circuit 41 and an OFF-gate driving circuit 45 are connected, and the ON-gate driving circuit 41 is further provided with a positive gate current adjusting means 48. The gates of another GTO 5 are also build up in the same way as that of said gates. As the result, for example, the value of the positive gate current Ig of the GTO 4 for short turn-ON time is reduced by said adjusting means 48, and the turn-ON time is lengthened and is put close to the turn-ON time for the GTO 5, and the turn-ON time difference between the both GTOs 4, 5 is shortened. Besides, the turn-ON time difference may be reduced to zero.

Description

[Detailed description of the invention] [Technical field to which the invention pertains]

The present invention relates to a control circuit for gate turn-off thyristors when the gate turn-off thyristors are connected in series.

[Prior art and its problems]

When using gate turn-off thyristors (hereinafter abbreviated as GTO thyristors) connected in series, if there is a difference in the turn-on time when each GTO thyristor turns on, this turn-on time difference causes each GTO thyristor to This causes imbalance in the shared voltage. Here, the turn-on time when the GTO thyristor turns on means that a positive gate current is applied to turn on the GTO thyristor, and the anode voltage of the GTO thyristor increases from the time when the value reaches 10% of the current peak value. It is defined as the time required for the voltage to decrease to 10% of the off-voltage. Generally, semiconductor devices have variations in characteristics, and the above-mentioned turn-on times are not the same. FIG. 5 is a main circuit connection diagram of a DC cheatsaver device in which two GTO thyristors are connected in series. In this figure 5, 1
is a DC power supply, and the DC power from this DC power supply 1 is controlled by simultaneously turning on and off a switching circuit consisting of GTO thyristors 4 and 5 connected in series, and is applied to an inductive load 2. It will be done. A freewheeling diode 3 is connected in parallel to this load 2. Note that 9 is an anode reactor. Furthermore, a snubber circuit 4S formed by connecting a snubber capacitor 4C and a snubber resistor 4R in series and connecting a snubber diode 4D in parallel to the snubber resistor 4R is connected in parallel to the GTO thyristor 4, but the same applies to the GTO thyristor 5. A snubber circuit 5S formed of a snubber capacitor 5C, a snubber resistor 5R, and a snubber diode 5D is connected in parallel. FIG. 6 is an operating waveform diagram of each part of the circuit shown in FIG. 5, in which the horizontal axis is the time axis, and FIG.
shows the turn-on signal, and Figure 6 (b) shows the current I9 of the GTO thyristor 4 and the current of the snubber capacitor 4C! Figure 6 (c) shows the changes in the current ■ of the GTO thyristor 5 and the current IIC of the snubber capacitor 5C.
The operation of each part of the zero-order chipper, which shows changes in the voltages V and V, will be explained below with reference to FIGS. 5 and 6. Here, the turn-on time of the GTO thyristors 4 and 5 is respectively Tg, and it is assumed that Tgo<Tgs, that is, the turn-on time of the GTO thyristor 4 is shorter due to variations in element characteristics. At time to, a turn-on signal is applied to the gate II circuits of both GTO thyristors 4 and 5 at the same time (see Fig. 6, 0)).At this point, both GTO thyristors 4 and 5 are still in the off state, so GTO thyristors 4 and 5 are turned on. The voltage V# and vs
are almost equal voltage values of V- (see Figure 6)・(
(Refer to e)), mark time 1. When the GTO thyristor 4 has a short turn-on time, it starts turning on first, so the current that has started flowing through the GTO thyristor 4 is transferred to the snubber capacitor 5 of the GT0 thyristor 5, which is still in the off state.
C (see FIG. 6 (c)) and returns to the DC power supply l. Therefore, the voltage of this snubber capacitor 5C increases. Next, time 1. Then, the GTO with longer turn-on time
Thyristor 5 starts turning on and current flows! , begins to flow, but the current isc of the snubber capacitor 5C changes from positive to negative at time t3, and the voltage 1 of the GTO thyristor 5 begins to decrease (see Figure 6 (E)).
In this process, the voltage V of the GTO thyristor 5 reaches the maximum value V
, +ΔV, but both GTO thyristors 4 and 5 continue to conduct, and their voltages V# and VS become almost zero, ending their turn-on. The rising voltage value v in the above process. If +ΔV exceeds the allowable repeated off-voltage value of the GTO thyristor 5, the GTO thyristor 5 will be destroyed. This voltage increase ΔV increases as the turn-on time difference ΔTg between both GTO thyristors increases, so the risk that the off-voltage exceeds the allowable repeated off-voltage increases. Therefore, when using GTO thyristors connected in series, conventionally it was necessary to select and combine elements with the same turn-on time, or to reduce the voltage increase Δ of the off-voltage.
The GTO thyristor was prevented from being destroyed by taking measures such as increasing the inductance value of the anode reactor to reduce V. However, in the former method,
Not only is it troublesome to sort, which increases the price of the elements, but there are also drawbacks in terms of maintenance, such as the fact that it is not easy to replace the GTO thyristor, and the latter requires a high current capacity, high inductance value glue. For this reason, there are drawbacks such as the equipment becoming larger and more expensive.

[Purpose of the invention]

An object of the present invention is to provide a control circuit for a GTO thyristor that can suppress voltage jump caused by a difference in turn-on time when a plurality of GTO thyristors are connected in series.

[Key points of the invention]

This invention focuses on the fact that the turn-on time of a GTO thyristor strongly depends on the magnitude of the positive gate current for turning on the GTO thyristor, and the magnitude of the positive gate current at the time of turn-on can be adjusted. By doing so, the variation in the turn-on time of each GTO thyristor is reduced, thereby suppressing the voltage jump.

[Embodiments of the invention]

FIG. 7 is a graph showing the turn-on time characteristics of the GTO thyristor, where the positive gate current for turning on the GTO thyristor is 1 g, and the turn-on time is Tg.
, the vertical axis is this tg, and the horizontal axis is the positive gate current!
It is shown that the larger the positive gate current (8), the shorter the turn-on time Tg. FIG. 1 is a block diagram showing a practical example of the present invention, and the content of the present invention will be described below with reference to FIG. In FIG. 1, two GTO thyristors 4 and 5 are connected in series, and snubber circuits 4S and 5S are connected in parallel to each of the GTO thyristors 4 and 5, respectively. G
An on-gate drive circuit 41 is connected to the gate of the TO thyristor 4.
The off-gate drive circuit 45 is connected to the aFG.
When turning on the To thyristor 4, a positive gate current is supplied from the on-gate drive circuit 41.
This on-gate drive circuit 41 includes an on-gate pulse generator 42 and an on-gate pulse amplifier 43 that amplifies the pulse.
, and a positive gate current adjusting means 4B. Further, in order to turn on this GTO thyristor 4, a negative gate current is supplied from an off-gate drive circuit 45, and this off-gate drive circuit 45 is composed of an off-gate pulse generator and an off-gate pulse amplifier 47. The on-gate pulse generator 52 and the on-gate pulse amplifier 5 are also connected to the gate of the other GTO thyristor 5 in the same manner as described above.
3 and a positive gate current adjusting means 5B, and an off-gate drive circuit 55 comprising an off-gate pulse generator 56 and an off-gate pulse amplifier 57 are connected. By adjusting the current adjusting means 48 and 58, the turn-on time difference .DELTA.g between the two GTO thyristors 4 and 5 is brought close to zero. FIG. 2 is a graph of the turn-on time difference of the GTO thyristor in the embodiment shown in FIG. 1, where the vertical axis represents the turn-on time Tg, and the horizontal axis represents the positive gate current magnitude 1.
It's raining g. In FIG. 2, curve A is the characteristic of the GTO thyristor 4 with a shorter turn-on time, and curve B is the characteristic of the GTO thyristor 5 with a longer turn-on time. Since the gate drive circuits of GTO thyristors 4 and 5 have the same configuration as shown in FIG.
Even though the positive gate currents applied to the gates of GTO thyristors 5 and 5 have the same value of 81, the turn-on time of GTO thyristor 5 is 7 and the turn-on time of GTO thyristor 4 is T.
As already mentioned, a time difference of 67 g is generated, and this turn-on time difference ΔT causes a large voltage jump. Therefore, by decreasing the value of the positive gate current 1g of the GTO thyristor 4, which has the shorter turn-on time, from B to ^1, the turn-on time is increased from Tgs to Tgm, which brings the turn-on time of the GTO thyristor 5 closer to τg. Aiming to reduce the turn-on time difference Δτg. Furthermore, this turn-on time difference ΔTg can be made zero by appropriately adjusting the positive gate current 1g. On the other hand, if the value of the positive gate current of the GTO 5 with a longer turn-on time is made larger than B1 to approach the turn-on time tga of the GTO thyristor 4, ΔT can be reduced. By the way, the circuit equation of the gate drive circuit when turning on the GTO thyristor is expressed by the following equation (1). R・1. −Eg−Vt ・−−−−−−−−−
−−−−−−−−−−−−−−−−−−(1) Here, R
is the resistance value of the on-gate circuit, and 11. g is the gate power supply voltage, and Vt is the cross-contact voltage of the semiconductor of the on-gate circuit. From this equation (1), R As is clear from this equation (2), the positive gate current 1g
is approximately proportional to the gate power supply voltage Bg and inversely proportional to the circuit resistance R, so by making the gate power supply voltage variable or the circuit resistance variable, the value of the positive gate current Multiple connected GTOs
This makes it possible to reduce the turn-on time difference of the thyristors to zero, thereby suppressing the jump in the applied voltage. FIG. 3 is a circuit diagram showing an embodiment of the positive gate current adjusting means shown in FIG. 1. In FIG. 3, a variable voltage gate power supply 61, a transistor 62, and a circuit resistor 63 are connected to the gate of the GTO thyristor 6 to which the snubber circuit 6S is connected in parallel. By adjusting E8 in equation (2), the magnitude Ig of the positive gate current can be changed. FIG. 4 is a circuit diagram showing a second embodiment of the positive gate current adjusting means shown in FIG. 1. In this figure 4, the third
GTO with snubber circuit 7S connected in parallel as shown in the figure
A fixed voltage gate power supply 71, a transistor 72, and a variable resistor 73 are connected to the gate of the thyristorph, and by changing the resistance value of the variable resistor 73, the value of R in equation (2) described above changes. Positive gate current! − can be set to a desired value.

【Effect of the invention】

GTO thyristors used in series connection cause a voltage jump at turn-on due to variations in turn-on time due to variations in their characteristics, but when this jump voltage exceeds the allowable repeated off-voltage of the GTO thyristor, the GTO thyristor is destroyed. According to the present invention, by providing positive gate current adjustment means in each of the gate circuits of the GTO thyristors connected in series,
Since this surge voltage can be suppressed very easily, there is no risk of element destruction, so the conventional GTO thyristor selection work to match element characteristics is no longer necessary, preventing a rise in cost, and making it possible to replace the GTO thyristor in use. It is no longer necessary to take characteristics into account when doing so, which improves maintainability. Furthermore, since an anode reactor with a large current capacity and a high inductance value can be eliminated, the device also has the advantage of being easily miniaturized without increasing the cost of the device.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG.
The figure is a graph of the turn-on time difference of the GTO thyristor in the embodiment shown in Fig. 1, Fig. 3 is a circuit diagram showing an embodiment of the positive gate current adjustment means shown in Fig. 1, and Fig. 4 is the same as in Fig. 1. FIG. 6 is a circuit diagram showing a second embodiment of the illustrated positive gate current adjusting means; Figure 5 is a main circuit connection diagram of a DC chipper device that connects two GTO Cyrisks in series.
FIG. 6 is an operating waveform diagram of each part of the circuit shown in FIG. 5, and FIG. 7 is a graph showing the turn-on time characteristics of the GTO thyristor. l: DC power supply, 2: Load, 3: Freewheeling diode, 4.5, 6.7: GTO thyristor, 4C, 5C
: Snubber capacitor, 4D, 5D: Snubber diode,
4FI, sit snubber resistance, 4S, 5S, 6S, 73:
Snubber circuit, 9+ anode reactor, 41.51! On-gate drive circuit, 42.52: On-gate pulse generator, 43.53: On-gate pulse amplifier, 45.55
: Off-gate drive circuit, 46.56 : Off-gate pulse generator, 47.57 : Off-gate pulse amplifier, 4
8゜588 positive gate current adjustment means, 61: variable voltage gate power supply, 62.72 1) transistor, 63: circuit resistance, 71: fixed voltage gate power supply, 738 variable resistor. Cutting Koji Fig. 2 Fig. 4 S Suna j＼' times 2 each Fig. 5 Fig. 6 Fig. 7

Claims (1)

[Claims] 1) In a control circuit for a plurality of gate turn-off thyristors connected in series and driven by the same gate signal, in order to reduce turn-on time differences depending on variations in characteristics of individual gate turn-off thyristors. A control circuit for a gate turn-off thyristor, characterized in that the on-gate drive circuit of each gate turn-off thyristor is provided with means for adjusting the magnitude of a positive gate current at the time of turn-on. 2) A control circuit for a gate turn-off thyristor according to claim 1, wherein the positive gate current adjusting means is a voltage changing means for changing the power supply voltage of the on-gate drive circuit. 3) A control circuit for a gate turn-off thyristor according to claim 1, wherein the positive gate current adjusting means is a resistance changing means for changing the circuit resistance of the on-gate drive circuit.