JPS61245560A - Capacitor for semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To increase electrostatic capacitance per a unit occupying area by alternately superposing CVD insulating films in thickness of 200Angstrom or less and conductor films. CONSTITUTION:An n<+> layer 22 is formed to a p-type Si substrate 21, a high- temperature CVDSiO2 film 23 in thickness of 200Angstrom is deposited, a conductive poly Si film 24 in thickness of 2,000Angstrom is shaped, and a high-temperature CVDSiO2 film 25 is superposed again. A window is bored to the SiO2 film 25, and conductive poly Si 27 is formed. A high-temperature CVDSiO2 film 28 and conductive poly Si 29 are superposed and connected to the conductor film 24, and poly Si films and high-temperature CVDSiO2 films are similarly shaped alternately, thus manufacturing a capacitance. According to the constitution, a large electrostatic capacitance having high withstanding voltage and a small occupying area can be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improvements in capacitors for semiconductor integrated circuits.

[Summary of the invention]

The present invention provides a capacitor for semiconductor integrated circuits used in memory cells of dynamic RAM, etc.
By forming a multilayer structure in which seven CVD insulation layers of 00A or less and conductive films are stacked alternately, a large capacitance t can be achieved with a small occupied area.

[Conventional technology]

・In recent years, with the increasing integration of semiconductor integrated circuits, the area occupied by semiconductor integrated circuit capacitors used in dynamic RAM memory cells, etc. is small, and the capacitance alone is small. There is a demand for it to be made larger. To achieve this, the first step is to reduce the thickness of the electric conductor, but there are limits to how thin it can be, as pinholes may occur.

Therefore, if a multilayer structure is adopted in which conductor films and dielectric films are alternately stacked on a semiconductor substrate, the capacitance t can be increased by increasing the effective facing area of the cavity electrodes. Such a structure can be realized by using a polycrystalline silicon film as a conductive film and using a polycrystalline silicon oxide film obtained by subjecting its surface to a mature oxidation as a dielectric film.

[Problem that the invention seeks to solve]

However, this method had the following drawbacks. first,
When the polycrystalline silicon oxide layer is thinned, its dielectric strength drops significantly, and the n-current is large, so in practice it is only 1000 A.
The film thickness must be greater than 3. Further, in order to prevent the polycrystalline silicon film from disappearing after thermal oxidation of the surface and to ensure a constant film thickness, the film thickness must be practically 2000 μm or more. Therefore, when using a multilayer structure, the overall thickness of the capacitor becomes extremely thick.
The wires, etc., to be passed over it are cut n,'t-.

On the other hand, if the number of laminated layers is reduced to prevent step-cutting -rL+, the capacitance i
The gold cannot be made large enough and each layer must be made thin.
In this case, as described above, the dielectric strength voltage and current deteriorate.

[Problem t-Means for solving]

The present invention eliminates the disadvantages of forming the capacitor for semiconductor integrated circuits into a multilayer structure, and increases the capacitance per unit occupied area.

For this reason, the present invention is characterized in that the capacitor has a multilayer structure in which CVD insulating films and conductive films each having a thickness of 200 Å or less are stacked alternately.

[Effect]

In this invention, the dielectric film of the capacitor is not a polycrystalline silicon oxide film but an OV DP! Due to the use of IRmk, high-temperature CVs are formed at temperatures of 700°C or higher, for example.
D Even if the silicon oxide film is thinned, it has excellent dielectric strength, and since the 2"L current is small, the conductor film thickness can be reduced to t-200A or less. Furthermore, it is not a method of oxidizing the conductor film. Therefore, even if a CVD polycrystalline silicon film is used as the conductor film, the film thickness can be reduced to 2000A or less.Also, for the purpose of lowering the circuit resistance, high melting point metals and silicides are used. A conductive film can be used.
By using a CVD insulating film with a thickness of 2 oo'h or less, even if the capacitor has a multilayer structure, the overall thickness does not become too thick, so that no step cutting of wiring or the like is caused when passing over the capacitor. Therefore, since a multilayer structure can be formed, the capacitance i can be increased several times by increasing the number of laminated layers without increasing the area occupied by the capacitor in plan view.

Furthermore, as described above, the dielectric strength is superior to the rLjFli flow.

〔Example〕

The details of this invention will be explained below with reference to Examples.

FIG. 1 is a sectional view of a capacitor for semiconductor integrated circuits according to the present invention. The conductive films 13 and 14 are sandwiched between the CVD insulating film 15 and are placed on, for example, a P-type silicon substrate 11.
They are layered alternately on top. In addition, the isoelectric film 13 is
It is electrically connected to the Zn electrode 16, and the conductor film 14 is connected to it.
The L, N, and n electrodes 17 are electrically connected to the n-electrode 17, and the nfcn, which is electrically connected to the diffusion layer 12, is formed on the surface of the substrate 11, thereby forming the middle layer of the multilayer structure. In this structure, the capacitance is determined by the total area of the 90'VD insulation sandwiched between one conductor film and the substrate. For example, if the thickness of the Aj wiring that passes over the capacitor is 1 μm, even if 5 layers are laminated with a conductor film thickness of 2000 A, the capacitance will be The overall thickness is only about the same thickness as the thickness of the shell.

Next, a second method of manufacturing a capacitor according to the present invention will be described.
This will be explained using Figures--(b). First, for example, an n+ diffusion layer 22 is provided on the surface of a P-type silicon substrate 21 by ion implantation, and then a high-temperature CVD silicon oxide film 23 (formed at a temperature of 700° C. or higher), which becomes the first dielectric film, is formed. For example, it is deposited to a thickness of 200 A) (see FIG. 2 (b)).

Next, a polycrystalline silicon film (for example, 200 mm thick) is deposited on top of it.
After forming the first conductor film 24t by depositing the conductor film 24t and 'r'L'fC, the second layer is deposited at a high temperature of 0m). Deposit a VD silicon oxide film 25 (see FIG. 2).

Next, high-temperature CVD silicon oxidation was applied to the parts of the second layer conductor film so that it could be electrically connected to the n-type mineral dispersion layer, and which would not be electrically connected to the first layer conductor film array. N
't- After selectively removing and exposing a part of the exogenous diffusion layer 22, a polycrystalline silicon film is deposited and buttered to form a conductor film 27 (see FIG. 2(C)). ].

Thereafter, after depositing the high-temperature CVD silicon acid ratio film 28, the eighth layer conductor film 4 is electrically connected to the first layer conductor film (see FIG. 2(a)), and the fourth layer The conductive film for the eyes is the second conductive film nl! - The capacitor gold according to the present invention can be manufactured by alternately forming polycrystalline silicon films and high-temperature CVD silicon oxide films so as to be electrically connected. In this example, the layers were stacked while making electrical connections between the conductive films of each layer. However, when stacking the layers, only the conductive film was patterned, and finally all the conductive films were An electrical connection can also be made. In addition, high temperature CVD
The explanation has been given using silicon oxide oxidation flame crystalline silicon film as an example, but there are also silicon nitride films and oxidation films formed by the CVD method as examples of CVD resistance. Nitride film etc.
As the conductive film, a high melting point metal or its silicide can be used.

FIG. 8 is a cross-sectional view of an embodiment of a capacitor for a semiconductor integrated circuit according to the present invention used in a memory cell of a fully dynamic RAM. In FIG. 8, 31 is, for example, a P-type silicon substrate, and 32 is an oxide film in the element isolation region. ′! ! :ri33
, 34 and 3 are the gate electrode of the transistor and the two raw mineral dispersion layers, respectively electrically connected to the word @ 36, the bit line and the electrode 38 of the capacitor 37. . In such a dynamic RAM memory cell, the area occupied by the capacitor can be reduced, and only its capacitance can be increased, so that it can be highly integrated and has excellent memory retention characteristics.

〔effect〕

As described above, according to the present invention, a capacitor for a semiconductor integrated circuit consisting of a multilayer structure with high dielectric strength, a small footprint, and a large capacitance can be provided with a step-cut R' such as an At wiring that is completely passed through the capacitor. This can be achieved without any hassle. Therefore, when the capacitor for a semiconductor integrated circuit according to the present invention is used in a memory cell or the like of a fully dynamic RAM, it is possible to achieve high integration.

[Brief Description of the Drawings] Fig. 1 is a cross-sectional view of a capacitor for semiconductor integrated circuits according to the present invention, and Fig. 2 n) to (F) are cross-sectional views in the order of steps of a method for manufacturing a capacitor for semiconductor integrated circuits according to this invention. 8 are cross-sectional views of a memory cell of a dynamic RAM to which the capacitor for semiconductor integrated circuits according to the present invention is applied. Above Figure 1 87 Capacitor Figure 3 A mano ψshita Q manufacturing formula of the second world Figure 2

Claims (4)

[Claims] (1) A capacitor for a semiconductor integrated circuit, which is a thin film capacitor formed on a semiconductor substrate and has a multilayer structure in which CVD insulating films and conductive films each having a thickness of 200 Å or less are stacked alternately. (2) The capacitor for a semiconductor integrated circuit according to claim 1, wherein the CVD insulating film is a high temperature CVD silicon oxide film formed at a temperature of 700° C. or higher. (3) A capacitor for a semiconductor integrated circuit according to claim 1 or 2, wherein the conductor film has a thickness of 2000 Å or less. (4) A capacitor for a semiconductor integrated circuit according to any one of claims 1 to 3, wherein the conductor film is a polycrystalline silicon film.