JPS61240794A - Method and circuit for reversing time base of chroma signal - Google Patents

Abstract

PURPOSE:To reverse the time base of a chroma signal without confusing hues of chroma signals by writing the above signals to one horizontal period memory and by reading from a contrary direction to that of a writing order, while data for continuous two clocks are read repeatedly in the same order of its writing. CONSTITUTION:Analog composite video signals V1 are supplied an input terminal 19. An A/D converter 20 allows the signals V1 to be quantized by clocks which are 4 times sub-carrier frequencies and an obtained digital video signal DV1 are supplied switches SW 1 and 2. Then the switches SW 1 and 2 are turned to ON/OFF alternately and the signal DV1 is written alternately to one horizontal period memories 21 and 22. Outputs of the memories 21 and 22 are supplied SW 3 and 4. For data corresponding to a sketching period in case of reading the data in the memories 21 and 22, data for two clocks, in case of writing, are read on a whole in a reverse forward direction, while they are read repeatedly in the same order of writing. Thus the time base can be reversed without confusing hues of the chroma signals.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field of aAO technology] The present invention relates to a method for inverting the time axis of a chroma signal and a circuit thereof.

[Technical background of the invention]

A technology has been developed that inverts the time axis of a video signal to obtain a mirror image on the playback screen.

The time axis of the video period T of the composite video signal (for example, NT8C system) shown in FIG. When the composite video signal VB is obtained, a mirror image can be obtained on the playback screen. Inverting the signal P1 of the video period T to obtain the signal P2 can be achieved by using a storage element capable of storing a signal of one horizontal period and address control means for the storage element.

Now, symbols are attached on the time axis, and the starting point of one horizontal period is designated as a, and the ending point is designated as d. V insertion into the memory element is point 8
The reading is carried out in the forward direction as point 0, point 9, point C1, point d, and reading is carried out in the forward direction, as shown in FIG.
It is done as follows. In this way, when the reading order of the video period is performed in the opposite direction to the writing time, it is possible to obtain a left-right inverted version of the video signal.

As described above, it is possible to obtain a horizontally inverted video signal, but a problem remains regarding the chroma signal superimposed on the luminance signal.

Hereinafter, the phase state of the chroma signal will be explained with reference to FIG. 6.

Figure 6 (g) shows the chroma signal before being horizontally inverted, and the modulation axes of the picture area chroma signal are R-Y, B
This is an example in which -Y, -(RY), and -(B-4) are repeated as fakes. If this is horizontally reversed, R
- When the readout phase is aligned with the Y axis, the phase of the picture area four-ma signal is R-Y, as shown in Figure 6 (03).
-(B-Y), -(R-Y).

The order is B-Y..., and the sign of B-Y is reversed. Also, if the phase matches the B-Y axis, the modulation axis of the picture area chroma signal is - as shown in Figure 6 (C).
(RY), B-Y, RY.

-(B-Y)..., and the sign of the RY axis is reversed compared to the one before reversal.

As a result, when a horizontally inverted video signal is reproduced, color disturbance occurs.

[Purpose of the invention]

The present invention has been made in order to address the above-mentioned circumstances, and an object of the present invention is to provide a time axis inversion method for a chroma signal and a circuit therefor, which realizes horizontal inversion without disturbing the hue of the chroma signal.

[Summary of the invention]

In this invention, the chroma signal is digitized and written into the memory for one horizontal period, and when reading out the picture period in the opposite direction to the writing order, the data for two consecutive clocks is repeated in the same order as when writing. Reading is performed in the opposite direction to the writing order, keeping the arrangement order of the modulation axes the same as the standard one.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which an analog composite video signal is supplied to the long sword terminal 19. The analog-to-digital converter 2o converts the composite video signal v1 into 4 fsc
(fmc; subcarrier frequency) clock to quantize to about 3 bits. The digital video signal DV obtained from the analog-to-digital converter 2o is supplied to switches 8W7 and 8W2. Switch SWI and S
W2 is alternately turned on and off every horizontal period.
For example, on an even number line, switch 8 W J is turned on and switch S W , ? is off, and on odd-numbered lines, the switch SWI is off and the switch SW2 is on. The output of switches 8Wz and 8Wl is 1 horizontal period memo') 21
, 22, respectively.

When the switch S W Z is on and the switch S W 2 is off, the one horizontal period memory 21 is in the write mode and the one horizontal period memory 22 is in the read mode. Further, when the switch SWI is off and the switch SW2 is on, the write mode and read mode are exchanged. The addresses of the memories 21 and 22 for one horizontal period are stored on the address bus 2.
4.degree. 25, respectively designated by the address control circuit 23.

1 horizontal period Note') 21.22 a force signals are supplied to switches 8W3, 8W4, respectively.

When the one horizontal period memory 21 is in the write mode and the one horizontal period memory 22 is in the read mode, the switch SW
3 is off, and switch 8W4 is on. Further, when the one horizontal period memory 21 is in the read mode and the one horizontal period memory 22 is in the write mode, the switch SW3 is on and the switch SW4 is off. Therefore, switch S
The output signals of W3 and SW4 are supplied to a digital-to-analog converter 26 as continuous digital video signals.

This digital-to-analog converter 26 performs digital-to-analog conversion processing and obtains an analog composite video signal at an output terminal 27.

Here, in the present invention, the write direction and read direction of the memories 21 and 22 can be freely switched for one horizontal period. Therefore, if the write address order and the read address order of each memory 21 and 22 are reversed in the video period, the read digital video signal becomes a horizontally inverted signal and becomes a mirror image on the screen.

Next, the inversion processing of the composite video signal will be further explained with reference to FIG.

The composite video signal 30k (shown in FIG. 2 (5)) before left-right inversion has a blanking period TI, T3 and a video period T2.
has. Moreover, the burst signal 31 is included in the blanking period TI, and the horizontal synchronization signal 32 is included in the blanking period 3. Furthermore, in the video period T2, there is a video signal in which a chroma signal 35 is superimposed on a luminance signal 34. A signal obtained by inverting the time axis of the video period T2 of this composite video signal 30 is a horizontally inverted composite video signal 30B shown in ) in FIG.

The composite video signal 30 includes an analog-to-digital converter 20.
Since it is quantized with a clock of 47'se,
As shown in FIG. 2 (5), one horizontal period is divided into 910 parts. The blanking period TI is from 1 to m (m: integer), and the video period T2 is from m + 1 to n (n: integer)
Until then, the blanking period T3 is from n+1 to 910. The numbers from 1 to 910 are stored as they are at the addresses of the memory 21 and 22 for one horizontal period.

In each write mode of the memory 21, 22 for one horizontal period, addresses are performed in normal order from 0 to 910. In the read mode, addresses 0 to m are performed in normal order, addresses 9m+1 to n are performed in oscillating reverse order, and addresses from n+1 to 910 are performed in normal order.

Here, it is assumed that the method of specifying addresses from m+1 to n is in reverse order due to vibration, and the meaning thereof will be further explained. In other words, data for two consecutive clocks in the forward direction form a pair, (n-1, n) * (n -3o n-
2) * (n-5, n-4) + (n-7en-6)
・・・・・・(m + 3, m + 4) +(
m+1, m+2), and so on in reverse order. The address control circuit 23 is composed of, for example, a ROM, and can obtain address data simply by applying a clock.

Therefore, when the change in the write address and the change in the read address are shown in a graph, it becomes K as shown in FIG. Addresses m+1 to n are in normal order when writing, but when reading, two addresses are in normal order,
By repeating this process, it will change in the reverse and forward direction.

When the read address is controlled as described above, the phase relationship of the modulation axes of the horizontally inverted chroma signal is as shown in FIG.

That is, FIG. 4 (^ is the chroma signal before being inverted horizontally, in the figure) is the chroma signal after being inverted. The modulation axis at each phase position of the chroma signal of the same figure is determined by the burst signal. Now, the position of Ql is R
-Y, Ql is B-Y.

It is assumed that Q3 corresponds to the phase of the -(R-Y) axis and Q4 corresponds to the phase of the -(B-Y) axis, and that these are repeated.

When this chroma signal is stored in the memory for one horizontal period and read out next time, Q s + Q J "I Q 7- Q 8eQ5
．． Q6. Q3. Q4. It is read out in the order of Ql and Ql.

Therefore, when this data is arranged, it becomes as shown in the same figure (Bl). Then, when looking at the modulation axes of each Q9 to Q2, Q9
is R-Y, QIO is B-Y, Q7 is -(R-Y),
Q6 becomes -(B-Y) and this is repeated. The direction of change of this modulation axis is the same as the standard one.

Therefore, the hue will be the same as the chroma signal before inversion,
The hue will not be disturbed.

〔Effect of the invention〕

As described above, the present invention can provide a method and a circuit for inverting the time axis of a chroma signal, which contributes to obtaining a horizontally inverted image without disturbing the hue.

[Brief explanation of the drawing]

FIG. 1 is a configuration explanatory diagram shown to explain one embodiment of the present invention, FIG. 2 is a video signal waveform diagram shown to explain the operation of the circuit in FIG. 1, and FIG. FIG. 4 is an explanatory diagram showing the chroma signal phase and modulation axis shown to explain the chroma signal processing operation of the present invention. FIG. FIG. 6 is a signal waveform diagram shown to explain the time axis inversion, and FIG. 6 is a chroma signal and modulation axis explanatory diagram shown to explain the problem that occurs when the time axis of the chroma signal is inverted. 20...Analog-digital converter, 21.22...
1 horizontal period memory, 23...address control circuit, 26
...Digital analog converter, SW1 to SW4...
switch. Applicant's representative Patent attorney Takehiko Suzue Cause 1 Figure 2 (A) (B) 1 mn m÷1 n
+1910 Figure 3 t21? >Formula Address - Figure 4 Figure 5 (A) CB) Figure 6

Claims (2)

[Claims] (1) The orthogonally modulated chroma signal is digitized and sequentially written into one horizontal period memory, and when reading the data in the horizontal period memory, the data corresponding to the picture period is written for two clocks in the writing order. A method for inverting the time axis of a chroma signal, which is characterized in that the process is repeated in the same order as writing, and the entire process is read out in the reverse forward direction. (2) an analog-to-digital converter for converting an analog composite video signal into a digital composite video signal; and an analog-to-digital converter for alternately supplying the output of the analog-to-digital converter for one horizontal period to first and second one-horizontal-period memories. 1 switch means; means for providing write address data to a memory selected by the first switch means among the first and second 1-horizontal period memories;
The read address data is given to the memory on the non-selected side of the horizontal period memory by the first switch means, but the address for the video period data is given in the opposite direction to the writing time, and the address for two clocks is given as the writing time. A time axis inverting circuit for a chroma signal, comprising means for repeatedly changing the data in the same direction, and means for digital-analog converting the output data from the first and second one-horizontal period memories. .