JPS61240621A - Semiconductor ceramic composition and semiconductor ceramicsand capacitor using the same - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention is directed to a grain boundary insulated type which has improved electrical properties, particularly a small temperature coefficient, a high dielectric constant, and is easy to handle. The present invention relates to a composition for semiconductor ceramics, a grain-boundary insulated semiconductor ceramic, and a capacitor using the composition.

[Conventional technology]

In recent years, with the miniaturization of electronic circuit boards and electrical equipment, capacitors, which are one of the electronic components, are desired to be smaller and have higher performance, and materials are being actively developed. Among them, BaTiO3-based semiconductor porcelain compositions have a very large dielectric constant of 5 x 104 to 7 x 104, and S
r T i O3-based semiconductor ceramic compositions are attracting attention.

[Problem that the invention seeks to solve]

However, when a BaTiO3-based semiconductor ceramic composition is used, the voltage dependence of capacitance is large, the temperature change rate of capacitance is large, waveform distortion occurs, and noise is generated due to electrostriction. However, there are disadvantages such as large dielectric loss under high voltage AC, large change over time, and susceptibility to thermal shock.

On the other hand, the S rTi03-based semiconductor ceramic composition is based on BaT
Compared to the iO3 type, it has a lower dielectric constant and has the disadvantage that process control in manufacturing capacitors is extremely difficult.

Furthermore, in the case of the 5rTiO3 system, although the temperature change rate of capacitance is smaller than that of the BaTiO3 system, it is still not sufficient, especially in the recent era of rapid advances in electronic technology. In order to obtain more sophisticated and high-performance devices, it is necessary to consider the direction of the initial characteristics, including the above-mentioned characteristics.

In particular, there is a strong desire to develop capacitors that have a high dielectric constant and a small temperature coefficient of the dielectric constant. However, when using conventional capacitor materials, the relationship between the dielectric constant and its temperature coefficient is As you increase the value of the temperature coefficient, the value of the temperature coefficient increases, and conversely, as you decrease the value of the temperature coefficient,
The dielectric constant was said to be smaller.

In addition, grain boundary insulated semiconductor porcelain formed using conventional materials also has the disadvantage of being easily broken.

〔the purpose〕

The present invention has been made in view of the above points, and the present invention is directed to a grain boundary insulated composition for semiconductor porcelain whose properties are significantly improved compared to conventional ones, and a grain boundary insulated composition using the composition. The purpose is to provide semiconductor equipment and capacitors.

Another object of the present invention is to provide a composition for grain-boundary insulated semiconductor porcelain that has improved electrical characteristics, and a grain-boundary insulated semiconductor porcelain and a capacitor using the composition.

Still another object of the present invention is to provide a grain-boundary insulated semiconductor ceramic and a capacitor having a high dielectric constant and a small temperature change rate.

Another object of the present invention is to provide grain boundary insulated semiconductor devices and capacitors that are extremely easy to control during manufacturing.

[Means for solving problems]

The composition for semiconductor ceramics of the present invention comprises M g T i O3
is 16.5-75-7O%, 5rTi03 is 26.5~
80 m o 1%, o, oi ~ 0.2 mo 1% of an element selected from earth elements or elements belonging to No. 51y of the periodic table as a grain interface improver and a valence control agent. It is characterized by containing.

Further, the semiconductor device and capacitor of the present invention are characterized by having the following configuration as a main configuration.

[For production]

With the above configuration, it is possible to significantly improve the characteristics, especially the direction of the electrical characteristics, I-, and to make the manufacturing process control extremely easy.

〔Example〕

MgTiO3, which is one of the constituent materials in the present invention, generally has a positive temperature coefficient of dielectric constant and Q
Although it is a material that has the disadvantage of having a large value of , but a low dielectric constant, according to the results of intensive research by the present inventors, it has a negative temperature coefficient and a high dielectric constant, making it easy to convert into semiconductor porcelain. In addition to the coexistence with 5rTi03 in a specific amount range, the addition of a grain interface modifier and a valence control agent results in a high dielectric constant that was unexpected when each was used alone, and a Thus, it is possible to obtain a grain boundary insulated semiconductor porcelain or a grain boundary insulated capacitor in which the rate of change in dielectric constant with temperature is extremely small.

Furthermore, even if there is variation in the amount of the diffusion material applied to the sheet metal during manufacturing, the effect on the properties is extremely small, making process control extremely easy.

M g T i O3 and 5r, which is one of the features of the present invention
The blending amount of Ti03 is limited to the above-mentioned value for the following reason.

That is, when M g T i 03 is less than 16.5 m01% or 5rTiOa is more than 80 m01%, the absolute value of the temperature coefficient becomes large, and M g T jO3 becomes 7
0mQ1% or 5rTj03 is 26.5m
When o is less than 1%, the dielectric constant decreases significantly. For these reasons, the amounts of MgTiO3 and 5rTi03 are preferably limited to the above range.

In the present invention, in order to provide an insulating region, that is, an insulating crystal grain boundary layer at the crystal grain boundaries of the semiconductor ceramic to be formed, the crystal grain boundary layers include, for example, Ca, Cr, Mn, Cu, and At least one type of Tu is added as an insulating additive.

These insulating additives are usually applied to the surface of second-fired half- and nine-piece porcelain, which is created by performing a second firing process.
It is applied in the form of an oxide in the form of a paste or solution, and then diffuses into grain boundaries during secondary firing to provide insulation.

At this time, in the present invention, S i02.

By adding a grain interface modifier such as B i 2O3, it is possible to improve the dielectric properties of semiconductor ceramics and capacitors obtained.

The function of this grain interface improver is that after the insulation additive is applied to the surface of the semiconductor porcelain to be fired, it is fired in air.
When diffusing the above-mentioned insulating additive into the grain boundaries, it is thought that by uniformly diffusing the insulating additive to the grain boundaries and to the diffusion surface, properties are stabilized and made uniform. It will be done.

In the present invention, the amount of the grain interface improver added is appropriately determined as desired, but in the case of SiO2, it is preferably 0.3 to 6.5 m o 1%, B i 2O
In the case of 3, preferably 0.02 to 0.14 mo1%
It is said that

SiO2 as grain interface modifier. Bi2O3 may be used alone or in a mixture of both, but it is preferable to add at least SiO2, and more preferably to use a mixture of both in a desired amount range. is desirable.

When using a mixture of SiO2 and B i 2O3,
The amount added may be within the same range as in the case of each component alone.

In the present invention, SiO2 and B i as grain interface modifiers
In the case of SiO2, when the ellipticity of 2O3 is below this amount range, the absolute value of the temperature coefficient tends to increase and the Q value decreases, and when it exceeds it, the dielectric constant tends to decrease by 1 inch. In the case of Bi2O3, it is desirable to have the amount in the above range because it tends to show at least a decrease in dielectric constant and an increase in the absolute value of the temperature coefficient. be done.

The valence control agent used in the present invention is an element belonging to Group 5 of the periodic table, especially Nb.

Suitable components include vanadium elements such as Ta, nitrogen group elements such as sb, and rare earth elements such as Y, La, and Ce, and these are usually used in the form of oxides.

The valence control agent is not limited to one type, but may be used in plural types, but preferably, it is a rare earth element, or a valence control agent from the fifth group of the periodic table.
It is desirable to have multiple types of group elements.

The amount of the valence control agent to be added is determined as desired depending on the requirements t1 of the conductor porcelain or capacitor to be produced, but semiconductor formation can be performed by firing treatment in a reducing atmosphere. It is set at 0.01 to 0.2 mol% because if it deviates from this ml range, it becomes extremely difficult to convert it into a semiconductor by firing in a reducing atmosphere.

1 and 2 show an example in which the present invention is applied to a grain boundary insulated semiconductor ceramic capacitor. FIG. 1 is a schematic perspective view of a capacitor, and FIG. 2 is a schematic cross-sectional partial view.

The capacitor shown in the figure has Afl on the upper and lower surfaces of a grain boundary insulated semiconductor ceramic fi12, respectively.

Electrodes FjAll (only two electrodes are shown in the figure) made of Au, Ag, Ni, etc. are provided.

The semiconductor ceramic layer 12 contains a large number of semiconductor ceramic crystal grains 22 with dielectric layers (insulator regions) 21 formed at grain boundaries interposed therebetween.

The size of the crystal grains 22 is appropriately determined depending on the required electrical properties, the amount of constituent components, firing conditions, etc., but is usually 1 pLm to loOgm, preferably 2 pLm.
It is desirable that the thickness be ~80μ, m.

Practical Example - Risho In order to obtain semiconductor porcelain with the composition ratio shown in Table 1,
Each raw material was weighed and pulverized and mixed in a wet ball mill for 12 hours. After drying this product, a small portion of polyvinyl alcohol was added as a binder, and it was granulated into 24 to 80 meshes, and molded into a disc with a diameter of 20 mm and a thickness of ff0.8 mm using a hydraulic press.

Next, this molded disk was calcined at 950° C. for 1 hour at atmospheric pressure to burn off the binder. After cooling this product to room temperature, it was fired at 1360° C. for 12 hours in a reducing atmosphere consisting of 70% nitrogen and 30% hydrogen by volume.

Approximately 30 mg of Pase I, which is a mixture of CuO and varnish at a weight ratio of 1:I, was applied to the semiconductor porcelain thus obtained, and the mixture was fired in air at 12.50°C for 1 hour to form an insulating layer at the grain boundaries. did. Gold was deposited on the flat surface of this material by vapor deposition to form a capacitor as an electrode, and the electrical characteristics of each material were measured. The results are shown in Table 2.

As illustrated in Tables 1 and 2, the grain boundary insulated semiconductor ceramic composition that satisfies the composition within the scope of the present invention has a temperature coefficient of dielectric constant of 1130 to 1Oppm/'O. On the other hand, it has a dielectric constant of 640 to 880, which is extremely high compared to the conventional one, and furthermore, it is extremely easy to control the manufacturing process, so it is useful in industry.

Furthermore, it was confirmed that other electrical characteristics were also improved compared to the conventional ones.

No.-11-11↓-jl (J sold) *: 1 to 22 represent Examples, and samples 23 to 30 represent one night.

Calculated from the measured value.

〔Effect of the invention〕

As can be seen from the explanation below, according to the present invention, the temperature change rate of the dielectric constant is small due to the high dielectric constant, easy process control for H-manufacturing-1, and excellent reproducibility. Semiconductor porcelain and capacitors can be obtained at low cost.

In addition, it is less likely to break than conventional grain-boundary insulated semiconductor porcelain, and is extremely easy to handle when processed into capacitors, etc. In addition to the above-mentioned characteristics and manufacturing process control, Also - "karma" - extremely useful.

[Brief explanation of the drawing]

FIG. 1 is a schematic perspective view of a capacitor, and FIG. 2 is a schematic cross-sectional partial view of the capacitor shown in FIG.

Claims (16)

[Claims] (1) (a) MgTiO_3 16.5-70 mol%
, (b) SrTiO_3 26.5 to 80 mol%, (c) grain interface modifier, and (d) 0.01 to 0.0% of an element selected from rare earths or elements belonging to Group 5 of the periodic table. A composition for semiconductor ceramics containing 2 mol%. (2) The composition for semiconductor ceramics according to claim 1, wherein the grain interface improver is SiO_2. (3) The composition for semiconductor ceramics according to claim 1, wherein the grain interface improver is Bi_2O_3. (4) The composition for semiconductor ceramics according to claim 1, wherein the rare earth element is selected from Y, La, and Ce. (5) Elements belonging to Group 5 of the periodic table are Nb, Sb, and T.
The composition for semiconductor ceramics according to claim 1, which is selected from a. (6) (a) MgTiO_3 16.5-70 mol%
, (b) SrTiO_3 26.5 to 80 mol%, (c) grain interface modifier, and (d) 0.01 to 0.0% of an element selected from rare earths or elements belonging to Group 5 of the periodic table. 2 mol %, and has a large number of semiconducting crystal grains in which insulator regions are formed at grain boundaries. (7) The insulator region contains Ca, Cr, Mn, Cu and T.
7. The semiconductor porcelain according to claim 6, which contains at least one selected from the following. (8) The semiconductor porcelain according to claim 7, wherein the grain interface improver is SiO_2. (9) The semiconductor porcelain according to claim 7, wherein the grain interface improver is Bi_2O_3. (10) The semiconductor ceramic according to claim 7, wherein the rare earth element is selected from Y, La, and Ce. (11) Elements belonging to Group 5 of the periodic table are Nb, Sb,
The semiconductor ceramic according to claim 7, which is selected from Ta. (12) A pair of electrodes, sandwiched between these electrodes, (a) 16.5 to 70 mol% of MgTiO_3, (b) 26.5 to 80 mol% of SrTiO_3, (c) a grain interface modifier, and (d ) A large number of semiconducting materials containing 0.01 to 0.2 mo1% of rare earth elements or elements selected from Group 5 of the periodic table, and insulating regions are formed at grain boundaries. A capacitor comprising a layer having crystal grains. (13) The capacitor according to claim 12, wherein the grain interface modifier is SiO_2. (14) The capacitor according to claim 12, wherein the grain interface modifier is Bi_2O_3. (15) The capacitor according to claim 12, wherein the rare earth element is selected from Y, La, and Ce. (16) Elements belonging to Group 5 of the periodic table are Nb, Sb,
The capacitor according to claim 12, wherein the capacitor is selected from Ta.