JPS6123389A - Wiring system - Google Patents

Wiring system

Info

Publication number
JPS6123389A
JPS6123389A JP59143590A JP14359084A JPS6123389A JP S6123389 A JPS6123389 A JP S6123389A JP 59143590 A JP59143590 A JP 59143590A JP 14359084 A JP14359084 A JP 14359084A JP S6123389 A JPS6123389 A JP S6123389A
Authority
JP
Japan
Prior art keywords
wiring
grid point
grid
prohibited
storage means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59143590A
Other languages
Japanese (ja)
Inventor
眞一 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP59143590A priority Critical patent/JPS6123389A/en
Publication of JPS6123389A publication Critical patent/JPS6123389A/en
Pending legal-status Critical Current

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  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は配線基板における配線方式に関する。[Detailed description of the invention] 〔Technical field〕 The present invention relates to a wiring method on a wiring board.

〔従来技術〕[Prior art]

た。したがって、ある長さ以上平行して配線される場合
には、互いの配線同志が電気的に影響し合い、電気回路
が正しく動作しガいため人手で配線を修正し々ければな
らないという欠点があった。
Ta. Therefore, if the wires are wired in parallel over a certain length, the wires will affect each other electrically, making it difficult for the electrical circuit to operate correctly, which has the disadvantage that the wires must be manually corrected frequently. Ta.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、配線した線に対してその線から任意の
配線格子をおかすことができるようにした配線方式を提
供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a wiring system in which an arbitrary wiring grid can be placed on a wired line.

〔発明の構成〕[Structure of the invention]

本発明の配線方式は、接続すべき配線格子点データを記
憶する配線格子点データ記憶手段と、線分の線長に対す
る配線禁止格子数を記憶する配線禁止格子数記憶手段と
、各配線格子点が配線禁止格子点か否かの属性を記憶す
る格子点属性記憶手段と、配線格子点データ記憶手段か
ら接続すべき配線格子点データを逐次取出して、格子点
属性記憶手段の属性を参照しながら配線する配線手段と
、配線手段による配線結果の線を線分に分割し、配線禁
止格子数記憶手段から各線分に対する配線禁止格子数を
得、当該線分に対する配線禁止格子点を発生し、格子点
属性記憶手段における当該配線格子点の属性を配線禁止
格子点とする配線禁止格子点検出手段と配線結果を出力
する配線データ出力手段とを有する。
The wiring system of the present invention includes a wiring grid point data storage means for storing wiring grid point data to be connected, a wiring prohibited grid number storage means for storing the number of wiring prohibited grids for the line length of a line segment, and each wiring grid point. While sequentially retrieving the wiring grid point data to be connected from the grid point attribute storage means that stores the attribute of whether or not is a wiring prohibited grid point and the wiring grid point data storage means, and referring to the attributes of the grid point attribute storage means. The wiring means for wiring and the line resulting from the wiring by the wiring means are divided into line segments, the number of wiring prohibited grids for each line segment is obtained from the wiring prohibited grid number storage means, the wiring prohibited grid points for the line segment are generated, and the grid is divided into line segments. It has a wiring prohibition grid point detection means that sets the attribute of the wiring grid point in the point attribute storage means as a wiring prohibition grid point, and a wiring data output means that outputs the wiring result.

〔実施例〕〔Example〕

以下、図面を参照しながら本発明の詳細な説明する。第
1図は本発明の一実施例に係る配線処理方式のブロック
図である。
Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of a wiring processing method according to an embodiment of the present invention.

配線格子点データ記憶手段1はメモリ素子または磁気フ
ァイルによ多構成され、接続すべき配線格子点(始点、
終点)の位置データが表−1に足表  −1 子または磁気ファイルにより構成され、線分の各線長の
範囲に対す為配線禁止格子数が表−2に示すよう々テー
ブル形式で格納されている。
The wiring grid point data storage means 1 is composed of a memory element or a magnetic file, and stores wiring grid points (starting points, starting points, etc.) to be connected.
The position data of the end point) is shown in Table 1. The data is composed of child or magnetic files, and the number of wiring prohibited grids for each line length range of the line segment is stored in table format as shown in Table 2. There is.

 B − 表−2 格子点属性記憶手段Bには配線基板の全格子点について
その属性、すなわち配線可能な(空き)配線格子か配線
不可能な(配線禁止あるいは既配線の)配線格子かをそ
れぞれ示す@0″または”l”の情報が表−8に示すよ
うなテーブル形式配線手段4は配線格子点データ記憶手
段1から接続すべき配線格子点(始終点)のX座標、X
座標をシーク・ナンバ1から逐次取出して、格子点属性
記憶手段8の表−8を参照しながら配線可能な格子点を
捜して配線する。配線ができたなら配線データとして、
配線ができなかったら未配線データとして配線データ出
力手段6へ送る。さらに、配線ができたら、配線結果を
配線禁止格子点発生・手段5へ送る。
B - Table-2 Grid point attribute storage means B stores the attributes of all the grid points on the wiring board, that is, whether they are a wiring grid that can be routed (vacant) or a wiring grid that cannot be routed (wiring prohibited or already wired). The table-format wiring means 4, in which the information of @0" or "l" shown in Table 8, retrieves from the wiring grid point data storage means 1 the X coordinates,
The coordinates are sequentially taken out from seek number 1, and while referring to Table 8 of the grid point attribute storage means 8, a grid point that can be wired is searched for and wired. Once the wiring is completed, as wiring data,
If the wiring cannot be completed, it is sent to the wiring data output means 6 as unwired data. Further, when the wiring is completed, the wiring result is sent to the wiring prohibition grid point generation/means 5.

配線禁止格子点発生手段5では、配線結果の線を線分に
分割しそれぞれの線分に対して配線禁止格子数記憶手段
2の表−2を参照して当該線長の範囲に対する配線禁止
格子数を見つけ、当該線分に対する配線禁止格子点を発
生し、格子点属性記憶手段80表−8の当該配線格子点
の属性を11”にする。
The wiring prohibition grid point generation means 5 divides the line resulting from the wiring into line segments, and for each line segment, refers to Table 2 of the wiring prohibition grid number storage means 2 to determine the wiring prohibition grid point for the line length range. The number is found, a wiring prohibition grid point for the line segment is generated, and the attribute of the wiring grid point in the grid point attribute storage means 80 Table-8 is set to 11''.

以上の配線手段4および配線禁止格子点発生子次行なわ
れる。このようにして配線できた格子点データと配線で
きなかった格子点データが配線データ出力手段6から出
力される。
The above wiring means 4 and wiring prohibited grid point generator are then carried out. In this way, data on the lattice points that can be wired and data on lattice points that cannot be wired are outputted from the wiring data output means 6.

次に、本実施例の配線方式による配線例を従来方式によ
る配線例と対比して説明する。
Next, an example of wiring according to the wiring method of this embodiment will be explained in comparison with an example of wiring according to the conventional method.

第2図は従来方式による配線例で、配線格子点データ1
(始点F5終点Tt)と配線格子点データj(始点Fj
、Tj)の間に空き格子点を任よる配線例である。配線
格子点データ1(始点F1.終点Fj)の配線はX方向
の線分?(線長ap、pは格子間隔)とY方向の線分8
(線長8p)で構成されている。ここで、配線禁止格子
点発生手段奔モ→2の表−2にはこれら線長6p。
Figure 2 shows an example of wiring using the conventional method, with wiring grid point data 1
(start point F5 end point Tt) and wiring grid point data j (start point Fj
, Tj) is an example of wiring in which empty lattice points are assigned between the lines. Is the wiring of wiring grid point data 1 (start point F1. end point Fj) a line segment in the X direction? (line length ap, p is the grid interval) and line segment 8 in the Y direction
(line length 8p). Here, these line lengths 6p are listed in Table 2 of the wiring prohibited lattice point generation means tommo→2.

8pに対して配線禁止格子数としてそれぞれ2゜1が格
納されているものとすると、配線禁止格子点発生手段5
からX印の格子点が配線禁止格子点として発生され、格
子点属性記憶手段80表−8中の当該配線格子点の属性
の欄に配線禁止格子点であることを示す”1′″のデー
タが書込才れる。
Assuming that 2°1 is stored as the number of wiring prohibited grids for each 8p, the wiring prohibited grid point generating means 5
The grid point marked with an X is generated as a wiring-prohibited grid point, and data of "1'" indicating that it is a wiring-prohibited grid point is entered in the attribute column of the wiring grid point in the grid point attribute storage means 80 Table-8. I'm good at writing.

この結果、次の配線格子点データj(始点Fj。As a result, the next wiring grid point data j (starting point Fj).

終点Fj)の配線はこれら配線禁止格子点を避けて線分
9.10,11.19で構成される。
The wiring at the end point Fj) is composed of line segments 9.10 and 11.19, avoiding these wiring prohibited grid points.

〔発明の効果〕〔Effect of the invention〕

本発明は、以上説明したように、配線した線の前後に適
度な配線格子をあけることにより、配線した綜同志が電
気的に影響し合うことを防ぐととができる。
As explained above, the present invention can prevent the wired heddles from electrically influencing each other by providing an appropriate wiring grid before and after the wired wires.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の配線方式の一実施例のプロン例の配線
方式による配線例を示す図である。 1・・・配線格子点データ記憶手段、 2・・・配線禁止格子数記憶手段、 8・・・格子点属性記憶手段、 4・・・配線手段、 5・・・配線禁止格子点発生手段、 6・・・配線データ出力手段。
FIG. 1 is a diagram illustrating an example of wiring according to an exemplary wiring method of an embodiment of the wiring method of the present invention. DESCRIPTION OF SYMBOLS 1... Wiring grid point data storage means, 2... Wiring prohibited grid number storage means, 8... Grid point attribute storage means, 4... Wiring means, 5... Wiring prohibited grid point generating means, 6...Wiring data output means.

Claims (1)

【特許請求の範囲】[Claims] 接続すべき配線格子点データを記憶する配線格子点デー
タ記憶手段と、線分の線長に対する配線禁止格子数を記
憶する配線禁止格子数記憶手段と、各配線格子点が配線
禁止格子点か否かの属性を記憶する格子点属性記憶手段
と、配線格子点データ記憶手段から接続すべき配線格子
点データを逐次取出して、格子点属性記憶手段の属性を
参照しながら配線する配線手段と、配線手段による配線
結果の線を線分に分割し、配線禁止格子数記憶手段から
各線分に対する配線禁止格子数を得、当該線分に対する
配線禁止格子点を発生し、格子点属性記憶手段における
当該配線格子点の属性を配線禁止格子点とする配線禁止
格子点発生手段と、配線結果を出力する配線データ出力
手段とを有することを特徴とする配線方式。
Wiring grid point data storage means for storing wiring grid point data to be connected, wiring prohibited grid number storage means for storing the number of wiring prohibited grids for the line length of a line segment, and information on whether or not each wiring grid point is a wiring prohibited grid point. a wiring means for sequentially extracting wiring grid point data to be connected from the wiring grid point data storage means and wiring while referring to the attributes in the grid point attribute storage means; The line resulting from the wiring is divided into line segments, the number of wiring prohibited grids for each line segment is obtained from the wiring prohibited grid number storage means, the wiring prohibited grid points for the line segment are generated, and the wiring is stored in the grid point attribute storage means. 1. A wiring method comprising: a wiring prohibited grid point generating means that sets the attribute of a grid point to be a wiring prohibited grid point; and a wiring data output means that outputs a wiring result.
JP59143590A 1984-07-11 1984-07-11 Wiring system Pending JPS6123389A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59143590A JPS6123389A (en) 1984-07-11 1984-07-11 Wiring system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59143590A JPS6123389A (en) 1984-07-11 1984-07-11 Wiring system

Publications (1)

Publication Number Publication Date
JPS6123389A true JPS6123389A (en) 1986-01-31

Family

ID=15342263

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59143590A Pending JPS6123389A (en) 1984-07-11 1984-07-11 Wiring system

Country Status (1)

Country Link
JP (1) JPS6123389A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04102352A (en) * 1990-08-22 1992-04-03 Nec Corp Wiring method of integrated circuit
JP2003535275A (en) * 2000-05-31 2003-11-25 モルフィック テクノロジーズ アクティエボラーグ Hydraulic shock / pressing device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04102352A (en) * 1990-08-22 1992-04-03 Nec Corp Wiring method of integrated circuit
JP2003535275A (en) * 2000-05-31 2003-11-25 モルフィック テクノロジーズ アクティエボラーグ Hydraulic shock / pressing device

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