JPS61230392A - Multilayer circuit board - Google Patents

Multilayer circuit board

Info

Publication number
JPS61230392A
JPS61230392A JP7121985A JP7121985A JPS61230392A JP S61230392 A JPS61230392 A JP S61230392A JP 7121985 A JP7121985 A JP 7121985A JP 7121985 A JP7121985 A JP 7121985A JP S61230392 A JPS61230392 A JP S61230392A
Authority
JP
Japan
Prior art keywords
layer
circuit board
multilayer circuit
conductor
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7121985A
Other languages
Japanese (ja)
Inventor
寛敏 渡辺
徹 石田
治 牧野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP7121985A priority Critical patent/JPS61230392A/en
Publication of JPS61230392A publication Critical patent/JPS61230392A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、庫膜回路部品、IC,LSIなどの高密度実
装に好適な多層回路基板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a multilayer circuit board suitable for high-density mounting of membrane circuit components, ICs, LSIs, and the like.

(従来の技術) 近年、機器の小型化や多機能化の要望が年々強くなって
きているが、これらの要望に応えるために1回路部品の
高密度実装が重要な技術となっている。特にIC,LS
Iの発達や、抵抗器、コンデンサ等の厚膜化技術の発達
に伴い、回路部品の実装がますます高密度化へと移行し
つつある。部品の高密度実装を実現するためには、部品
を小さくすることとともに、基板の配線密度を高くする
ことが重要であり、基板の配線密度を高めるには、基板
を多層構造とし、配線層を基板内部に形成する多層回路
基板が最も効果的である。
(Prior Art) In recent years, demands for smaller devices and multifunctionality have become stronger year by year, and in order to meet these demands, high-density packaging of single circuit components has become an important technology. Especially IC, LS
With the development of integrated circuits and thick film technology for resistors, capacitors, etc., the mounting density of circuit components is becoming increasingly high. In order to achieve high-density mounting of components, it is important to make the components smaller and to increase the wiring density of the board. A multilayer circuit board formed inside the board is most effective.

従来の多層回路基板としては、アルミナを主成分とする
絶縁体層と、タングステンまたはモリブデンの導体層を
交互に積層したものがある。(例えば、IEEE Tr
an@on CHMT CHMT−344p 634(
1980) r A Multi’1ayar Cer
amlc MultlchipModuleJ参照) (発明が解決しようとする問題点) しかし、前記従来の多層回路基板には、部品の半田付け
を可能にするために、多層回路基板の表面のタングステ
ンまたはモリブデン導体層の上にニッケル、金などのメ
ッキを施す必要があり、また、厚膜素子としてグレーズ
抵抗体素子やコンデンサ菓子を形成するためには、空気
中で800〜900℃の高温処理をする会費があるが、
容易に酸化されるタングステンやモリブデンのような導
体材料は酸素雰囲気中で処理することができないため、
多層回路基板に厚膜素子を直接形成することはできない
という問題点がある。
Conventional multilayer circuit boards include those in which insulator layers containing alumina as a main component and conductor layers of tungsten or molybdenum are alternately laminated. (For example, IEEE Tr
an@on CHMT CHMT-344p 634(
1980) r A Multi'1ayar Cer
amlc MultichipModule J) (Problems to be Solved by the Invention) However, the conventional multilayer circuit board does not include a tungsten or molybdenum conductor layer on the surface of the multilayer circuit board to enable soldering of components. It is necessary to plate with nickel, gold, etc., and in order to form glazed resistor elements and capacitor confectionery as thick film elements, there is a fee for high-temperature treatment at 800 to 900 degrees Celsius in air.
Conductive materials such as tungsten and molybdenum, which are easily oxidized, cannot be processed in an oxygen atmosphere;
There is a problem in that thick film elements cannot be directly formed on a multilayer circuit board.

(問題点を解決するための手段) 前記問題点を解決するために1本発明は、アルミナを主
成分とする絶縁体層とタングステン金属の導体層とを交
互に&層してなる槓l一部と、前記&層部の最上層絶縁
体層に設けられた導体露出部上に内部の導体層と導通す
るように形成した、タングステンに還元されない低融点
ガラスおよび貴金属からなる導電性被覆材と、前記最上
層絶縁体層上に設けられ、前記導電性被覆材の延設部を
電極とする厚膜抵抗体素子および前記延設部に電気的に
接続された電子部品装着用の銀−ノヤラノウム系導体パ
ッドと、配線パターンとからなり、シかも前記導電性被
覆材の膜厚が15〜35μmの範囲にあるという構成の
多層回路基板を提供するものである。
(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention provides a laminate made of alternating layers of insulator layers mainly composed of alumina and conductor layers of tungsten metal. and a conductive coating material made of a low melting point glass that is not reduced to tungsten and a noble metal, which is formed on the exposed conductor part provided in the uppermost insulating layer of the & layer part so as to be electrically connected to the internal conductor layer. , a thick film resistor element provided on the uppermost insulating layer and having an extended portion of the conductive coating as an electrode; and a silver-noyaranoum for mounting electronic components electrically connected to the extended portion. The present invention provides a multilayer circuit board comprising a system conductor pad and a wiring pattern, and the thickness of the conductive coating material is in the range of 15 to 35 μm.

(作用) 本発明は、前記構成により、導電性充填材のガラス成分
としてタングステンまたはモリブデンに還元されない低
融点ガラスを用いるため、空気中 、の高温下焼結を施
してもタングステンまたはモリブデンの導体層が酸化さ
れずに良好な電気導通性が得られるとともに、前記導電
性充填材を介することによって、抵抗やコンデンサの厚
膜素子を最上層絶縁体層表面に空気中で形成できたり、
また、レーデによる厚膜抵抗のトリミングも絶縁体層の
成分が高アルミナであるために安定して行なえることと
なる。
(Function) With the above configuration, the present invention uses a low melting glass that is not reduced to tungsten or molybdenum as the glass component of the conductive filler, so even when sintered at high temperature in air, the tungsten or molybdenum conductive layer Good electrical conductivity can be obtained without being oxidized, and thick film elements of resistors and capacitors can be formed in air on the surface of the uppermost insulating layer by using the conductive filler.
Further, trimming of the thick film resistor by radar can also be stably performed because the insulator layer has a high alumina component.

(実施例) 第1図は本発明の一実施例の多層回路基板の断面図、8
g2図は前記基板要部の拡大断面図を示し、1はアルミ
ナペース、2は第1層のアルミナ絶縁体層、3は最上層
のアルミナ絶縁体層、4はタングステンまたはモリブデ
ンの導体層、5はタングステンまたはモリブデンを酸化
させない低融点ガラスと貴金属からなる被覆材、6は銀
−パラジウム系導体膜、7はルテニウム系厚膜抵抗体素
子、8はタングステンまたはモリブデンに還元されない
低融点ガラス、9は買金槁粒子を示す。
(Embodiment) FIG. 1 is a cross-sectional view of a multilayer circuit board according to an embodiment of the present invention.
Figure g2 shows an enlarged sectional view of the main parts of the substrate, where 1 is an alumina paste, 2 is a first alumina insulator layer, 3 is an uppermost alumina insulator layer, 4 is a tungsten or molybdenum conductor layer, 5 6 is a silver-palladium-based conductor film; 7 is a ruthenium-based thick film resistor element; 8 is a low-melting glass that is not reduced to tungsten or molybdenum; Indicates the purchase price particle.

アルミナを主成分とし焼結助剤を添加した無機粉末と、
ポリビニルブチラール(PVB )と、可塑剤とからな
るグリーンシートを、ドクタブレード法を用いて作製し
た。前記グリーンシート上に、タングステンまたはモリ
ブデンを主成分とし、導体焼結助剤を含む導体混合物に
、適量のエトセル系ビークルを加えて混練した導体ペー
ストと、前記グリーンシートと同じ無mMiM、tもつ
アルミナペーストとを交互に印刷積層して積層部を形成
し、前記積層部の最上層アルミナ絶縁体層3には、タン
グステンまたはモリブデンの導体層4の一部を露出する
ように300μm角の孔を設けた。前記のように構成さ
れた積層部を1550〜1650℃の還元雰囲気中で焼
成した。焼結後の積層部の収縮率は約16%であった。
Inorganic powder containing alumina as the main component and adding a sintering aid,
A green sheet made of polyvinyl butyral (PVB) and a plasticizer was produced using a doctor blade method. On the green sheet, a conductor paste made by adding and kneading an appropriate amount of ethcel-based vehicle to a conductor mixture containing tungsten or molybdenum as a main component and a conductor sintering aid, and alumina having the same mMiM and t as the green sheet. A laminated part is formed by alternately printing and laminating the paste and the laminated part, and a 300 μm square hole is provided in the uppermost alumina insulating layer 3 of the laminated part so as to expose a part of the tungsten or molybdenum conductor layer 4. Ta. The laminated portion constructed as described above was fired in a reducing atmosphere at 1550 to 1650°C. The shrinkage rate of the laminated portion after sintering was about 16%.

次に、焼結積層部の表面孔部に、軟化点が約540℃で
B2O3とBa0i主成分とするガラス粉末厚膜抵抗体
素子7用の電極となる延設部を有するようにパターンを
形成し、釣鐘状の温度グロファイルを有し、ピーク温度
850℃の厚膜焼成炉に通しt;。さらに、ルテニウム
系グレーズ抵抗体素子(厚膜抵抗体素子)7と銀−パラ
ジウム糸導体膜6を必要パターンに印刷形成し、前記と
向じ厚膜焼成炉に通した。
Next, a pattern is formed in the surface hole of the sintered laminated part so that it has an extended part that will become an electrode for the glass powder thick film resistor element 7, which has a softening point of about 540°C and whose main components are B2O3 and Ba0i. It has a bell-shaped temperature profile and is passed through a thick film firing furnace with a peak temperature of 850°C. Further, a ruthenium-based glaze resistor element (thick film resistor element) 7 and a silver-palladium thread conductor film 6 were printed in a required pattern and passed through a thick film firing furnace in the same manner as described above.

前記のようにして得られた多層回路基板では、銀−ガラ
ヌ材料から構成された被覆材5が核層部表面に強固に密
着し、さらに被覆材5と導体層4との電気的導通が十分
に確保されていた。たとえば、第2図の導体層4と銀−
パラジウム系導体膜6との間の電気抵抗値Reを評価し
たところ3〜5−程度であった。また、被覆材5の延設
部を電極として形成したルテニウム系厚膜抵抗体素子7
は。
In the multilayer circuit board obtained as described above, the coating material 5 made of silver-galanu material firmly adheres to the surface of the core layer, and furthermore, the electrical conduction between the coating material 5 and the conductor layer 4 is sufficient. was secured. For example, the conductor layer 4 in FIG.
When the electrical resistance value Re between the palladium-based conductor film 6 was evaluated, it was about 3 to 5-. Furthermore, a ruthenium-based thick film resistor element 7 is formed using an extended portion of the covering material 5 as an electrode.
teeth.

従来の銀−パラジウムを電極としたものと略々同じ抵抗
値を示し、極めて良いマツチング性を示した。また、被
覆材5と銀−パラジウム系導体膜6の界面の電気的導通
においても極めて良好な特性を示し、前記界面の電気抵
抗が大きくなるような現象はみられなかった。
It exhibited approximately the same resistance value as conventional silver-palladium electrodes, and exhibited extremely good matching properties. Furthermore, the electrical conductivity at the interface between the coating material 5 and the silver-palladium conductor film 6 showed extremely good characteristics, and no phenomenon in which the electrical resistance at the interface increased was observed.

さらに、本発明の多層回路基板の被覆材の安定性を調べ
るために、1210.2気圧でグレツシャークッカーテ
ス) (PCTと略す)を行ない、48時間経過後の前
記電気抵抗Reを測定した。凧下表に、試料の被覆材5
の膜厚を変えて測定した前記電気抵抗値Reの測定結果
を示す。
Further, in order to investigate the stability of the coating material of the multilayer circuit board of the present invention, a Gretzscher-Cuckett test (abbreviated as PCT) was performed at 1210.2 atm, and the electrical resistance Re was measured after 48 hours had elapsed. . Sample coating material 5 is placed on the bottom of the kite.
The measurement results of the electrical resistance value Re measured by changing the film thickness are shown below.

表に示されるように、試料番号1の膜厚12μmやに料
番号5の膜厚40μmの被覆材を形成した場合は、初期
には低抵抗の導通が得られるが、 PCT後には抵抗値
が増大し、時には数10にΩという高抵抗になる。これ
は、膜厚15μm以下の被覆材5では、低軟化点ガラス
による被覆が完全でなく、導体酸化層が厚くなるために
、また、被覆材5の膜厚を40μm以上に形成すると、
被覆材5と内部導体層の界面付近の、低軟化点ガラスと
銀粉末をペースト状にするために混ぜたビークル中の樹
脂成分のうち、ガラスが軟化して燃焼飛散しようとする
ために焼成後ボアがガラス内部に多く発生し、前記ボア
が高温高湿中で前記界面付近のみ体酸化場を厚くするた
めに、PCT後に電気抵抗Reが増大すると考えられる
As shown in the table, when coating material with a thickness of 12 μm for Sample No. 1 or 40 μm for Sample No. 5 is formed, conduction with low resistance is obtained initially, but after PCT, the resistance value decreases. The resistance increases, sometimes reaching a high resistance of several tens of ohms. This is because when the coating material 5 has a thickness of 15 μm or less, the coating with the low softening point glass is not complete and the conductor oxide layer becomes thick.
Among the resin components in the vehicle mixed with the low softening point glass and silver powder near the interface between the coating material 5 and the internal conductor layer to form a paste, after firing the glass softens and tends to burn and scatter. It is thought that the electrical resistance Re increases after PCT because many bores are generated inside the glass and the bores thicken the oxidation field near the interface under high temperature and high humidity.

本発明による多層回路基板は、被覆材5の膜厚が15〜
35μmになるように形成することにより、ガラスの被
覆効力を高め、内部導体層4が酸化されにぐいものとし
た。このため、PCTなどの苛酷な条件でも、被覆材5
と内部導体層4は良好な導通性力で保たれる。
In the multilayer circuit board according to the present invention, the coating material 5 has a thickness of 15 to
By forming the layer to have a thickness of 35 μm, the coating effect of the glass was increased and the internal conductor layer 4 was made resistant to oxidation. Therefore, even under harsh conditions such as PCT, the coating material 5
and the inner conductor layer 4 is maintained with good electrical conductivity.

なお、被覆材5の膜厚とPCT 48時間後の前記界面
の電気抵抗Reとの関係を、第3図の斜線の範囲で示す
The relationship between the film thickness of the coating material 5 and the electric resistance Re of the interface 48 hours after PCT is shown in the shaded range in FIG.

(発明の効果) 前記のように、本発明は、内部導体層の露出部上に形成
された導電性被覆材を、高温空気中においても安定して
いる貴金属とガラス材料で、焼成後の膜厚15〜35μ
mで形成しているため、内部導体層への空気の浸透を防
止する溝底となっている。このため、本発明は、空気中
800〜900℃の高温で焼成する厚膜抵抗体素子やコ
ンデンサ集子を最上1表面に形成することが可能となり
、しかも、内部導体層がタングステンで多〜化されてい
るため、廉価であシ、淳膜菓子のみならずチップ部品や
ICを高密度で実装することfJy可能である。特に、
本発明では、内部導体層が安定化されているため、高信
頼性の多層回路基板が提供できる。また、高密度部品実
装用基板として、半田付用電極パッドのメッキ処理を必
要とせず、グレーズ抵抗体素子のような厚&素子の形成
も可能な構造を実現し、かつ製造工程の簡略化、コスト
ダウンを可能にするものである。
(Effects of the Invention) As described above, the present invention uses noble metal and glass materials that are stable even in high-temperature air as the conductive coating material formed on the exposed portion of the internal conductor layer. Thickness 15~35μ
Since the groove is formed of m, it forms a groove bottom that prevents air from penetrating into the internal conductor layer. Therefore, the present invention makes it possible to form thick-film resistor elements and capacitor clusters fired in air at high temperatures of 800 to 900°C on the topmost surface, and furthermore, the internal conductor layer is made of tungsten. Because of this, it is inexpensive and allows for high-density mounting of not only confectionery but also chip parts and ICs. especially,
In the present invention, since the internal conductor layer is stabilized, a highly reliable multilayer circuit board can be provided. In addition, as a board for high-density component mounting, it does not require plating of soldering electrode pads, and it has a structure that allows the formation of thick and thin elements such as glazed resistor elements, and simplifies the manufacturing process. This makes it possible to reduce costs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の多層回路基板の断面図、第
2図は前記基板要部の拡大断面図、第31・・・アルミ
ナペース、2・・・第1層のアルミナ絶縁体層、3・・
・最上層のアルミナ絶縁体層、4・・・タングステンま
たはモリブデンの導体層、5・・・タングステンまたは
モリブデンを酸化させない低融点ガラスと貴金属からな
る被徴材、6・・・銀−・9ラジウム糸導体膜、7・・
・ルテニウム系厚膜抵抗体素子、8・・・タングステン
またはモリブデンに還元されない低融点ガラス、9・・
・貴金属粒子。 特許出願人  松下電器産業株式会社 代 理 人   星  野  恒  4.’l、、’、
’、、 ’、’g第1図 第2図
FIG. 1 is a sectional view of a multilayer circuit board according to an embodiment of the present invention, FIG. 2 is an enlarged sectional view of the essential parts of the board, 31. Alumina paste, 2. First layer alumina insulator. Layer, 3...
・Top layer alumina insulator layer, 4... Tungsten or molybdenum conductor layer, 5... Material made of low-melting glass and noble metal that does not oxidize tungsten or molybdenum, 6... Silver-.9 Radium Thread conductor membrane, 7...
・Ruthenium-based thick film resistor element, 8...Low melting point glass that is not reduced to tungsten or molybdenum, 9...
・Precious metal particles. Patent applicant: Matsushita Electric Industrial Co., Ltd. Representative: Hisashi Hoshino 4. 'l,,',
',, ','gFigure 1Figure 2

Claims (2)

【特許請求の範囲】[Claims] (1)アルミナを主成分とする絶縁体層とタングステン
金属の導体層とを交互に積層してなる積層部と、前記積
層部の最上層絶縁体層に設けられた導体層露出部上に内
部導体層と導通するように形成した、タングステンに還
元されない低融点ガラスと貴金属からなる導電性被覆材
と、前記最上層絶縁体層上に設けられ、前記導電性被覆
材の延設部を電極とする厚膜抵抗体素子および前記延設
部に電気的に接続された電子部品装着用の銀−パラジウ
ム糸導体パッドと、配線パターンとからなり、前記導体
層露出部上に形成された導電性被覆材の膜厚が、15〜
35μmの範囲にあることを特徴とする多層回路基板。
(1) A laminated part formed by alternately laminating an insulating layer mainly composed of alumina and a conductive layer made of tungsten metal, and an internal layer on the exposed part of the conductive layer provided on the uppermost insulating layer of the laminated part. a conductive coating made of a low-melting glass and noble metal that is not reduced to tungsten and formed to be electrically conductive with the conductor layer; and an extended portion of the conductive coating provided on the uppermost insulating layer as an electrode. A conductive coating formed on the exposed portion of the conductor layer, comprising a thick film resistor element, a silver-palladium thread conductor pad for mounting an electronic component electrically connected to the extension portion, and a wiring pattern. The film thickness of the material is 15~
A multilayer circuit board characterized by having a thickness in the range of 35 μm.
(2)導体層にモリブデンを用いた特許請求の範囲第(
1)項記載の多層回路基板。
(2) Claim No. (2) using molybdenum for the conductor layer
1) The multilayer circuit board described in item 1).
JP7121985A 1985-04-05 1985-04-05 Multilayer circuit board Pending JPS61230392A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7121985A JPS61230392A (en) 1985-04-05 1985-04-05 Multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7121985A JPS61230392A (en) 1985-04-05 1985-04-05 Multilayer circuit board

Publications (1)

Publication Number Publication Date
JPS61230392A true JPS61230392A (en) 1986-10-14

Family

ID=13454342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7121985A Pending JPS61230392A (en) 1985-04-05 1985-04-05 Multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS61230392A (en)

Similar Documents

Publication Publication Date Title
JPH0378798B2 (en)
JP3331083B2 (en) Low temperature firing ceramic circuit board
JPH0569319B2 (en)
JP3019136B2 (en) Thick film paste and ceramic circuit board using the same
JP3093601B2 (en) Ceramic circuit board
JP2002043758A (en) Multilayer board and manufacturing method
JP4122612B2 (en) Low temperature fired ceramic circuit board
JPS61230392A (en) Multilayer circuit board
JPS60117796A (en) Multilayer circuit board and method of producing same
JP3130914B2 (en) Multilayer circuit board
JPH0787226B2 (en) Low dielectric constant insulator substrate
JP2002076609A (en) Circuit board
JPS6092697A (en) Composite laminated ceramic part
JP2615970B2 (en) Method for manufacturing an ANN multilayer substrate in which conductors and resistors are wired inside
JPS60165795A (en) Multilayer board and method of producing same
JPS60175495A (en) Multilayer board
JPS6085598A (en) Multilayer circuit board
JP3934910B2 (en) Circuit board
JPS6025290A (en) Method of producing hybrid integrated circuit board
JP4593817B2 (en) Low temperature fired ceramic circuit board
JP3093602B2 (en) Manufacturing method of ceramic circuit board
JPH0137878B2 (en)
JPH0544200B2 (en)
JPS6047496A (en) Ceramic board
JPS628595A (en) Multilayer circuit board