JPS61226990A - Substrate for electric circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] B. Industrial application fields The present invention relates to a substrate for an electric circuit.

Background of the Invention Integrated circuit devices such as thermal recording heads, hybrid integrated circuits, and light receiving elements and light emitting elements of line sensors are integrated circuit devices in which at least one electric circuit element is arranged on a substrate.
It consists of multiple circuit elements. Most of the substrates are made of ceramics such as alumina, and others are made of glass epoxy, etc., and have a plate shape.

Generally, these integrated circuits are created by arranging electrical circuit elements on a base (substrate) material and then cutting it at predetermined locations, and integrated circuit devices are made up of various integrated circuits arranged on a common substrate. .

Terminals of electrical circuits on each integrated circuit are generally formed by bonding pads, and wiring between integrated circuits is made by wire bonding between the bonding pads. For example, in a hybrid integrated circuit, the bonding pad is a small square of about 80 μm square, so
To ensure reliable wiring, each integrated circuit must be positioned and placed on a common substrate with extremely high precision.

The conventional method for cutting substrate materials (uncut substrates) is the full cut method using a carbon dioxide laser; small holes are perforated using a carbon dioxide laser to form snap lines; A method of making a full cut with a dicing saw (a thin disc-shaped tool made of Guyanmond particles with resin as a binder); A method of creating grooves in a lattice pattern using a mold when manufacturing the substrate material ( It is called chocofret because it resembles a plate of chocolate with grooves in the shape.), and the method used is to break it along the grooves.

However, these methods have the following problems.

In full cutting using a laser, some of the substrate material scattered during cutting adheres to the cut location and becomes an obstacle to microfabrication of the substrate surface.

The method of providing a snap line using a laser on the surface of the substrate material is also the same as above.

If a laser snap line is provided on the back side of the substrate material and the material is broken, it is easy to remove the above-mentioned deposits, but the end surface formed by the breaking may become shell-like or have cracks. This not only makes the positioning of the chip material inaccurate as described above, but also causes inconveniences in the use of integrated circuit devices, such as scratching the ink ribbon and recording unnecessary lines in thermal recording heads, for example. arise.

When making full cuts with a dicing saw, the substrate material is highly hard, so the saw's plate may wear out or the blade may lift, leaving uncut portions.

When using a substrate material with chocolate flakes, when applying photoresist to the surface of the material by spin cord or roll coating, the grooves make it impossible to apply the photoresist to a uniform thickness, making it difficult to form each circuit element. becomes an obstacle.

Purpose of the Invention The present invention has been made in view of the above circumstances, and includes:
The object of the present invention is to provide an electric circuit substrate free of the above-mentioned defects at the folded portions.

29 Structure of the invention, that is, the present invention has a continuous recess on one main surface, a recess opposite to the continuous recess on the other main surface, and a plurality of regions partitioned by the recess. The present invention relates to an electric circuit substrate on which at least one circuit element is arranged.

E, Example First, preferred embodiments of the present invention will be explained.

Note that in this specification, the term "circuit element" refers to at least one unit of element constituting an electric circuit section.

Fig. 1 shows an electric circuit substrate, and Fig. 1 (a) is a plan view;
Figure (b) is a bottom view.

On the surface of the ceramic substrate 1, a large number of continuous recesses (V-grooves in this example) 3 are arranged in a direction perpendicular to each other.
Each area defined by is equipped with a circuit element (not shown) (
For example, a heating layer of a thermal recording head, a common electrode, a signal electrode, a bonding pad, or a combination thereof)
is located. The electric circuit portion constituted by these circuit elements may be the same or different for each region. Further, on the back surface, a large number of small diameter holes 2 are bored at positions opposite to the grooves 3.

The manufacturing procedure of the electric circuit substrate is as follows.

As shown in FIG. 2(a) and FIG. 2(b), which is a sectional view taken along the nb nb line in FIG. 2(a), the purity is 90%.
A ceramic substrate material 1 with a diameter of 50 to 200 μm is placed on the back side of a ceramic substrate material 1 made of ~99.9% alumina with a thickness of 0.5 to 2 mm.
m, depth 100 p m ~ l mm hole 2 100 ~
A plurality of scribe lines were formed by drilling with a carbon dioxide laser at a pitch of 500 μm. The figure shows 1
Only lines are shown. The hole 2 drilled by the carbon dioxide laser has a conical shape. Incidentally, a small amount of the above-mentioned deposit is present in contact with the hole 2 due to the carbon dioxide laser, but this is a very small amount and can be easily removed since it is on the back side.

Next, various hybrid integrated circuits,
After forming circuit elements (none of which are shown) for the thermal recording head, the light receiving element of the line sensor, the light emitting element, etc.
FIG. 3(a) and IIl of FIG. 3(a), -I'11.
As shown in FIG. 3(b), which is a cross-sectional view taken along the line,
A VA3 with a width of 40 μm to 2 mm (preferably 100 μm or more) is cut on the surface using a dicing saw with a V-shaped blade along the above scribe line to form a base for an electric circuit, and this is then broken and cut as shown in Figure 4. The smaller part is 10 μm, and the larger part is 10 μm.
Although an unevenness of 0 μm occurs, by providing the grooves 3, the unevenness of the folded surface 5 becomes 5 μm or less and is smooth.

In order for the integrated circuit 4 to have a chamfer 6 formed by the V-groove 3, the angle θ2 of the chamfer 6 is preferably 30 to 906, and the angle θ2 of the chamfer 6 is 3
0 to 606 is good. Therefore, in order to keep both θ1 and θ2 in a good range, θ is 60 to 906, and θ2 is 45 to 60.
It is best to set it in the range of °.

Instead of the scribe line formed by hole 2, it is also possible to cut grooves from the back side and break the board material along the grooves on the front and back sides, but the scribe line can be cut using a carbon dioxide laser, etc. It is better to form it as above.
This is advantageous in terms of productivity. However, when V-grooves are provided on the front and back surfaces, chamfers are formed after both the front and back surfaces are split, which is convenient when placing circuit elements on the front and back screens.

Note that, although it is desirable to arrange the circuit elements on the main surface on the side where the chamfer is formed by Va, the present invention is not limited thereto.

In such an integrated circuit, for example, in a serial type thermal recording head described later, the edges are not firm and are chamfered, so there is no unnecessary scratching of the ink ribbon as described above. There is no risk of recording lines. Also,
When the above-mentioned integrated circuit is used in a hybrid integrated circuit, positioning is performed accurately by butting the end faces of the integrated circuit on a common substrate, and as a result, guide bonding can be performed reliably.
It greatly contributes to improving the yield of wire bonding.

In particular, for example, if the size of the bonding base is 80 μm square,
When the present invention is applied to a hybrid integrated circuit having fine wiring with a bonding pitch of 125 μm, the above effects are remarkable.

Various circuit elements on the substrate 1 are formed by vapor deposition, sputtering, photoetching, etc., but it is preferable to provide scribe lines prior to forming these circuit elements. Also,
These circuit element forming steps may also be used.

Next, the structure of the integrated circuit device will be explained using a thermal recording head as an example. Hereinafter, the thermal recording head will simply be referred to as "head".
It is called.

Heads are broadly classified into two types: a serial method in which recording is performed while the head is moved in a direction perpendicular to the feeding direction of the recording paper, and a line method in which recording is performed with the head fixed.

First, the serial method will be explained.

(d) There are two types of serial printing methods: a vertical single-line printing method in which the heads are arranged in a row, and a digit-sequential printing method in which the heads are arranged in a matrix, but the structure of the heat generating part is common to both. Therefore, the vertical single column printing method will be explained here.

As shown in FIG. 6, the head 120 has a heat generating section 102 arranged in the feeding direction
Usually 24 pieces are arranged in a row in a direction parallel to the head 12.
0 is printed while moving in the Y direction perpendicular to the feeding direction X of the recording paper.

As shown in FIG. 7, there are usually 24 heating elements (usually arranged across a glaze layer 116 made of silicon oxide, etc.) provided linearly on an insulating substrate (ceramic substrate made of alumina, etc.) 1o3. One side of the layer 8 (for example, tantalum nitride) is connected to a common electrode 109 made of aluminum, for example, and the other side is connected to a signal electrode 110 made of aluminum, so that the signal sent to the heat generating part 102 is sent from the signal electrode 110. ing. In this head 120, the heat generating section 102 selectively generates heat in response to a pulse signal selectively sent from the signal electrode 110, and prints while moving in the Y direction shown in FIG.

As shown in FIG. 8, which is an enlarged cross-sectional view taken along the line ■-■ in FIG. A counter electrode consisting of a common electrode 109 and an individual signal electrode 110 facing each other with a gap 111 is placed on the heat generating layer 108, and a heat generating part 102 is formed in the gap 111. .

A printed circuit board (e.g., glass epoxy or ceramic board) 105.105-2 has an insulating substrate 103 and a large number (e.g., 24) of RC chips 104 fixed thereon. They are fixed facing each other with a gap 106 between them. Electrical connection between the IC chip 104 and the heat generating part 102 is made by a film carrier tape 107 that is stretched between the printed circuit board 105, 105-2 and the insulating base 103 over the gap 106. .

The film carrier tape 107 is made of, for example, a polyimide substrate 114, and a number of glues 115 made of copper foil, for example, bonded thereto in a number corresponding to the signal electrode +10 and the bonding bands 112 made of, for example, aluminum. These leads 115, signal electrodes 110, and bonding bands 112 may be connected by a so-called beam lead method, in which both ends of the leads 115 are slightly extended in advance, and the connections are made by thermocompression bonding. can.

Note that the above-mentioned types of electrodes or wiring, mounting of the IC chip, and wire bonding can be performed using known semiconductor mounting technology, so their details will be omitted.

Further, on the insulating base 103, a heating element layer 10B, an electrode 1
09.110 Wear-resistant protective layer (insulating coating) 1 including on top
Covered and protected by 17.

In FIGS. 7 and 8, 107 is a film carrier tape, 112 is a bonding band, and 115 is a wire. However, in FIG. 7, only the lead wire 115 of the film carrier tape is shown.

Next, the line method will be explained.

As illustrated in FIG. 9, the head 220 is connected to a common substrate 2.
01 U2, an insulating base 203 provided with a heat generating portion 202 and a printed circuit board 205 to which a large number (for example, 64) of IC chips 204 are fixed are fixed facing each other with a constant gap 206 in between. IC chip 204 and heat generating section 202
Electrical connection is made between the printed circuit board 205 and the insulating screen JJi! above the gap 206. '203
The frame is provided by a film carrier tape 207 passed between the two.

This connection method will be explained in detail with reference to FIG. 10 and FIG. 11, which is an enlarged sectional view taken along the line XI-XI in FIG. 10.

A heating element layer 208 is formed on the insulating base 203, and further on this, a common electrode 209 and a large number of signal electrodes 210 are arranged in the length direction of the electrode 209 on the heating element layer 208. It is provided. Both electrodes 2
The heat generating part 20 is formed by each opposing portion 211 of 09 and 210.
2 is formed. On the other hand, a fixed number of IC chips 204 are mounted on separate printed circuit boards 205 that are joined to each other at separation lines 230, and bonding bands 212 provided in a predetermined pattern on the printed circuit board 205 are Wire bonding is performed using a wire 213 such as 80 or A1. Note that each of the above wiring patterns is shown in a simplified diagram.

The film carrier tape 207 is made of, for example, copper foil and is placed on a polyimide substrate 214 in a number corresponding to the signal electrode 210 and the bonding band 212 (for example, 64 tapes, but six tapes are shown in the figure). It is made of glue 215 glued together. Further, on the insulating base 203, a wear-resistant protective layer (insulating coating) 21 is further provided.
7 is deposited.

The materials of each component constituting the head are the same as those used in the serial type.

Next, an example in which the present invention is applied to the heads shown in FIGS. 6 to 11 will be described.

According to the procedure shown in Figures 2 to 5, alumina (purity 99.5%) with a width of 5 cm, a length of 5 cm, and a thickness of 0.8 mm is prepared.
) 20 holes with a diameter of 140 μm and a depth of 250 μm are made on the back side of the ceramic substrate material using a carbon dioxide laser.
Four rows of holes were formed at 0 μm pitch at 5 mm intervals in the length direction and at 12 mm and 2 mm intervals in the width direction. The deposits generated by the laser beam were removed by scraping.

Next, each circuit element on the substrate shown in FIGS. 6 to 11 was formed on the surface of this substrate material by a conventional method.

Next, grooves were cut into the surface of the substrate material along the rows of the holes formed on the back surface using a cutting tool having a resin-diamond blade. ■The angle of the groove valley is 90@, and the width on the surface is 300 μm.

Next, the substrate material was folded along this groove to form an integrated circuit provided with each circuit element.

When the integrated circuit thus obtained was assembled into the head shown in FIGS. 6 to 11, the end surface of each substrate had a roughness of 5 μm or less and there was no occurrence of paris, so the common substrate 101
or 201 can be precisely positioned /11;1, so that the leads 115.215
The connection could be made easily and reliably.

Substrates 103 and 105 or 105-2, substrates 203 and 20
5, relative positioning is achieved using spacers corresponding to gaps 106 and 206.

In particular, in the case of a serial type head, as shown in FIG. 8, even if the ink ribbon 30 shown by the imaginary line comes into contact with the edge of the substrate 105 during use, the edge of the substrate 105 is free of burrs. Moreover, since the chamfer 105a is formed by the V-groove, the substrate 105 will not scratch the ink ribbon 30 and unnecessary lines will not be recorded. This effect is
Rough paper with a rough surface (preferred in Europe and America)
In order to obtain good recording results when recording,
This is particularly noticeable when the ink ribbon 30 is brought into contact with the heat generating section 102 at an angle in order to press it strongly.

As described in detail, the present invention does not have the above-mentioned defects in the structure, etc., and therefore, when assembling the integrated circuit obtained by cutting this electric circuit substrate into an integrated circuit device, positioning is difficult. This can be done accurately, resulting in easy and reliable wiring.

[Brief explanation of the drawing]

The drawings all show embodiments of the present invention. Fig. 1 shows an electric circuit substrate, and Fig. 1 (a) is a plan view;
Figure 2 (b) is a bottom view, Figure 2 is a cross-sectional view of the linear putter forming discontinuous recesses on the base material, Figure 3 shows the process of providing continuous linear recesses on the base material, and Figure (a) shows the process of forming continuous linear recesses on the base material. is an enlarged plan view, an enlarged sectional view shown in FIG. 7 is a sectional view taken along the line ■-■, FIG. 9 is a partial schematic perspective view of a line-type thermal recording head, FIG. 10 is an enlarged plan view of FIG. 9, and FIG. 11 is an Xl of FIG. -It is an enlarged sectional view taken along the line XT. In addition, in the symbols shown in the drawings, 1 --- 1 ------ Base (substrate) material 2 ---
--- Hole 3 drilled by monocarbon dioxide laser --- V groove 6 --- Chamfering 101.201 --- Common board 102.2
02--------- Heat generating part 103.203 -----
--- Ceramic substrate 104.204 ---
- IC chip 105.105-2.205----
----- Printed circuit board 106.206 --------
--- Gap between one substrate 107.207 --- Film carrier table 108.20 B ---------
- One heating element layer 109.209 ------- Common electrode 110.210 - One signal electrode 112.212 -------------Pon ding pad 114.214--Polyimide substrate 11
5.215 ------- Lead wire 116.2
16 --------1---- Glaze layer 117.21
7---------Protective layer 120.220----
---Thermal recording head 105a ---------
-One-sided chamfer 30--11--It is an ink ribbon. Agent Patent Attorney Hiroshi Aisaka Figure 1 Figure 2 Figure 3

Claims (1)

[Scope of Claims] 1. A device having a continuous recess on one main surface, a recess opposite to the continuous recess on the other main surface, and at least one circuit in a plurality of regions partitioned by the recess. An electric circuit base on which elements are placed. 2. The electric circuit substrate according to claim 1, wherein the continuous recess is a V-groove. 3. The electric circuit substrate according to claim 1 or 2, wherein the recess provided on the other main surface is discontinuous. 4. The electric circuit substrate according to any one of claims 1, 2, and 3, wherein circuit elements are arranged on the main surface side having a continuous recess.