JPS61225823A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS61225823A
JPS61225823A JP6691185A JP6691185A JPS61225823A JP S61225823 A JPS61225823 A JP S61225823A JP 6691185 A JP6691185 A JP 6691185A JP 6691185 A JP6691185 A JP 6691185A JP S61225823 A JPS61225823 A JP S61225823A
Authority
JP
Japan
Prior art keywords
copper
substrate
atn
powder
sintered body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6691185A
Other languages
Japanese (ja)
Inventor
Kenichi Muramoto
村本 顕一
Makoto Hideshima
秀島 誠
Masashi Kuwabara
桑原 正志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP6691185A priority Critical patent/JPS61225823A/en
Publication of JPS61225823A publication Critical patent/JPS61225823A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor

Abstract

PURPOSE:To dissipate the heat generated from pellets effectively and protect the pellets from distortion and cracking by a method wherein copper sheets are joined with an aluminum nitride plate utilizing eutectic of copper and oxy gen produced by heating the copper sheets. CONSTITUTION:Copper or copper alloy sheets 1, 1a and 1b are joined with a sintered AlN plate 2 to form a laminated substrate 3. Semiconductor pellets 12a and 12b are attached directly to the surfaces of the copper or copper alloy sheets of the substrate 3 by die-bonding. The content of oxygen in AlN powder must be 0.001-7wt%. With this method, heat radiation property is substantially improved. Moreover, as the substrate has a laminated structure of the sintered AlN plate, whose thermal expansion coefficient is similar to that of the pellet, and the copper or copper alloy sheets, the thermal expansion coefficient at the surface of the copper sheet of the substrate is made approx similar to that of the pellet attached to it by die-bonding.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、半導体装置に関し、特に半導体ペレットがダ
イデンディングされる基板を改良した半導体装置に係る
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device, and more particularly to a semiconductor device having an improved substrate on which semiconductor pellets are die-dened.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来の半導体装置としては、アルミナ板の少なくとも片
面に銅シートを接触して配置し、加熱することによって
生成する銅とアルミナ中の酸素との共晶(CuzO)を
介して接合した基板を用い、この基板の銅シート上に寸
法の大きい半導体ペレットな直接ダイ?ノディングした
構造のものが知られている。
A conventional semiconductor device uses a substrate in which a copper sheet is placed in contact with at least one side of an alumina plate and bonded through a eutectic (CuzO) of copper and oxygen in alumina produced by heating. Direct die of large semiconductor pellets on the copper sheet of this substrate? A nodding structure is known.

しかしながら、前記基板の一構成材であるアルミナ板は
熱伝導率が低いために、電力消費損失の大きい半導体ペ
レット、例えば高周波用でスイッチングタイム電力損失
の大きい半導体(レットや順方向電力損失及び逆阻止洩
れ電流電力損失の大きい高耐圧半導体ペレットをダイボ
ンディングした場合、それら半導体にレットの放熱を十
分に行なえないという問題があった〇このようなことか
ら、基板の一構成材として熱電導率及び機械的強度等の
高い窒化アルミニウム板を用いることが考えられている
が、以下に説明するように実用化する上での種々の問題
があった。
However, since the alumina plate, which is one of the constituent materials of the substrate, has low thermal conductivity, it is difficult to use semiconductor pellets that have large power consumption losses, such as semiconductor pellets that are used for high frequencies and have large switching time power losses, forward power loss, and reverse blocking. When die-bonding high-voltage semiconductor pellets with large leakage current power loss, there was a problem in that the pellets could not sufficiently dissipate heat from the semiconductors. For this reason, thermal conductivity and mechanical Although it has been considered to use an aluminum nitride plate with high mechanical strength, there have been various problems in putting it into practical use as explained below.

第1の問題点は、窒化アルミニウム板を用いた場合、従
来のアルミナ板と銅シートとのような簡単な接合ができ
ないことである。これは、窒化アルミニウム(I%JL
N )中にアルミナ(At20.)のように酸素を有し
ていないため、銅シート表面に生成される酸化鋼(Cu
zO)の層と全くなじまないことに起因する。また、ア
ルミナ板を用いて銅シートの接合を実現しているMo 
−Mn合金、 Mo 、 W等のメタライズを、窒化ア
ルミニウム板に適用してもそれら金属の被着が難しいと
いう欠点を有する。
The first problem is that when an aluminum nitride plate is used, it is not possible to join it as easily as a conventional alumina plate and a copper sheet. This is aluminum nitride (I%JL
Unlike alumina (At20.), it does not contain oxygen in the oxidized steel (Cu
This is due to the fact that it does not blend in with the layer of zO) at all. In addition, Mo
- Even if metallization such as Mn alloy, Mo, W, etc. is applied to an aluminum nitride plate, it has the disadvantage that it is difficult to adhere these metals.

第2の問題点は、窒化アルミニウム板(通常、窒化アル
ミニウム焼結体からなる)の熱伝導率がその理論熱伝導
率に比べて著しく低いことである。窒化アルミニウム焼
結体は、常圧焼結法又はホットプレス法により造られる
。常圧焼結法では、高密度化の目的でアルカリ土類金属
酸化物又は希土類酸化物などの化合物を、焼結助剤とし
て添加することが多く、ホットプレス法では窒化アルミ
ニウム粉末単独、又は助剤が添加された窒化アルミニウ
ム粉末を用い、高温高圧下で焼成するものである。しか
しながら、ホットプレス法では複雑な形状の焼結体の製
造が難しく、しかも量産が不向きでコスト高となる。
The second problem is that the thermal conductivity of an aluminum nitride plate (usually made of a sintered aluminum nitride body) is significantly lower than its theoretical thermal conductivity. The aluminum nitride sintered body is manufactured by a pressureless sintering method or a hot pressing method. In the pressureless sintering method, compounds such as alkaline earth metal oxides or rare earth oxides are often added as sintering aids for the purpose of densification, while in the hot press method, aluminum nitride powder alone or as a sintering aid is added. It uses aluminum nitride powder to which a chemical has been added and is fired at high temperature and high pressure. However, with the hot press method, it is difficult to produce a sintered body with a complicated shape, and furthermore, it is unsuitable for mass production, resulting in high costs.

一方、常圧焼結法はホットプレス法のような問題を解消
できるものの、その窒化アルミニウム焼結体はAtNの
理論熱伝導率が320w/m−にであるのに対し、高々
4ow/m−にと低いのが現状である。
On the other hand, although the pressureless sintering method can solve the problems of the hot pressing method, the theoretical thermal conductivity of the aluminum nitride sintered body is at most 4 ow/m-, whereas the theoretical thermal conductivity of AtN is 320 w/m-. The current situation is that it is extremely low.

〔発明の目的〕[Purpose of the invention]

本発明は、半導体ペレットからの発熱を効果的に放散で
き、かつ半導体4レツトへの歪やクラック発生を防止し
得る半導体装置を提供しようとするものである。
The present invention aims to provide a semiconductor device that can effectively dissipate heat generated from semiconductor pellets and can prevent distortion and cracks in the semiconductor pellets.

〔発明の概要〕[Summary of the invention]

本発明は、銅又は銅合金の7−トを、窒化アルミニウム
板の少なくとも片面に接触して配置し、加熱して生成す
る銅と酸素の共晶を利用して該窒化アルミニウム板に接
合した積層構造の基板と、この基板の銅又は銅合金のシ
ート表面にダイボンディングされたペレットとを具備し
たことを特徴とするものである。
The present invention is a laminate in which copper or copper alloy 7-metal is placed in contact with at least one side of an aluminum nitride plate and bonded to the aluminum nitride plate using a eutectic of copper and oxygen produced by heating. It is characterized by comprising a structured substrate and pellets die-bonded to the surface of a copper or copper alloy sheet of this substrate.

上記基板の一方の構成材である鋼シートとしては、例え
ばタフピッチ電解鋼シート等を、銅合金シートとしては
例えばCu −St 、 Cu −AL−81、Cu−
Ni 、 Cu−Fe等のシートを用いることができる
Examples of the steel sheet that is one of the constituent materials of the above-mentioned substrate include a tough pitch electrolytic steel sheet, and examples of the copper alloy sheet include Cu-St, Cu-AL-81, Cu-
A sheet of Ni, Cu-Fe, etc. can be used.

上記基板の他方の構成材である窒化アルミニウム板とし
ては、酸素を0.001〜7重量%含む窒化アルミニウ
ム粉末を主成分とし、これに希土類元素粉末及び希土類
元素含有物質粉末から選ばれる少なく共1種類を希土類
換算で0.01〜15重量%混合し焼結してなる焼結体
でトータル酸素量が0.01〜20重量%の範囲である
高熱伝導性のものを用いることが望ましい。かかる窒化
アルミニウム焼結体(AtN焼結体)が優れた高熱伝導
性を示すのは以下に説明する組織となっていることによ
るものと推定される。
The aluminum nitride plate, which is the other constituent material of the substrate, is mainly composed of aluminum nitride powder containing 0.001 to 7% by weight of oxygen, and at least one powder selected from rare earth element powder and rare earth element-containing substance powder. It is desirable to use a sintered body obtained by mixing 0.01 to 15% by weight of rare earth elements and sintering the mixture and having a high thermal conductivity with a total oxygen content in the range of 0.01 to 20% by weight. The reason why such an aluminum nitride sintered body (AtN sintered body) exhibits excellent high thermal conductivity is presumed to be due to the structure described below.

但し、以下の説明では焼結助剤として希土類元素を使用
した場合について述べる。
However, in the following explanation, a case will be described in which a rare earth element is used as a sintering aid.

希土類元素粉末を添加した酸素を含むAtN基板原料を
成形し、焼結すると、希土類元素はAtN粉末中の酸素
〔通常は酸化アルミニウムとして存在〕と反応する。こ
うした反応により、組成式3 Ln2O3,5u203
(Ln :希土類元素)の形で表わされるガーネット構
造化合物相(以下、ガーネット相と略す)がAΔの粒界
に生成され、 AtN粒子の焼結に寄与すると共に、酸
素を固定する。この場合、酸素量(主にAtN粉末中の
酸素量)が多くなると、前記ガーネット相として取込ま
れない酸素が存在することになる。
When an oxygen-containing AtN substrate material doped with rare earth element powder is shaped and sintered, the rare earth element reacts with the oxygen (usually present as aluminum oxide) in the AtN powder. Through such a reaction, the composition formula 3 Ln2O3,5u203
A garnet structure compound phase (hereinafter abbreviated as garnet phase) expressed in the form of (Ln: rare earth element) is generated at the grain boundaries of AΔ, contributes to the sintering of the AtN particles, and fixes oxygen. In this case, if the amount of oxygen (mainly the amount of oxygen in the AtN powder) increases, there will be oxygen that is not taken in as the garnet phase.

このため、酸素がAtN粒子に固溶拡散する。絶縁体の
熱伝導率は弾性波(フォノン)の拡散によって支配され
る。このため、酸素が固溶拡散したAtN粒子を含むA
tN焼結体ではフォノンが該固溶拡散された領域で散乱
して熱伝導性の低下を招く。このようなことから、んα
粉末中の酸素量を希土類元素粉末の添加量との兼合いで
前記0.001〜7重量%の範囲で制御し、前記ガーネ
ット相を構成する量に抑えて固定化する。
Therefore, oxygen diffuses into the AtN particles as a solid solution. Thermal conductivity of insulators is dominated by the diffusion of elastic waves (phonons). Therefore, A containing AtN particles in which oxygen is diffused as a solid solution
In the tN sintered body, phonons are scattered in the solid solution diffused region, resulting in a decrease in thermal conductivity. Because of this,
The amount of oxygen in the powder is controlled in the range of 0.001 to 7% by weight in consideration of the amount of rare earth element powder added, and the amount is suppressed to the amount constituting the garnet phase and fixed.

これに上りAtN粒子への酸素の固溶拡散が防止され、
フォノンの散乱が少なくなり、熱伝導性が向上する。
This also prevents solid solution diffusion of oxygen into AtN particles,
Phonon scattering is reduced and thermal conductivity is improved.

なお、AtNの粒界には前記ガーネット相とは別の組成
式LnAt03(Ln :希土類元素)の形で表わされ
るペロブスカイト構造化合物相(以下、ペロプスカイト
相と略す〕が生成される場合もアル。かかるペロプスカ
イト相についても前記ガーネット相と同様な作用を示す
It should be noted that when a perovskite structure compound phase (hereinafter abbreviated as perovskite phase) represented by the compositional formula LnAt03 (Ln: rare earth element), which is different from the garnet phase, is formed at the grain boundaries of AtN, Al. Such perovskite phase also exhibits the same effect as the garnet phase.

上記A&粉末中の酸素は既述のようK AtN粉末の焼
結性に寄与するものである。かかるAtN粉末中の酸素
量は、0.001〜7重量%にする必要が有り、好まし
くは0.05〜4重量%、より好ましい範囲は0.1〜
3重量係である。このようIc AtN粉末中の酸素量
を限定した理由は、その量を0.001重量未満にする
と、焼結性の向上が充分に達成できず、高密度のAAN
焼結体が得難くなる。一方、前記酸素量が7重量%を越
えると、AtNの粒界に固定されない酸素が存在するよ
うになったり、または希土類元素を多量に加えると大量
に生成したガーネット相が粒をおおうようになり、その
部分のフォノンの散乱が無視できなくなるため、熱伝導
性の高いAtN基板焼結体が得難くなる。
As mentioned above, the oxygen in the A& powder contributes to the sinterability of the K AtN powder. The amount of oxygen in the AtN powder needs to be 0.001 to 7% by weight, preferably 0.05 to 4% by weight, and more preferably 0.1 to 4% by weight.
There are three people in charge of weight. The reason for limiting the amount of oxygen in the Ic AtN powder is that if the amount is less than 0.001 weight, sufficient improvement in sinterability cannot be achieved.
It becomes difficult to obtain a sintered body. On the other hand, if the amount of oxygen exceeds 7% by weight, oxygen that is not fixed at AtN grain boundaries will exist, or if a large amount of rare earth elements are added, a large amount of garnet phase will cover the grains. , the scattering of phonons in that part cannot be ignored, making it difficult to obtain a sintered AtN substrate with high thermal conductivity.

上記希土類元素粉末、希土類元素含有物質粉末は焼結助
剤として作用する。希土類元素としては、例えばY 、
 La 、 Ce * Pr 、 Nd 、 Sm等を
挙げることができる。特に希土類元素としてはYが適し
ている。希土類元素含有物質としては酸化イツトリウム
(y2o、)が適している。こうした希土類元素粉末、
希土類元素含有物質粉′末は、1種類でもよりし、2種
類以上の混合物で使用してもよい。かかる希土類元素粉
末、希土類元素含有物質粉末に対する混合量は0.01
〜20重量%にする必要があり、好ましくは0.14〜
11.3重量%(より好ましい範囲は0.28〜8.5
重量%である。この理由は、希土類元素粉末等の混合量
を0.01重量%未満にす゛ると、焼結性の向上が充分
に達成できず、高密度の尼N基板焼結体が得難くなる。
The rare earth element powder and the rare earth element-containing substance powder act as a sintering aid. Examples of rare earth elements include Y,
Examples include La, Ce*Pr, Nd, and Sm. Y is particularly suitable as the rare earth element. Yttrium oxide (y2o) is suitable as the rare earth element-containing substance. These rare earth element powders,
The rare earth element-containing substance powder may be used alone or in a mixture of two or more types. The mixing amount for such rare earth element powder and rare earth element-containing substance powder is 0.01
It is necessary to make it ~20% by weight, preferably 0.14~
11.3% by weight (more preferable range is 0.28-8.5
Weight%. The reason for this is that if the amount of rare earth element powder etc. mixed is less than 0.01% by weight, the sinterability cannot be sufficiently improved and it becomes difficult to obtain a high-density Ni-N substrate sintered body.

一方、希土類元素粉末等の混合量が20重量%を越える
と、AtNの相対量が少なくなり、AtN基板焼結体本
来の特性である耐熱性、高強度性が損われるばかりか熱
伝導性も低下する。合ス゛、これら希土類元素粉末を酸
素を含むAtN粉末に混合するにあたっては、トータル
酸素量が上記範囲内で多い場合には上記範囲(0,01
〜20重量幅)内で多くすることが望ましい。また、常
圧焼結法を採用する場合には、前記希土類元素粉末等の
含有量を0.1〜15重量%の範囲にすることが望まし
い。
On the other hand, if the amount of rare earth element powder etc. exceeds 20% by weight, the relative amount of AtN decreases, which not only impairs the inherent properties of the AtN substrate sintered body, such as heat resistance and high strength, but also reduces thermal conductivity. descend. When mixing these rare earth element powders with oxygen-containing AtN powder, if the total amount of oxygen is large within the above range, the above range (0.01
It is desirable to increase the amount within the range of 20 to 20 weight range). Further, when employing the pressureless sintering method, it is desirable that the content of the rare earth element powder etc. be in the range of 0.1 to 15% by weight.

上記AtN焼結体中のトータル酸素を上記範囲に限定し
た理由はその量を0.01重量%未満に−タル酸素量が
20重量%を越えるとAtNの粒界に固定されない酸素
が存在するようになり熱伝導性の高いALN 者版焼結
体が得難くなる。
The reason for limiting the total oxygen content in the AtN sintered body to the above range is to limit the amount to less than 0.01% by weight. This makes it difficult to obtain an ALN sintered body with high thermal conductivity.

次に、上記AtN tFifL焼結体を得るための常圧
焼結法及びホットプレス焼結法を簡単に説明する。
Next, the pressureless sintering method and hot press sintering method for obtaining the above AtN tFifL sintered body will be briefly explained.

まず、酸素を0.001〜7重量幅含むAtN粉末に希
土類元素粉末及び希土類元素含有物質粉末から選ばれる
少なく共1種を所定量添加し、ゴールミル等を用いて混
合する。つづいて、この混合粉末にバインダを加え、混
線 造粒、整粒を行い、金型、静水圧プレス又はシート
成形により成形を行う。ひきつづき、成形体をN2がス
気流中で700℃前後に加熱してバインダを除去する。
First, a predetermined amount of at least one selected from rare earth element powder and rare earth element-containing substance powder is added to AtN powder containing oxygen in a range of 0.001 to 7 weight range, and mixed using a goal mill or the like. Subsequently, a binder is added to this mixed powder, cross-wire granulation and sizing are performed, and molding is performed using a mold, isostatic press, or sheet molding. Subsequently, the molded body is heated to around 700° C. in a N2 gas stream to remove the binder.

次いで、成形体を黒鉛容器又はAtN容器にセットしN
2ガス雰囲気中で、1600〜1850℃にて常圧焼結
を行う。この際、昇温時の比較的低温(1000〜13
00℃)で前述したが一ネット相又はペロゲスカイト相
がAtN粒子の粒界に生成され、更に高い温度(160
0〜1850℃)で前記が−ネット相、イロデスカイト
相が融解し、その液相焼結機構によって常圧焼結がなさ
れる。一方、ホウドブレス焼結法の場合には、前記ゾー
ルミル等で混合した原料を1600〜1800℃でホウ
トゲレスする。
Next, the molded body is set in a graphite container or an AtN container, and N
Pressureless sintering is performed at 1600 to 1850°C in a two-gas atmosphere. At this time, a relatively low temperature (1000 to 13
At even higher temperatures (160°C), the mononet phase or perogeskite phase described above is generated at the grain boundaries of AtN particles.
0 to 1850°C), the -net phase and irodescite phase are melted, and pressureless sintering is performed by the liquid phase sintering mechanism. On the other hand, in the case of the hot breath sintering method, the raw materials mixed in the sol mill or the like are heated at 1600 to 1800°C.

上述したAtN焼結体の熱伝導率は、65〜115w/
m−xとなり、従来多用されていたAt203焼結体の
熱伝導率が高々40′w/m−にでありたのに比べ1.
5〜3倍の熱伝導率を有する。
The thermal conductivity of the AtN sintered body described above is 65 to 115 w/
m-x, and the thermal conductivity of At203 sintered body, which has been widely used in the past, was at most 40'w/m-, but the thermal conductivity was 1.
It has 5 to 3 times higher thermal conductivity.

一方、上述したAM焼結体に対してタフピ。On the other hand, it is tough compared to the above-mentioned AM sintered body.

チ電解銅等の銅又は銅合金のシートを接触配置させて窒
素ガス雰囲気中で所定の温度(例えば1075℃前後)
で加熱処理することにより、該AtN焼結体中に0.0
1〜20重量%含有する酸素と銅が共晶反応してCuz
Oを生成し、該Cu 20層がAtN焼結体と銅シート
等との接合に関与し、その後室温まで冷却することによ
って、高い接合強度を有する積層構造の基板が得られる
Sheets of copper or copper alloy such as electrolytic copper are placed in contact with each other and heated to a predetermined temperature (for example, around 1075°C) in a nitrogen gas atmosphere.
By heat-treating the AtN sintered body, 0.0
Oxygen and copper containing 1 to 20% by weight undergo a eutectic reaction to form Cuz
By generating O, the Cu 20 layer participates in bonding the AtN sintered body and the copper sheet, etc., and then cooling it to room temperature, thereby obtaining a laminated structure substrate with high bonding strength.

しかして、本発明は上記高熱伝導性のAtN焼結体に銅
又は銅合金のシートを接合した積層構造の基板を用い、
この基板の銅又は銅合金のシート表面に半導体ペレット
を直接グイデンディングすることによりて、At203
焼結体を基板の一構成材として半導体(し、トをダイデ
ンディングした従来の半導体装置に比べて放熱特性を著
しく向上できる。
Therefore, the present invention uses a substrate with a laminated structure in which a sheet of copper or copper alloy is bonded to the above-mentioned highly thermally conductive AtN sintered body,
By directly guiding semiconductor pellets onto the surface of the copper or copper alloy sheet of this substrate, At203
The heat dissipation characteristics can be significantly improved compared to conventional semiconductor devices in which the sintered body is used as a constituent material of the substrate and the semiconductor is die-dended.

また、本発明は半導体ペレット(シリコン)の熱膨張係
数に近似したjuN焼結体と銅又は銅合金シートとの積
層構造を有する基板を用いるため、該基板の銅シート表
面における熱膨張係数はこれにグイデンディングされる
半導体ペレ、トの熱膨張係数に近い値となる。その結果
、グイノンディング時や使用時(半導体(レットからの
発熱時)における熱衝撃によりて、半導体ペレットへの
歪やクラック発生を防止でき、ひいては寸法の大きい半
導体ペレットを塔載した半導体装置を得ることが可能と
なる0この場合、基板の銅又は銅合金シートの表面にお
ける熱膨張係数を半導体ペレットの熱膨張係数に近い値
とするために、該シートの厚さを、これが接合されるA
tN焼結体より薄くすることが望ましい。具体的には、
AtN焼結体の厚さを0.4〜0、8■とじた場合、銅
又は銅合金のシートの厚さを該AtN焼結体の厚さに対
して40〜70係の範囲にすることが好ましい。
Furthermore, since the present invention uses a substrate having a laminated structure of a juN sintered body and a copper or copper alloy sheet, which has a thermal expansion coefficient similar to that of a semiconductor pellet (silicon), the thermal expansion coefficient on the surface of the copper sheet of the substrate is similar to that of a semiconductor pellet (silicon). The coefficient of thermal expansion is close to that of the semiconductor pellet to be guided. As a result, it is possible to prevent distortion and cracking of the semiconductor pellet due to thermal shock during heating and use (when the semiconductor (when heat is generated from the pellet) occurs), and it is possible to prevent semiconductor devices equipped with large semiconductor pellets. In this case, in order to make the coefficient of thermal expansion at the surface of the copper or copper alloy sheet of the substrate close to the coefficient of thermal expansion of the semiconductor pellet, the thickness of the sheet is adjusted to the A to which it is bonded.
It is desirable to make it thinner than the tN sintered body. in particular,
When the thickness of the AtN sintered body is 0.4 to 0.8 mm, the thickness of the copper or copper alloy sheet should be in the range of 40 to 70 times the thickness of the AtN sintered body. is preferred.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明に使用するAtN焼結体の製造例、AtN
焼結体を有する基板の製造例、並びに基板に半導体ペレ
ットを塔載した半導体装置の評価例について夫々詳細に
説明する。
Below, examples of manufacturing AtN sintered bodies used in the present invention, AtN
Examples of manufacturing a substrate having a sintered body and evaluation examples of a semiconductor device having semiconductor pellets mounted on the substrate will be described in detail.

〈製造例1〜5〉 平均粒径0.9μmの酸素を3重量%含有するAtN粉
末に平均粒径1μmの酸化イツ) IJウム(Y2O2
)粉末を0.1重量%、0.5重景憾、1重量*、3重
量係及び5重量俤夫々添加した後、ゾールミルを用いて
10時時間式粉砕、混合して重量が200gの5種類の
混合粉末を調整した。つづいて、これら混合粉末に夫々
パラフィンを7重量慢添加し、造粒して5種類の原料を
調整した後、これら原料を300 kg/cm2の圧力
を冷開成形して寸法が63■X29+w+X0.6’3
5瓢tの板状体を作製した。次いで、これら板状体を窒
素ガス雰囲気中で600℃まで加熱し、10時間保持し
て脱脂した後、AtN容器中にセットし、窒素ガス雰囲
気下にて1800℃2時間常圧焼結を行って5種類のA
tN焼結体を製造した。
<Production Examples 1 to 5> AtN powder containing 3% by weight of oxygen with an average particle size of 0.9 μm and IJum (Y2O2) with an average particle size of 1 μm
) After adding 0.1% by weight, 0.5% by weight, 1% by weight*, 3% by weight and 5% by weight of the powder, they were ground using a sol mill for 10 hours and mixed to give a powder with a weight of 200g. Various mixed powders were prepared. Next, 7 parts of paraffin were added to each of these mixed powders and granulated to prepare 5 types of raw materials.These raw materials were then cold-open molded under a pressure of 300 kg/cm2 to obtain a size of 63cm x 29+w+x0. 6'3
A plate-like body of 5 gourds was produced. Next, these plate-shaped bodies were heated to 600°C in a nitrogen gas atmosphere, held for 10 hours to degrease, and then placed in an AtN container and subjected to atmospheric pressure sintering at 1800°C for 2 hours in a nitrogen gas atmosphere. 5 types of A
A tN sintered body was manufactured.

得られた各A−tN焼結体の密度を測定すると共に、レ
ーザフラッシュ法により室温での熱伝導率を測定した。
The density of each obtained A-tN sintered body was measured, and the thermal conductivity at room temperature was also measured by a laser flash method.

その結果を下記第1表に示した。The results are shown in Table 1 below.

なお、第1表中には、酸化イツトリウムを添加しない酸
素を3重量%含有するAtN粉末そのものに・臂ラフイ
ンを7重量係添加した原料を使用した以外、上記したの
と同様な方法により製造したAAN焼結体を比較サンプ
ル1として併記しまた、各サングル1〜5のAtN焼結
体についてX線回折により組織を調べた。その結果いず
れのAtN焼結体もAtN相、f−ネット相及び僅かな
醗窒化物相が検出された。但しY2O,の添加量の多い
級焼結体はど醒窒化物相が減少してガーネット相が増大
していた。
In addition, Table 1 shows materials manufactured by the same method as described above, except that raw materials were used in which 7 parts by weight of arm rough-in were added to the AtN powder itself containing 3% by weight of oxygen without adding yttrium oxide. The AAN sintered body was also shown as Comparative Sample 1, and the structure of each of the AtN sintered bodies of Samples 1 to 5 was examined by X-ray diffraction. As a result, an AtN phase, an f-net phase, and a slight nitride phase were detected in each AtN sintered body. However, in the grade sintered compacts in which a large amount of Y2O was added, the nitride phase decreased and the garnet phase increased.

〈製造例6〜10〉 下記第2表に示すように平均粒径及び酸素含有量の異な
るAtN粉末と、該AtN粉末に対する添加量の異る平
均粒径1μmの酸化イツトリウム粉末とからなる5種類
の混合粉末組成物を?−ルミルを用いて10時時間式粉
砕、混合して重量が200yの5種類の混合粉末を調整
した。
<Manufacturing Examples 6 to 10> As shown in Table 2 below, there are five types of AtN powders with different average particle sizes and oxygen contents, and yttrium oxide powders with an average particle size of 1 μm and different amounts added to the AtN powders. Mixed powder composition? - Using Lumil, 10 hour grinding and mixing were performed to prepare 5 types of mixed powders each weighing 200y.

つづいて、これら混合粉末に夫々パラフィンを7重量幅
添加し、造粒して5種類の原料を調整した後、これら原
料を300 kg/α2の圧力で冷間成形して寸法が6
3 mmX 29 mX O,635mtの板状体を作
製した。次−で、これら板状体を窒素ガス雰囲気中下に
て同第2表に示す温度条件にて常圧焼結を行って5種類
のAtN焼結体を製造した。
Next, 7 weight ranges of paraffin were added to each of these mixed powders and granulated to prepare 5 types of raw materials, and then these raw materials were cold-formed at a pressure of 300 kg/α2 to a size of 6.
A plate-shaped body of 3 mm×29 m×O, 635 mt was prepared. Next, these plate-shaped bodies were subjected to atmospheric pressure sintering under the temperature conditions shown in Table 2 in a nitrogen gas atmosphere to produce five types of AtN sintered bodies.

得られた各AtN焼結体の密度を測定すると共に、製造
例1と同様な方法により熱伝導率を測定した。その結果
を同第2表に示した。なお、第2表中には平均粒径0.
9μmの酸素を20重量係含有するAtN粉末に酸化イ
ツトリウム10重量係を添加した混合粉末を使用した以
外、上記したのと同様な方法により製造したAtN焼結
体を比較サンプル2として併記した。
The density of each obtained AtN sintered body was measured, and the thermal conductivity was also measured by the same method as in Production Example 1. The results are shown in Table 2. Note that in Table 2, the average particle size is 0.
Comparative sample 2 is an AtN sintered body produced in the same manner as described above, except that a mixed powder of AtN powder containing 20 parts by weight of 9 μm oxygen and 10 parts by weight of yttrium oxide was used.

ま之、サンプル6〜10のAtN焼結焼結ウニてX線回
析により組織を調べた。その結果、サンプル6.7のA
tN基板焼結体はktN相と微量のが−ネット相及び僅
かな酸窒化物相が検出された。サンプル8〜10のAt
N焼結体では、ktN相、ガーネット相及び酸窒化物が
検出された。なお、サンプル8〜10のktN 焼結体
ニおいて、AtN粉末中の酸素量が多いサングル10は
どガーネット相が多く検出されると共K、酸窒化物相も
多く検出された。これに対し、比較サンプル2のAtN
焼結体では酸化物が多量に検出された。
The structures of the AtN sintered sea urchins of Samples 6 to 10 were examined by X-ray diffraction. As a result, A of sample 6.7
In the tN substrate sintered body, a ktN phase, a small amount of a -net phase, and a small amount of an oxynitride phase were detected. At of samples 8 to 10
In the N sintered body, ktN phase, garnet phase and oxynitride were detected. In addition, among the ktN sintered bodies of samples 8 to 10, in sample 10, where the amount of oxygen in the AtN powder was large, a large amount of garnet phase was detected, and a large amount of K and oxynitride phases were also detected. On the other hand, AtN of comparative sample 2
A large amount of oxides were detected in the sintered body.

く製造例11〜17> 下記第3表に示す様に酸素を1重量係含有する平均粒径
1μmのAtN粉末に平均粒径1μmのGd2O,粉末
、Dy2O3粉末v L&205粉末、 Ce2O。
Production Examples 11 to 17> As shown in Table 3 below, AtN powder with an average particle size of 1 μm containing 1 weight percent of oxygen, Gd2O powder, Dy2O3 powder, VL&205 powder, and Ce2O with an average particle size of 1 μm.

粉末、 Pr2O3粉末、Nd2O3粉末及びSrn 
20 s粉末を夫々3重°量チ添加してなる混合粉末組
成物を、ゴールミルを用いて10時時間式粉砕、混合し
て重量が200.Fの7種類の混合粉末を調製した。つ
づいて、これら混合粉末に夫々パラフィンを71il係
添加し、造粒して7種類の原料を調製した。次いで、こ
れら原料を用いて製造例1と同様な方法により7種類の
AtN焼結体を製造した。
powder, Pr2O3 powder, Nd2O3 powder and Srn
A mixed powder composition prepared by adding 3 parts by weight of each of the 20s powders was milled and mixed using a goal mill for 10 hours until the weight reached 200s. Seven types of mixed powders of F were prepared. Subsequently, 71 liters of paraffin was added to each of these mixed powders and granulated to prepare seven types of raw materials. Next, seven types of AtN sintered bodies were manufactured using these raw materials in the same manner as in Manufacturing Example 1.

得られた各AtN焼結体の密度を測定すると共に、製造
例1と同様な方法により熱伝導率を測定した。その結果
を同第3表に併記した。
The density of each obtained AtN sintered body was measured, and the thermal conductivity was also measured by the same method as in Production Example 1. The results are also listed in Table 3.

上記第1表〜第3表から明らかなようにサンプル1〜1
7のAtN焼結体は、高密度で、かつ極めて高い熱伝導
率を有し、放熱特性が良好な半導体装置用絶縁板として
使用可能であることが確認された。
As is clear from Tables 1 to 3 above, Samples 1 to 1
It was confirmed that the AtN sintered body of No. 7 has high density and extremely high thermal conductivity, and can be used as an insulating plate for semiconductor devices with good heat dissipation characteristics.

〈基板製造例〉 まず、第1図に示す厚さ0.4−の5つのタフピッチ電
解鋼パターン13〜1eと、第2図に示す厚さ0.3圏
のタフピッチ電解銅板1を用意した。つづいて、前述し
た第3表中のサンプル14のAtN焼結体(厚さ0.6
35■)2の上面に第1図の電解銅/母ターン1&〜1
6を約1.5圏間隔で配置し、かつAtN焼結体2の下
面に第2図の電解鋼板1を重ねた後、窒素ガス雰囲気中
で1075℃、10分間加熱した。この後、はぼ室温ま
で冷却してAtN焼結体2の上面に電解鋼/母ターン1
a〜le、下面に電解銅板1が夫々接合された積層構造
の基板3を作製した(第3図図示)。
<Substrate Manufacturing Example> First, five tough pitch electrolytic steel patterns 13 to 1e having a thickness of 0.4 mm as shown in FIG. 1 and a tough pitch electrolytic copper plate 1 having a thickness of 0.3 mm as shown in FIG. 2 were prepared. Next, the AtN sintered body (thickness 0.6
35■) Electrolytic copper as shown in Figure 1 on the top surface of 2/Mother turn 1&~1
6 were arranged at intervals of about 1.5 circles, and the electrolytic steel plate 1 shown in FIG. 2 was stacked on the bottom surface of the AtN sintered body 2, and then heated at 1075° C. for 10 minutes in a nitrogen gas atmosphere. After that, it is cooled to about room temperature and the electrolytic steel/mother turn 1 is placed on the top surface of the AtN sintered body 2.
A to le, a substrate 3 having a laminated structure with electrolytic copper plates 1 bonded to the bottom surfaces thereof was prepared (as shown in FIG. 3).

得られた基板3を切り出して上下面に電解銅シート(こ
の場合、上面の銅シートの厚さを0.3+wとした〕を
有する幅25閣、長さ10mmの短冊状の試験片人を用
意した。また、AtN焼結体の代りに厚さ0.635m
mのAt203焼結体を用いた以外、上記基板製造例と
略同様な方法により基板(従来例)を作製し、これから
同様に切り出した試験片Aと同寸法を試験片Bを用意し
た。これら試験片A、Bについて、室温から350℃ま
での範囲で加熱し、各温度における銅シート表面の長さ
方向(室温25℃にて10鱈辺〕の寸法変化量を測定し
たところ、第4図に示す特性図を得た。なお、第4図中
のAは本発明の試験片人の特性線、Bは従来の試験片B
の特性線、Cは純銅板の特性線を示す。第4図より明ら
かなように、本発明及び従来の試験片A、Bは共に殆ん
ど直線的に変化していることがわかる。また、第4図の
100〜200℃間の温度絶対値差100℃間の寸法変
化量差を室温寸法(10■)で割り、更に得られた値を
温度絶対差100℃で割ることによって熱膨張係数〔α
〕を求めた。その結果、アルミナ焼結体を用いた従来の
試験片Bでの熱膨張係数(α)は7X10=℃−程度で
あるのに対し、AtN焼結体を用いた本発明の試験片A
での熱膨張係数(α)は5.5 X 10−’℃−1程
度であった。前述し念基板上に直接グイs y y″イ
ングれるシリコンからなる半導体ペレットの熱膨張係数
が概略4.5 X 10”−’℃−1〜6×10 ℃−
であることから、本発明のAtN焼結体を用いた基板上
に寸法の大きい半導体ペレットを直接ダイビンディング
しても半導体ペレットへのクラック発生を防止できるこ
とがわかる。
The obtained substrate 3 was cut out to prepare a rectangular test piece with a width of 25 mm and a length of 10 mm having electrolytic copper sheets on the upper and lower surfaces (in this case, the thickness of the upper copper sheet was 0.3 + W). Also, instead of the AtN sintered body, a thickness of 0.635 m was used.
A substrate (conventional example) was prepared in substantially the same manner as in the above substrate manufacturing example, except that an At203 sintered body of m was used, and a test piece B was prepared having the same dimensions as the test piece A cut out from the substrate in the same manner. These test pieces A and B were heated in the range from room temperature to 350°C, and the amount of dimensional change in the length direction (10 cod sides at room temperature 25°C) of the copper sheet surface at each temperature was measured. The characteristic diagram shown in Fig. 4 was obtained. In Fig. 4, A is the characteristic line of the test piece of the present invention, and B is the characteristic line of the conventional test piece B.
The characteristic line C shows the characteristic line of the pure copper plate. As is clear from FIG. 4, it can be seen that both the present invention and the conventional test pieces A and B change almost linearly. In addition, by dividing the difference in dimensional change between 100°C and the absolute temperature difference between 100 and 200°C in Figure 4 by the room temperature dimension (10■), and further dividing the obtained value by the absolute temperature difference of 100°C, Expansion coefficient [α
] was sought. As a result, the coefficient of thermal expansion (α) of the conventional test piece B using an alumina sintered body was approximately 7×10=°C, whereas the thermal expansion coefficient (α) of the test piece A of the present invention using an AtN sintered body
The coefficient of thermal expansion (α) was approximately 5.5×10-'°C-1. As mentioned above, the coefficient of thermal expansion of a semiconductor pellet made of silicon that can be directly injected onto a substrate is approximately 4.5 x 10'' - 1 to 6 x 10 ℃.
Therefore, it can be seen that even if a large semiconductor pellet is directly die-bound onto a substrate using the AtN sintered body of the present invention, cracks can be prevented from occurring in the semiconductor pellet.

更に、前記本発明及び従来の試験片A、Bを用いて、A
tN焼結体と銅シート間の接合強度、及びAt203焼
結体と銅シート間の接合強度を夫夫評価した。なお、接
合強度は第5図に示すように焼結体40両面に銅シート
515’を有する試験片の銅シート5の端部に直径1.
5+m+の金属棒枦を半田付けし、金属棒σを直上に引
張りて銅シート5が焼結体4から剥がれる時の強度を測
定することにより評価した。その結果、本発明の試験片
Aでは7〜9ゆ/cr!12の接合強度を、従来の試験
片Bでは13〜15 kl?/ctn”の接合強度を示
し、いずれも実用上問題のない値であることがわかった
Furthermore, using the present invention and conventional test pieces A and B, A
The bonding strength between the tN sintered body and the copper sheet and the bonding strength between the At203 sintered body and the copper sheet were evaluated by husband and wife. As shown in FIG. 5, the bonding strength is determined by the diameter of 1.5 mm at the end of the copper sheet 5 of a test piece having copper sheets 515' on both sides of the sintered body 40.
Evaluation was made by soldering a 5+m+ metal rod and measuring the strength when the copper sheet 5 was peeled off from the sintered body 4 by pulling the metal rod σ directly above it. As a result, the test piece A of the present invention showed 7 to 9 Yu/cr! 12, the conventional test piece B has a bonding strength of 13 to 15 kl? /ctn'', and both values were found to be of no practical problem.

〈評価例〉 前述した第3図図示の基板3の無電解銅ノ4ターン1m
、Ibに比較的融点の高い半田層11&。
<Evaluation example> 4 turns 1 m of electroless copper on the substrate 3 shown in Figure 3 mentioned above.
, Ib and a solder layer 11& having a relatively high melting point.

11bを載置した後、該基板3を熱板上に載せ、不活性
ガス雰囲気中で半田の融点以上に加熱して半田層11h
、Ilbを溶融した。つづいて、半導体ペレッ) 12
 a e 1 j bを溶融した半田゛層11a、11
b上に載せ、平面スクラブを加える等により基板3の電
解鋼パターン1m、lbK対し半導体ペレット12*、
12bと充分に濡らし、気泡を巻き込まない状態で半田
付けした。ひきつづき、基板3を熱板から外ずし、室温
まで冷却して基板3に半導体ペレッ) 12 m。
11b, the substrate 3 is placed on a hot plate and heated to a temperature higher than the melting point of the solder in an inert gas atmosphere to form a solder layer 11h.
, Ilb was melted. Next, semiconductor pellets) 12
Solder layers 11a and 11 made by melting a e 1 j b
Semiconductor pellets 12*,
12b, and soldered without entraining air bubbles. Subsequently, the substrate 3 was removed from the hot plate, cooled to room temperature, and semiconductor pellets were placed on the substrate 3 (12 m).

12bをダイビンディングした(第6図(、)図示)。12b (as shown in Figure 6(,)).

次いで、ダイビンディングされた一方の半導体ペレット
12mの・ぐラド部〔図示せず〕と基板3短冊状の電解
銅14’ターン1c及び別のベンツ’F12bがグイデ
ンディングされた電解銅ツタターン1bの短冊状部分と
に超音波ゲンダによりAtワイヤ13を夫々デンディン
グした。また、別の半導体ペレット12bのパッド部(
図示せず)と基板3の短冊状の電解銅・母ターンld。
Next, the groove part [not shown] of one of the die-bound semiconductor pellets 12m, the rectangular electrolytic copper 14' turn 1c of the substrate 3, and the electrolytic copper ivy turn 1b to which the other Benz' F12b was guided are attached. At wires 13 were attached to each of the strip-shaped portions by ultrasonic bending. In addition, the pad portion of another semiconductor pellet 12b (
(not shown) and the strip-shaped electrolytic copper mother turn ld of the substrate 3.

1@とに同様にAtワイヤ13を夫々デンディングした
(第6図(b)図示)。
At wires 13 were dented in the same manner as in 1@ (as shown in FIG. 6(b)).

次いで、ワイヤデンディングされた基板3を銅ペース1
4上に半田シート15を介して重ね九後、予め付けられ
た半田層16を有するIJ−ド端子17の先端を治具等
を用いて基板3上面の各ツヤターンZ a −1eに固
定した。なお、これら半田シート15.半田層16は、
いずれも基板3と半導体ペレット12*、12b間に介
在した半田層11*、11bK比べて融点の低い半田材
料から形成される。つづいて、電気炉内で前記半田シー
ト15.半田層16を充分溶融するまで加熱した後、室
温まで冷却して基板3裏面が銅ペース14に接合され、
かつ複数のリード端子17が基板3上面に接合されたり
フロー構造体18を作製した(第6図(c)図示)。
Next, the wire-ended board 3 is coated with copper paste 1.
4 with a solder sheet 15 interposed therebetween, the tips of the IJ-determined terminals 17 having the solder layer 16 attached in advance were fixed to each gloss turn Z a -1e on the upper surface of the substrate 3 using a jig or the like. Note that these solder sheets 15. The solder layer 16 is
Both are formed from a solder material having a lower melting point than the solder layers 11* and 11bK interposed between the substrate 3 and the semiconductor pellets 12* and 12b. Subsequently, the solder sheet 15. After heating the solder layer 16 until it is sufficiently melted, the solder layer 16 is cooled to room temperature and the back surface of the substrate 3 is bonded to the copper paste 14.
In addition, a plurality of lead terminals 17 were bonded to the upper surface of the substrate 3 to form a flow structure 18 (as shown in FIG. 6(c)).

次いで、リフロー構造体18の上面にエポキシ樹脂枠1
9をシリコーン樹脂接着剤層20を介して接着した。つ
づいて、エポキシ樹脂枠19の上部開口より熱硬化性シ
リコーンポツティング剤を注入、硬化させ、更に熱可塑
性エポキシ樹脂を注入、硬化させ、シリコーンポツティ
ング層21及び熱可塑性エポキシ樹脂層22で封止され
た半導体装置23を製造した(第6図(d)図示〕。
Next, the epoxy resin frame 1 is placed on the top surface of the reflow structure 18.
9 was adhered via a silicone resin adhesive layer 20. Next, a thermosetting silicone potting agent is injected into the upper opening of the epoxy resin frame 19 and cured, and then a thermoplastic epoxy resin is injected and cured, and then sealed with a silicone potting layer 21 and a thermoplastic epoxy resin layer 22. A semiconductor device 23 was manufactured (as shown in FIG. 6(d)).

しかして、上述した工程で製造された半導体装置、及び
前記基板製造例で説明したAA20.焼結体を有する基
板を用いて前記工程と同様にして製造した半導体装置(
従来例〕Kついて、熱抵抗差(Rth )を調べ念。そ
の結果、本発明の半導体装置ではRth=0.41℃/
W、従来の半導体装置ではRth=0.24℃/Wであ
った。これを無限大放熱板換算で消費させることができ
るコレクタ消費電力(Pc)に置き換えて、接合温度T
j=150℃の保証レベルで計算すると、本発明の半導
体装置ではPc=300W、従来の半導体装置ではPe
=520Wとなり、約170憾のPc改善が認められた
Therefore, the semiconductor device manufactured by the above-mentioned process and the AA20. A semiconductor device manufactured in the same manner as the above process using a substrate having a sintered body (
[Conventional example] Regarding K, check the thermal resistance difference (Rth). As a result, in the semiconductor device of the present invention, Rth=0.41°C/
W, Rth=0.24° C./W in the conventional semiconductor device. By replacing this with the collector power consumption (Pc) that can be consumed in terms of an infinite heat sink, the junction temperature T
Calculating at the guaranteed level of j = 150°C, the semiconductor device of the present invention has Pc = 300W, and the conventional semiconductor device has Pc = 300W.
= 520W, and an improvement in Pc of about 170 was recognized.

なお、上記実施例では第3表中のサンプル14のAtN
焼結体を用いて基板を作製し、これに半導体ペレットの
ダイメンf4ング等を行なって半導体装置を製造したが
、サングル14以外の第1表〜第3表に記載したサング
ル(AtN焼結体)を用いても、実施例と同様な効果を
有する基板、半導体装置を得ることができた。
In addition, in the above example, AtN of sample 14 in Table 3
A substrate was prepared using a sintered body, and a semiconductor pellet was subjected to die f4 ringing etc. to manufacture a semiconductor device. ), it was possible to obtain a substrate and a semiconductor device having the same effects as in the example.

〔発明の効果〕〔Effect of the invention〕

以上詳述した如く、本発明によれば半導体(レットから
の交熱をそのペレットがグイデンディングされた基板に
より効率的に放散でき、かつ半導体ペレットへの歪やク
ラ、り発生を防止でき、ひいては寸法の大きい半導体ペ
レットの塔載を可能とすると共に、高性能で高信頼性の
半導体装置を提供できる。
As detailed above, according to the present invention, heat exchanged from the semiconductor pellet can be efficiently dissipated by the substrate on which the pellet is guided, and the occurrence of distortion, cracking, and cracking in the semiconductor pellet can be prevented. As a result, it is possible to load semiconductor pellets with large dimensions, and it is also possible to provide a high-performance and highly reliable semiconductor device.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は夫々本発明の基板作製に用いられる銅
シートの平面図、第3図囚は本発明に用いる基板の平面
図、同図(B)は同図(6)のX−X線に沿う断面図、
第4図は本発明及び従来の半導体装置に用いられる積層
構造の基板における温度変動九対する寸法変化量を示す
特性図、第5図は本発明及び従来の基板における銅シー
トの接合強度の試験状態を示す断面図、第6図(a)〜
(d)は本発明の半導体装置の↓造工程を示す図で、同
図(a) 、 (c)は断面図、同図(b)は平面図、
同図(、)は部分切欠した正面図である。 1a〜1句・・・タフピッチ電解銅ツクターン、I・・
・タフビ、チ電解銅板、2・・・AtN焼結体、3・・
・基板、12h、12b・・・半導体ペレット、13・
・・AAワイヤ、14・・・銅ペース、17・・・IJ
−)’端子、18・・・リフロー構造体、19・・・エ
ポキシ樹脂枠、21・・・シリコーンポツティング層、
22・・・エポキシ樹脂層、23・・・半導体装置。 第1図    第2図 ll 第5図 ↑ 5′ 第6図 第6図 昭和 年 月 日 特許庁長官 宇 賀 道 部   殿 1、事件の表示 特願昭60−66911号 2、発明の名称  ・ 半導体装置 3、補正をする者 事件との関係 特許出願人 (307)株式会社 東芝 4、代理人 昭和60年6月25日 7、補正の内容 明細書中梁29頁11〜12行目:ニカ1(すて。 「同図(e)」とあるを「同図(d)」と訂正する。
Figures 1 and 2 are plan views of the copper sheet used in the production of the substrate of the present invention, Figure 3 is a plan view of the substrate used in the present invention, and (B) is a plan view of the copper sheet used in the production of the substrate of the present invention. - a cross-sectional view along the X-ray;
Fig. 4 is a characteristic diagram showing the amount of dimensional change with respect to temperature fluctuation in laminated structure substrates used in the present invention and conventional semiconductor devices, and Fig. 5 is a test state of the bonding strength of copper sheets in the present invention and conventional substrates. 6(a) - sectional view showing
(d) is a diagram showing the manufacturing process of the semiconductor device of the present invention, (a) and (c) are cross-sectional views, and (b) is a plan view.
The figure (,) is a partially cutaway front view. 1a ~ 1st phrase...Tough pitch electrolytic copper tsukturn, I...
・Tough vinyl, electrolytic copper plate, 2... AtN sintered body, 3...
・Substrate, 12h, 12b...Semiconductor pellet, 13・
...AA wire, 14...Copper paste, 17...IJ
-)' terminal, 18... reflow structure, 19... epoxy resin frame, 21... silicone potting layer,
22... Epoxy resin layer, 23... Semiconductor device. Fig. 1 Fig. 2 ll Fig. 5↑ 5' Fig. 6 Fig. 6 Mr. Michibe Uga, Director General of the Japan Patent Office, Date of Showa 1, Indication of Case Patent Application No. 1983-66911 2, Title of Invention - Semiconductor Device 3, Relationship with the case of the person making the amendment Patent applicant (307) Toshiba Corporation 4, Agent June 25, 1985 7, Liang 29, lines 11-12 of the specification of contents of the amendment: Nika 1 (Note: Correct the text "same figure (e)" to "same figure (d)."

Claims (5)

【特許請求の範囲】[Claims] (1)銅又は銅合金のシートを、窒化アルミニウム板の
少なくとも片面に接触して配置し、加熱して生成する銅
と酸素の共晶を利用して該窒化アルミニウム板に接合し
た積層構造の基板と、この基板の銅又は銅合金のシート
表面にダイボンディングされた半導体ペレットとを具備
したことを特徴とする半導体装置。
(1) A substrate with a laminated structure in which a sheet of copper or copper alloy is placed in contact with at least one side of an aluminum nitride plate and bonded to the aluminum nitride plate using the eutectic of copper and oxygen produced by heating. and a semiconductor pellet die-bonded to the surface of a copper or copper alloy sheet of the substrate.
(2)銅又は銅合金のシートが窒化アルミニウム板の厚
さより薄いことを特徴とする特許請求の範囲第1項記載
の半導体装置。
(2) The semiconductor device according to claim 1, wherein the copper or copper alloy sheet is thinner than the aluminum nitride plate.
(3)窒化アルミニウム板が、酸素を0.001〜7重
量%含む窒化アルミニウム粉末を主成分とし、これに希
土類元素粉末及び希土類元素含有物質粉末から選ばれる
少なくとも1種を希土類換算で0.01〜15重量%混
合し、焼結してなる焼結体で、トータル酸素量が0.0
1〜20重量%含むものであることを特徴とする特許請
求の範囲第1項記載の半導体装置。
(3) The aluminum nitride plate has aluminum nitride powder containing 0.001 to 7% by weight of oxygen as a main component, and at least one selected from rare earth element powder and rare earth element-containing substance powder to 0.01% by weight in terms of rare earth element. A sintered body made by mixing ~15% by weight and sintering, with a total oxygen content of 0.0
2. The semiconductor device according to claim 1, wherein the semiconductor device contains 1 to 20% by weight.
(4)希土類元素としてイットリウムを用いることを特
徴とする特許請求の範囲第3項記載の半導体装置。
(4) The semiconductor device according to claim 3, wherein yttrium is used as the rare earth element.
(5)希土類元素含有物質として酸化イットリウムを用
いることを特徴とする特許請求の範囲第3項記載の半導
体装置。
(5) The semiconductor device according to claim 3, wherein yttrium oxide is used as the rare earth element-containing substance.
JP6691185A 1985-03-30 1985-03-30 Semiconductor device Pending JPS61225823A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6691185A JPS61225823A (en) 1985-03-30 1985-03-30 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6691185A JPS61225823A (en) 1985-03-30 1985-03-30 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS61225823A true JPS61225823A (en) 1986-10-07

Family

ID=13329621

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6691185A Pending JPS61225823A (en) 1985-03-30 1985-03-30 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS61225823A (en)

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