JPS6122462B2 - - Google Patents
Info
- Publication number
- JPS6122462B2 JPS6122462B2 JP55155342A JP15534280A JPS6122462B2 JP S6122462 B2 JPS6122462 B2 JP S6122462B2 JP 55155342 A JP55155342 A JP 55155342A JP 15534280 A JP15534280 A JP 15534280A JP S6122462 B2 JPS6122462 B2 JP S6122462B2
- Authority
- JP
- Japan
- Prior art keywords
- capillary
- semiconductor element
- thermocompression bonding
- thin metal
- metal wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 23
- 239000002184 metal Substances 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 238000010438 heat treatment Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 7
- 229910000679 solder Inorganic materials 0.000 description 11
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 6
- 239000010931 gold Substances 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 238000002844 melting Methods 0.000 description 4
- 230000008018 melting Effects 0.000 description 4
- 229910001120 nichrome Inorganic materials 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 230000006698 induction Effects 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/78252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the capillary or wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78301—Capillary
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
- H01L2224/8518—Translational movements
- H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
本発明は、半導体素子の電極部に金属細線を熱
圧着する工程を含む半導体装置の組立方法に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for assembling a semiconductor device, which includes a step of thermocompression bonding a thin metal wire to an electrode portion of a semiconductor element.
従来、半導体素子表面上の電極部に金属細線を
熱圧着する工程を含む半導体装置の組立方法は、
第１図に示す様に、ヒータブロツク６により、リ
ードフレーム５、ソルダ４、半導体素子３を加熱
し、キヤピラリー１を下げて荷重を加え、金属細
線２を熱圧着する方法である。 Conventionally, a method for assembling a semiconductor device includes a process of thermocompression bonding a thin metal wire to an electrode portion on the surface of a semiconductor element.
As shown in FIG. 1, the lead frame 5, solder 4, and semiconductor element 3 are heated by a heater block 6, the capillary 1 is lowered to apply a load, and the thin metal wire 2 is bonded by thermocompression.
このような従来の方法では、熱源が半導体素子
３に対してリードフレーム５の反対側のヒータブ
ロツク６内にあるので、リードフレーム５、ソル
ダ４、そして半導体素子をよく加熱する。しか
し、リードフレーム５、ソルダ４など加熱しなく
ても良い所まで加熱することになるので熱の消費
量が多い。また、ある一定の熱圧着強度を維持す
る為には、温度を高くしなければならないが、低
融点のソルダを使用した時、ソルダ４が溶融して
半導体素子３が動き、所定の電極部への熱圧着が
困難である。しかも、熱圧着が出来ても、その後
金線を張る時に、半導体素子３がリードフレーム
５に固定されていないので半導体素子が浮いてし
まい、その後の作業が出来なくなる。その為、温
度を下げて熱圧着しなければならず、ある一定の
熱圧着強度が維持出来ないという欠点があつた。 In such a conventional method, since the heat source is located in the heater block 6 on the opposite side of the lead frame 5 to the semiconductor element 3, the lead frame 5, the solder 4, and the semiconductor element are well heated. However, since parts such as the lead frame 5 and the solder 4 that do not need to be heated are heated, a large amount of heat is consumed. In addition, in order to maintain a certain thermocompression bonding strength, the temperature must be raised, but when a low melting point solder is used, the solder 4 melts and the semiconductor element 3 moves, moving to the specified electrode part. thermocompression bonding is difficult. Moreover, even if thermocompression bonding is possible, when the gold wire is attached afterwards, since the semiconductor element 3 is not fixed to the lead frame 5, the semiconductor element will float, making subsequent work impossible. Therefore, the thermocompression bonding had to be carried out at a lower temperature, and a certain level of thermocompression bonding strength could not be maintained.
本発明の目的は、半導体素子に対する金属細線
の熱圧着に際し、半導体素子を固着しているソル
ダの溶融を引起すことなく、一定強度以上の熱圧
着が、従来より少ない加熱電力の下で容易に得る
ことができる半導体装置の組立方法を提供するに
ある。 An object of the present invention is to easily perform thermocompression bonding of a thin metal wire to a semiconductor element with less heating power than before, without causing melting of the solder that fixes the semiconductor element, and with a certain strength or higher. An object of the present invention is to provide a method for assembling a semiconductor device that can be obtained.
本発明の方法は、半導体素子表面上の電極部に
金属細線を熱圧着するのに際し、前記金属細線を
供給するキヤピラリーの外周に加熱手段を設け、
この加熱手段により前記キヤピラリーを熱圧着に
必要な温度に加熱して前記金属細線を熱圧着する
工程を含んでいる。 In the method of the present invention, when thermocompression bonding a thin metal wire to an electrode portion on the surface of a semiconductor element, a heating means is provided on the outer periphery of a capillary that supplies the thin metal wire,
The method includes a step of heating the capillary to a temperature necessary for thermocompression bonding using the heating means and thermocompression bonding the thin metal wire.
つぎに本発明を実施例により説明する。 Next, the present invention will be explained by examples.
第２図は本発明の一実施例を説明するためのキ
ヤピラリーおよび金属細線、半導体素子などを示
す側面図である。 FIG. 2 is a side view showing a capillary, a thin metal wire, a semiconductor element, etc. for explaining one embodiment of the present invention.
第２図において、加工台８は、何らの熱源を含
まず、単に金細線２が熱圧着される半導体素子３
を支持するだけのものである。キヤピラリー１１
は、外周にニクロム線７が巻かれており、キヤピ
ラリー１１を下げて金ボルール２ａを半導体素子
３の表面の電極部に熱圧着するときに、ニクロム
線７により加熱されたキヤピラリーにより金ボー
ル２ａに熱を加えて熱圧着するのである。 In FIG. 2, the processing table 8 does not include any heat source and simply holds the semiconductor element 3 to which the thin gold wire 2 is bonded by thermocompression.
It only supports the. Capillary 11
A nichrome wire 7 is wound around the outer periphery, and when the capillary 11 is lowered to thermocompress the gold ball 2a to the electrode part on the surface of the semiconductor element 3, the capillary heated by the nichrome wire 7 wraps around the gold ball 2a. Heat is applied to bond them by thermocompression.
このように、本発明では、ヒータブロツクを使
用せずに、そのために、リードフレーム、ソルダ
は加熱されず、キヤピラリーのみがその外周の加
熱ヒータにより加熱されて熱圧着するので、熱の
消費が従来のヒータブロツクによる加熱に比べて
少くて済済む。さらに、低融点ソルダを使用した
ときでもソルダを溶融させることなしに熱圧着で
きる。すなわち、ソルダの温度を上げずに、金ボ
ール、半導体素子の方に充分高い温度に加熱でき
るので、強固な熱圧着が確実に得られる。なお、
加熱手段として、上記加熱ヒータの代わりに高周
波の誘導加熱を用いることもでき、これは、急速
加熱にとつて有利である。 In this way, the present invention does not use a heater block, and therefore the lead frame and solder are not heated, and only the capillary is heated by the heater on its outer periphery for thermocompression bonding, so heat consumption is reduced compared to conventional methods. The amount of heating required is less than that required by a heater block. Furthermore, even when a low melting point solder is used, thermocompression bonding can be performed without melting the solder. That is, since the gold balls and semiconductor elements can be heated to a sufficiently high temperature without raising the temperature of the solder, strong thermocompression bonding can be reliably obtained. In addition,
As a heating means, high frequency induction heating can also be used instead of the above-mentioned heater, which is advantageous for rapid heating.
第１図は従来の熱圧着を説明するための側面
図、第２図は本発明の一実施例を説明するための
側面図である。
１，１１……キヤピラリー、２……金属細線、
２ａ……金ボール、３……半導体素子、４……ソ
ルダ、５……リードフレーム、６……ヒータブロ
ツク、７……ニクロム線、８……加工台。
FIG. 1 is a side view for explaining conventional thermocompression bonding, and FIG. 2 is a side view for explaining one embodiment of the present invention. 1, 11...capillary, 2...metal thin wire,
2a... Gold ball, 3... Semiconductor element, 4... Solder, 5... Lead frame, 6... Heater block, 7... Nichrome wire, 8... Processing table.
Claims (1)
用いて金属細線を熱圧着する工程を含む半導体装
置の組立方法において、前記半導体素子を固着し
たリードフレームを加熱手段を有しない加工台上
に載置し、前記金属細線をキヤピラリーに通した
まま該キヤピラリーを外周から加熱し、熱圧着温
度に加熱したキヤピラリーで金属細線を前記電極
部に押し付け、キヤピラリーからの熱伝導により
熱圧着することを特徴とする半導体装置の組立方
法。1. In a method for assembling a semiconductor device, which includes a step of thermocompression bonding a thin metal wire to an electrode portion on the surface of a semiconductor element using a capillary, a lead frame to which the semiconductor element is fixed is placed on a processing table having no heating means. , a semiconductor characterized in that the capillary is heated from the outer periphery while the thin metal wire is passed through the capillary, the thin metal wire is pressed against the electrode part by the capillary heated to a thermocompression bonding temperature, and the thin metal wire is thermocompression bonded by heat conduction from the capillary. How to assemble the device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55155342A JPS5779630A (en) | 1980-11-05 | 1980-11-05 | Assembling of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55155342A JPS5779630A (en) | 1980-11-05 | 1980-11-05 | Assembling of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5779630A JPS5779630A (en) | 1982-05-18 |
| JPS6122462B2 true JPS6122462B2 (en) | 1986-05-31 |
Family
ID=15603789
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55155342A Granted JPS5779630A (en) | 1980-11-05 | 1980-11-05 | Assembling of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5779630A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0334764U (en) * | 1989-08-10 | 1991-04-04 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51430A (en) * | 1974-06-22 | 1976-01-06 | Goro Nishizawa | SHITSUNAI GORUFUJUGIHO |
-
1980
- 1980-11-05 JP JP55155342A patent/JPS5779630A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51430A (en) * | 1974-06-22 | 1976-01-06 | Goro Nishizawa | SHITSUNAI GORUFUJUGIHO |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0334764U (en) * | 1989-08-10 | 1991-04-04 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5779630A (en) | 1982-05-18 |
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