JPS61224443A - Bonding wire for semiconductor device - Google Patents

Bonding wire for semiconductor device

Info

Publication number
JPS61224443A
JPS61224443A JP60065142A JP6514285A JPS61224443A JP S61224443 A JPS61224443 A JP S61224443A JP 60065142 A JP60065142 A JP 60065142A JP 6514285 A JP6514285 A JP 6514285A JP S61224443 A JPS61224443 A JP S61224443A
Authority
JP
Japan
Prior art keywords
wire
bonding wire
bonding
elongation
unavoidable impurities
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60065142A
Other languages
Japanese (ja)
Inventor
Naoyuki Hosoda
細田　直之
Naoki Uchiyama
直樹 内山
Ryusuke Kawanaka
川中　龍介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Metal Corp
Original Assignee
Mitsubishi Metal Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Metal Corp filed Critical Mitsubishi Metal Corp
Priority to JP60065142A priority Critical patent/JPS61224443A/en
Priority to GB8607529A priority patent/GB2178761B/en
Priority to KR1019860002278A priority patent/KR900001243B1/en
Priority to DE19863610582 priority patent/DE3610582A1/en
Priority to US06/845,176 priority patent/US4726859A/en
Publication of JPS61224443A publication Critical patent/JPS61224443A/en
Priority to SG931/90A priority patent/SG93190G/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/43—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/43—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/43—Manufacturing methods
    • H01L2224/438—Post-treatment of the connector
    • H01L2224/43848—Thermal treatments, e.g. annealing, controlled cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10252—Germanium [Ge]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/207—Diameter ranges
    • H01L2924/20752—Diameter ranges larger or equal to 20 microns less than 30 microns

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain an extra slender wire possessing sufficient elongation, strength and hardness required to a bonding wire at low cost, by a method CONSTITUTION:A wire in which contents of S and Ag as unavoidable impurities are 2ppm or less respectively, consisting of high pure copper extra slender wire having 10ppm or less of total content of unavoidable impurities, and more over, having 10-20% of elongation, 14-33kg/mm<2> of breaking strength and 40-50 of Vickers hardness in the raw material condition, is used for the bonding wire. For example, oxygen-free copper is used as the raw material, and after purification according to the electrolytic process or the zone melting method is performed repeatedly, a high pure copper material having the prescribed purity is manufactured according to the vacuum melting method, the extra slender wire having the diameter of 25mum is formed therefrom according to the hot rolling method and the cold rolling method, and bright heat-treatment in which the wire is held at 300-400 deg.C for 1-2 sec is performed to the wire to obtain a bonding wire.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、高純度銅極細線で構成された半導体装置用
ポンディングワイヤに関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a bonding wire for semiconductor devices made of ultrafine high-purity copper wire.

〔従来の技術〕[Conventional technology]

従来、一般に、半導体装置としてトランジスタやＩＣ１
さらにＬＳＩなどが知られているが、この中で、例えば
ＩＣの製造法の１つとして、（ａ）　　まず、リードフ
レーム素材として板厚＝０．１〜０．３鋼を有する条材
を用意し。Conventionally, transistors and IC1s have generally been used as semiconductor devices.
Furthermore, LSI etc. are known, and among these, for example, as one of the manufacturing methods of IC, (a) First, a strip material having a plate thickness of 0.1 to 0.3 steel is prepared as a lead frame material. death.

■　上記リードフレーム素材よりエツチングまたはプレ
ス打抜き加工により製造せんとするＩＣの形状に適合し
たリードフレームを形成し、（Ｃ）　　ついで、上記リ
ードフレームの所定個所に高純度ＳｉあるいはＧｅなど
の半導体チップを、Ａｇペーストなどの導電性樹脂を用
いて加熱接着するか、あるいは予め上記半導体チップお
よびリードフレームの片面に形成しておいたＡｎ　、　
Ａｇ　、　Ｎｉ、あるいはこれらの合金層を介してはん
だまたはろう付けし、 （ｄ）　　上記半導体チップと上記リードフレームとに
渡って、ボンディングワイヤとしてＡｕ極細線を用いて
結線を施し、 （ｅ）　　引続いて、上記の半導体チップ、結線、およ
び半導体チップが取付けられた部分のリードフレームを
、これらを保護する目的で、プラスチックで封止し、 （０最終的に、上記リードフレームにおける相互に連な
る部分を切除してＩＣを形成する、以上（ａ）〜（ｆ）
の主要工程からなる方法が知られている。このように半
導体装置の製造Ｃ：は、通常ボンディングワイヤとして
Ａｕ極細線、が用いられている。■ Form a lead frame that matches the shape of the IC to be manufactured by etching or press punching from the lead frame material, (C) Next, place semiconductor chips such as high-purity Si or Ge at predetermined locations on the lead frame. , by heat bonding using a conductive resin such as Ag paste, or by pre-forming An on one side of the semiconductor chip and lead frame,
soldering or brazing via a layer of Ag, Ni, or an alloy thereof; (d) connecting the semiconductor chip and the lead frame using an ultrafine Au wire as a bonding wire; (e) pulling the wire. Next, the semiconductor chip, the wiring, and the lead frame where the semiconductor chip is attached are sealed with plastic for the purpose of protecting them. (a) to (f) above to form an IC by excising the
A method consisting of the following main steps is known. As described above, in the manufacture of semiconductor devices C:, ultrafine Au wires are usually used as bonding wires.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このように半導体装置の製造には、ボンディングワイヤ
としてＡｕ極細線が使用されているが、これの代替材料
として無酸素銅極細線を用いる試みがなされている。As described above, ultrafine Au wires are used as bonding wires in the manufacture of semiconductor devices, but attempts have been made to use ultrafine oxygen-free copper wires as an alternative material.

しかし、無酸素銅極細線においては、ボンディング時に
、ワイヤ先端に形成されたボールの硬さがＡｕ極細線に
比しく硬くなるために、例えば３ｉ半導体チップの表面
に形成されたＡｔ合金の配線皮膜を破損し易く、さらに
ワイヤ自体の剛性（強度および伸び）が低いので、適正
なワイヤループ形状を保持するのが困難であるばかりで
なく、リードフレーム側へのボンディング時にワイヤ切
れな起し易くなるなど半導体装置への適用は困難である
のが現状である。However, in the case of oxygen-free copper ultrafine wires, the hardness of the ball formed at the tip of the wire during bonding is harder than that of Au ultrafine wires, so for example, the At alloy wiring film formed on the surface of a 3i semiconductor chip Furthermore, since the wire itself has low rigidity (strength and elongation), it is not only difficult to maintain a proper wire loop shape, but also tends to cause wire breakage when bonding to the lead frame side. At present, it is difficult to apply it to semiconductor devices such as.

〔問題点を解決するための、手段〕[Means for solving problems]

そこで、本発明者等は、上述のような親扉から。 Therefore, the present inventors started from the main door as described above.

半導体装置のボンディングワイヤに要求される伸び強度
、さらに硬さを具備し、かつ安価な極細線を開発すべく
研究を行なった結集。A culmination of research to develop an inexpensive ultra-fine wire that has the elongation strength and hardness required for bonding wires for semiconductor devices.

不可避不純物としてのＳおよびＡｇ成分の含有量が、そ
れぞれ、 Ｓ　：　２　ｐｐｍ以下、 Ａｇ　：　２　ｐｐｍ以下、 にして、不可避不純物の全含有量を１０　ｐｐｍ以下と
した高純度銅極細線は、伸び：１０〜２０憾、破断強度
：１４〜３３　Ｋｔ／−（例えば直径：２５μｍの極細
線で７〜１６ｇの破断荷重に相当）を有し。A high-purity copper ultrafine wire in which the contents of S and Ag components as unavoidable impurities are respectively S: 2 ppm or less and Ag: 2 ppm or less, and the total content of unavoidable impurities is 10 ppm or less, is : 10 to 20, breaking strength: 14 to 33 Kt/- (e.g., equivalent to a breaking load of 7 to 16 g for an ultrafine wire with a diameter of 25 μm).

さらにその素材状態でビッカース硬さ：４０〜５０の硬
さを有し、これらの特性を有する高純度銅極細線は半導
体装置のボンディングワイヤとして用いるのシニ適する
ものであるという知見を得たのである。Furthermore, the material state of the wire has a Vickers hardness of 40 to 50, and we have found that ultrafine high-purity copper wires with these characteristics are highly suitable for use as bonding wires for semiconductor devices. .

なお、この発明のボンディングワイヤにおける不可避不
純物の上限値は、多数の実験結果にもとづいて経験的に
定めたものであり、したがって。Note that the upper limit of unavoidable impurities in the bonding wire of the present invention has been determined empirically based on the results of numerous experiments.

不可避不純物のうちの特にＳおよびＡｇ成分の含有量、
並びに不可避不純物の全含有量がそれぞれ上記の上限値
を越えると、極細線の性質がボンディングワイヤとして
用いるのＣ；適さない性質に急激に変化するようになっ
て半導体装置のボンディングワイヤとして実用に供する
ことができなくなるのである。Especially the content of S and Ag components among inevitable impurities,
In addition, when the total content of unavoidable impurities exceeds the above upper limits, the properties of the ultra-fine wire suddenly change to properties that are unsuitable for use as a bonding wire, making it difficult to use it as a bonding wire for semiconductor devices. It becomes impossible to do so.

〔実施例〕〔Example〕

つぎに、この発明のボンディングワイヤを実施例Ｃ二よ
り具体的に説明する。Next, the bonding wire of the present invention will be explained in more detail from Example C2.

原料として無酸素銅を用い、これに通常の電解法あるい
は帯域溶融法による精製を繰り返し行なつた後、同じく
通常の真空溶解法にて、それぞれ第１表に示される純度
をもった高純度銅素材を製造し、この高純度銅素材のビ
ッカース硬さを測定し、ついでこれより通常の熱間およ
び冷間圧延法ニテ直径：２５μｍの極細線とし、これに
温度＝３００〜４００Ｃに１〜２秒保持の光輝熱処理を
施すことによって、本発明ワイヤ】〜５および比較ワイ
ヤ１〜３をそれぞれ製造した。Oxygen-free copper is used as a raw material, and after repeated purification using the normal electrolytic method or zone melting method, high-purity copper with the purity shown in Table 1 is produced using the same normal vacuum melting method. A raw material is manufactured, the Vickers hardness of this high purity copper material is measured, and then it is made into an ultra-fine wire with a diameter of 25 μm using normal hot and cold rolling methods, and then rolled at a temperature of 300 to 400C for 1 to 2 hours. Wires of the present invention] to 5 and comparative wires 1 to 3 were produced by applying a bright heat treatment held for seconds.

ついで、この結果得られた本発明ワイヤ１〜５および比
較ワイヤ１〜３について、伸びと破断荷重を測定した。Next, the elongation and breaking load of the resulting wires of the present invention 1 to 5 and comparative wires 1 to 3 were measured.

また、これらのワイヤを用いて半導体装置のボンディン
グを行ない、ループ形状およびリードフレーム側のワイ
ヤ切れ状態を顕微鏡にて観察した。これらの結果を第１
表に合せて示した。Furthermore, bonding of semiconductor devices was performed using these wires, and the loop shape and wire breakage state on the lead frame side were observed using a microscope. These results are the first
Shown in the table.

〔発明の効果〕〔Effect of the invention〕

第１表（二足される結果から１本発明ワイヤ１〜５は、
いずれも半導体装置のボンディングワイヤとして用いる
のに適した伸びおよび破断強度、さらに素材硬さを有し
、かつループ形状も正常にしてワイヤ切れの発生も皆無
であるのに対して、比較ワイヤ１〜３に見られるように
、不可避不純物の含有量がこの発明の範囲から高い方に
外れると、伸びが低下する一方、素材硬さが著しく増す
ようになって、ボンディングワイヤとして用いるのに困
難となり、この結果としてループ形状が異常となるばか
りでなく、ワイヤ切れが発生するものであった。Table 1 (from the results of the two additions, 1 the invention wires 1 to 5 are:
All of them have elongation, breaking strength, and material hardness suitable for use as bonding wires for semiconductor devices, have normal loop shapes, and have no occurrence of wire breakage. 3, when the content of unavoidable impurities deviates from the range of the present invention, the elongation decreases while the material hardness increases significantly, making it difficult to use as a bonding wire. As a result, not only the loop shape becomes abnormal, but also wire breakage occurs.

上述のように、この発明の高純度銅極細線は、半導体装
置のボンディングワイヤとして用いるのに適した、伸び
＝１０〜２０憾、破断強度＝１４〜３３１Ｃｔ／−を有
し、かつその素材状態でビッカース硬さ：４０〜５０の
硬さをもつのである。As mentioned above, the high-purity copper ultrafine wire of the present invention has an elongation of 10 to 20 Ct/-, a breaking strength of 14 to 331 Ct/-, and has a material state suitable for use as a bonding wire for semiconductor devices. It has a Vickers hardness of 40 to 50.

Claims (1)

【特許請求の範囲】 　不可避不純物としてのＳおよびＡｇ成分の含有量を、
それぞれ、 Ｓ：２ｐｐｍ以下、 Ａｇ：２ｐｐｍ以下、 とすると共に、不可避不純物の全含有量を１０ｐｐｍ以
下とした高純度銅極細線からなり、かつ、この高純度銅
極細線は、 伸び：１０〜２０％、 破断強度：１４〜３３ｋｇ／ｍｍ＾２、 をもつと共に、その素材状態でビッカース硬さ：４０〜
５０の硬さをもつことを特徴とする半導体装置用ボンデ
ィングワイヤ。[Claims] The content of S and Ag components as inevitable impurities is
Each is made of a high-purity copper ultra-fine wire with S: 2 ppm or less, Ag: 2 ppm or less, and the total content of unavoidable impurities is 10 ppm or less, and this high-purity copper ultra-fine wire has an elongation of 10 to 20. %, breaking strength: 14~33kg/mm^2, and Vickers hardness: 40~
A bonding wire for semiconductor devices characterized by having a hardness of 50.
JP60065142A 1985-03-29 1985-03-29 Bonding wire for semiconductor device Pending JPS61224443A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP60065142A JPS61224443A (en) 1985-03-29 1985-03-29 Bonding wire for semiconductor device
GB8607529A GB2178761B (en) 1985-03-29 1986-03-26 Wire for bonding a semiconductor device
KR1019860002278A KR900001243B1 (en) 1985-03-29 1986-03-27 Bonding wire for semiconductor device
DE19863610582 DE3610582A1 (en) 1985-03-29 1986-03-27 WIRE FOR BONDING SEMICONDUCTOR DEVICES
US06/845,176 US4726859A (en) 1985-03-29 1986-03-27 Wire for bonding a semiconductor device
SG931/90A SG93190G (en) 1985-03-29 1990-11-17 Wire for bonding a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60065142A JPS61224443A (en) 1985-03-29 1985-03-29 Bonding wire for semiconductor device

Publications (1)

Publication Number Publication Date
JPS61224443A true JPS61224443A (en) 1986-10-06

Family

ID=13278335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60065142A Pending JPS61224443A (en) 1985-03-29 1985-03-29 Bonding wire for semiconductor device

Country Status (1)

Country Link
JP (1) JPS61224443A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145756A (en) * 1985-12-20 1987-06-29 Sumitomo Metal Mining Co Ltd Copper wirings for bonding
JPS644444A (en) * 1987-06-26 1989-01-09 Nippon Mining Co Copper wire for sound and its production
CN105161476A (en) * 2015-06-19 2015-12-16 汕头市骏码凯撒有限公司 Bonding copper wire for fine-pitch IC packaging and manufacturing method thereof
US9809872B2 (en) 2009-04-17 2017-11-07 Hitachi Metals, Ltd. Dilute copper alloy material, dilute copper alloy wire, dilute copper alloy twisted wire and cable using the same, coaxial cable and composite cable, and method of manufacturing dilute copper alloy material and dilute copper alloy wire

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60124959A (en) * 1983-12-09 1985-07-04 Sumitomo Electric Ind Ltd Wire for connecting semiconductor element
JPS60223149A (en) * 1984-04-19 1985-11-07 Hitachi Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60124959A (en) * 1983-12-09 1985-07-04 Sumitomo Electric Ind Ltd Wire for connecting semiconductor element
JPS60223149A (en) * 1984-04-19 1985-11-07 Hitachi Ltd Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145756A (en) * 1985-12-20 1987-06-29 Sumitomo Metal Mining Co Ltd Copper wirings for bonding
JPS644444A (en) * 1987-06-26 1989-01-09 Nippon Mining Co Copper wire for sound and its production
JPH042656B2 (en) * 1987-06-26 1992-01-20
US9809872B2 (en) 2009-04-17 2017-11-07 Hitachi Metals, Ltd. Dilute copper alloy material, dilute copper alloy wire, dilute copper alloy twisted wire and cable using the same, coaxial cable and composite cable, and method of manufacturing dilute copper alloy material and dilute copper alloy wire
CN105161476A (en) * 2015-06-19 2015-12-16 汕头市骏码凯撒有限公司 Bonding copper wire for fine-pitch IC packaging and manufacturing method thereof

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