JPS61224043A - Interruption control circuit of microcomputer - Google Patents

Interruption control circuit of microcomputer

Info

Publication number
JPS61224043A
JPS61224043A JP60065326A JP6532685A JPS61224043A JP S61224043 A JPS61224043 A JP S61224043A JP 60065326 A JP60065326 A JP 60065326A JP 6532685 A JP6532685 A JP 6532685A JP S61224043 A JPS61224043 A JP S61224043A
Authority
JP
Japan
Prior art keywords
circuit
signal
interruption
control circuit
sampling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60065326A
Other languages
Japanese (ja)
Inventor
Shigeki Hosogoe
細越 茂基
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60065326A priority Critical patent/JPS61224043A/en
Publication of JPS61224043A publication Critical patent/JPS61224043A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To respond to an external interruption quickly and to improve the efficiency of the interruption processing by short-circuiting a sampling circuit with a switch circuit when the noise preventing function of an interruption control circuit is unnecessary. CONSTITUTION:The interruption control circuit to which an interruption signal 5 is inputted from an external device 1 is provided with a sampling circuit 2 which samples the signal 5, and a noise component of the signal 5 is eliminat ed by the circuit 2 tosupply the signal 5 to an interruption signal generating circuit 3, and an interruption signal generated by the circuit 3 is inputted to a computer. A switch circuit 4 is connected to the input side and the output side of the circuit of this control circuit. If the noise component of the signal 5 from the device 1 is small and the noise preventing function of the circuit 2 is unnecessary, the circuit 2 is short-circuited by the switch circuit 4 to respond to the signal quickly, and the interruption processing is performed efficiently.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はマイクロコンピュータの割込制御回路に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interrupt control circuit for a microcomputer.

〔従来の技術〕[Conventional technology]

従来、マイクロコンピュータの外部割込制御回路は、ノ
イズによる誤動作を防ぐ為、第2図の様に外部装置lか
らの割込み信号5をサンプリング回路2に入力し、この
サンプリング回路2により正規の割込み信号5であると
判別された信号のみが、内部の割込要求信号発生回路3
に伝達寧れていた。
Conventionally, in order to prevent malfunctions caused by noise, the external interrupt control circuit of a microcomputer inputs an interrupt signal 5 from an external device 1 to a sampling circuit 2 as shown in FIG. Only the signal determined to be 5 is sent to the internal interrupt request signal generation circuit 3.
The communication was smooth.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

この為、割込信号5が外部回路により波形整形され、ノ
イズの影響を考厘する必要がないシステムに於いては、
このサンプリング回路2によるノイズ除去機能により、
割込に対する応答が遅くなってしまうという欠点があっ
た。
Therefore, in a system where the interrupt signal 5 is waveform-shaped by an external circuit and there is no need to consider the influence of noise,
Due to the noise removal function of this sampling circuit 2,
The drawback is that the response to interrupts is slow.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の割込制御回路は、割込み信号を受けるサンプリ
ング回路と、このサンプリング回路の入力端と出力端と
を短絡するかどうかを制御するスイッチ回路とを有し、
ノイズ除去の必要がない場合にはスイッチ回路をオン状
態にし、サンプリング回路を介さずに外部からの割込信
号を直接内部の割込要求信号発生回路へ供給する様にな
っている。
The interrupt control circuit of the present invention includes a sampling circuit that receives an interrupt signal, and a switch circuit that controls whether to short-circuit an input end and an output end of the sampling circuit,
When noise removal is not necessary, the switch circuit is turned on and an external interrupt signal is directly supplied to the internal interrupt request signal generating circuit without going through the sampling circuit.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例である。スイッチ回路4は一
端がサンプリング回路20入力端に、他の一端がサンプ
リング回路2の出力端にそれぞれ接続されている。この
様に接続されているため、スイッチ回路4がオン状態の
ときは外部装置1からの割込信号5は、従来回路と同様
にサンプリング回路2によりノイズと正規の信号とに判
別され、正規の割込み信号5のみが内部の割込要求信号
発生回路3に供給される。一方、スイッチ回路4がオン
状態のときは外部からの割込信号はサンプリング回路を
介さずに直接内部の割込要求信号発生回路に供給される
FIG. 1 shows an embodiment of the present invention. The switch circuit 4 has one end connected to the input end of the sampling circuit 20 and the other end connected to the output end of the sampling circuit 2. Because of this connection, when the switch circuit 4 is in the on state, the interrupt signal 5 from the external device 1 is discriminated between noise and a normal signal by the sampling circuit 2, as in the conventional circuit, and is not a normal signal. Only the interrupt signal 5 is supplied to the internal interrupt request signal generation circuit 3. On the other hand, when the switch circuit 4 is on, an external interrupt signal is directly supplied to the internal interrupt request signal generating circuit without going through the sampling circuit.

〔発明の効果〕〔Effect of the invention〕

この様に構成されている為、本発明によれば従来の割込
制御回路と同等のノイズ防止機能を有し。
Because of this structure, the present invention has a noise prevention function equivalent to that of a conventional interrupt control circuit.

さらに、ノイズ防止機能の必要がない場合には、サンプ
リング回路をスイッチ回路で短絡することにより、外部
割込に対する応答をすみやかに実行させる事ができる。
Furthermore, when the noise prevention function is not required, by short-circuiting the sampling circuit with a switch circuit, a response to an external interrupt can be quickly executed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すブロック図、第2図は
従来の回路例を示すブロック図である。 1・・・・・・外部装置、2・・・・・・サンプリング
回路、3・・・・・・内部の割込信号発生回路、4・・
・・・・スイッチ回路、5・・・・・・割込み信号。
FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a block diagram showing an example of a conventional circuit. 1...External device, 2...Sampling circuit, 3...Internal interrupt signal generation circuit, 4...
...Switch circuit, 5...Interrupt signal.

Claims (1)

【特許請求の範囲】[Claims] 外部割込信号入力端子がサンプリング回路を経て内部の
割込要求信号発生回路に接続され、該サンプリング回路
の入・出力端にスイッチ回路が接続されてこのサンプリ
ング回路の短絡が制御される様に構成されたことを特徴
とするマイクロコンピュータの割込制御回路。
An external interrupt signal input terminal is connected to an internal interrupt request signal generation circuit via a sampling circuit, and a switch circuit is connected to the input/output terminal of the sampling circuit to control short-circuiting of the sampling circuit. A microcomputer interrupt control circuit characterized by:
JP60065326A 1985-03-29 1985-03-29 Interruption control circuit of microcomputer Pending JPS61224043A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60065326A JPS61224043A (en) 1985-03-29 1985-03-29 Interruption control circuit of microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60065326A JPS61224043A (en) 1985-03-29 1985-03-29 Interruption control circuit of microcomputer

Publications (1)

Publication Number Publication Date
JPS61224043A true JPS61224043A (en) 1986-10-04

Family

ID=13283676

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60065326A Pending JPS61224043A (en) 1985-03-29 1985-03-29 Interruption control circuit of microcomputer

Country Status (1)

Country Link
JP (1) JPS61224043A (en)

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