JPS6119857U - Output port control circuit - Google Patents
Output port control circuitInfo
- Publication number
- JPS6119857U JPS6119857U JP10536784U JP10536784U JPS6119857U JP S6119857 U JPS6119857 U JP S6119857U JP 10536784 U JP10536784 U JP 10536784U JP 10536784 U JP10536784 U JP 10536784U JP S6119857 U JPS6119857 U JP S6119857U
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- output information
- output
- output port
- port control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Debugging And Monitoring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案のー、実施例のブロック図である。
1・・・・・・異常検知手段、2・・・・・・第二出力
情報記憶手段(異常動作時に出力する情報)、3・・・
・・・第一出力情報記憶手段(正常動作時に出力する情
報)、4・・・・・・切り替え部、5・・・・・・出力
バッファ、6・・・・・・出力端子、7・・・・・・第
一出力情報記憶手段への入力情報、8・・・・・・第一
出力情報記憶手段より出力される出力情報、9・・・・
・・第二出力情報記憶手段より出力される出力情報、1
0・・・・・・異常検知信号、11・・・・・・出力バ
ッファへの出力情報、12・・・・・・出力バツファよ
り出力端子への出力信号。FIG. 1 is a block diagram of an embodiment of the present invention. 1... Abnormality detection means, 2... Second output information storage means (information to be output at the time of abnormal operation), 3...
. . . first output information storage means (information output during normal operation), 4 . . . switching section, 5 . . . output buffer, 6 . . . output terminal, 7. ...Input information to the first output information storage means, 8...Output information output from the first output information storage means, 9...
...Output information output from the second output information storage means, 1
0...Abnormality detection signal, 11...Output information to the output buffer, 12...Output signal from the output buffer to the output terminal.
Claims (1)
段と、異常を示す第2の出力情報を記憶する第2の記憶
手段と、異常動作を一検知して異常検知信号を発生する
検知手段とを備え、前記異常検知信号で発生されていな
い場合、前記第1の出力情報を出力せしめ、前記異常検
知信号が発生されている場合には、前記第2の出力情報
を出力せしめる様にしたことを特@メする出力ボート制
御回路。A first storage means that stores first output information during normal operation, a second storage means that stores second output information that indicates an abnormality, and detects an abnormal operation and generates an abnormality detection signal. and a detection means for outputting the first output information when the abnormality detection signal is not generated, and outputting the second output information when the abnormality detection signal is generated. Output boat control circuit that features similar functions.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10536784U JPS6119857U (en) | 1984-07-12 | 1984-07-12 | Output port control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10536784U JPS6119857U (en) | 1984-07-12 | 1984-07-12 | Output port control circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6119857U true JPS6119857U (en) | 1986-02-05 |
Family
ID=30664695
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10536784U Pending JPS6119857U (en) | 1984-07-12 | 1984-07-12 | Output port control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6119857U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6335136U (en) * | 1986-08-22 | 1988-03-07 |
-
1984
- 1984-07-12 JP JP10536784U patent/JPS6119857U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6335136U (en) * | 1986-08-22 | 1988-03-07 |
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